Philips Semiconductors
Product specification
74F30
8-input NAND gate
2
March 3, 1989
8530050 95941
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F30
3.2ns
1.7mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
10%,
T
amb
= 0
C to +70
C
PKG DWG #
14-pin plastic DIP
N74F30N
SOT27-1
14-pin plastic SO
N74F30D
SOT108-1
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
V
CC
NC
NC
Q
Dg
NC
Dh
Da
Db
Df
Dc
Dd
De
SF00070
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
Dn
Data inputs
1.0/1.0
20
A/0.6mA
Q
Data output
50/33
1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20
A in the High state and 0.6mA in the Low state.
LOGIC DIAGRAM
V
CC
= Pin 14
GND = Pin 7
SF00071
Q
8
3
4
5
Dc
Dd
De
6
Df
1
2
Da
Db
11
Dg
12
Dh
FUNCTION TABLE
INPUTS
OUTPUT
Dna
Dnb
Dnc
Dnd
Dne
Dnf
Dng
Dnh
Qn
L
X
X
X
X
X
X
X
H
X
L
X
X
X
X
X
X
H
X
X
L
X
X
X
X
X
H
X
X
X
L
X
X
X
X
H
X
X
X
X
L
X
X
X
H
X
X
X
X
X
L
X
X
H
X
X
X
X
X
X
L
X
H
X
X
X
X
X
X
X
L
H
H
H
H
H
H
H
H
H
L
NOTES:
1. H = High voltage level
2. L = Low voltage level
3. X = Don't care
LOGIC SYMBOL
Dc
Db
Dh
Dg
Df
De
Da
Dd
Q
8
1
2
3
4
5
6
11
12
V
CC
= Pin 14
GND = Pin 7
SF00072
IEC/IEEE SYMBOL
SF00073
&
8
1
2
3
4
5
6
11
12
Philips Semiconductors
Product specification
74F30
8-input NAND gate
March 3, 1989
3
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Supply voltage
0.5 to +7.0
V
V
IN
Input voltage
0.5 to +7.0
V
I
IN
Input current
30 to +5
mA
V
OUT
Voltage applied to output in High output state
0.5 to V
CC
V
I
OUT
Current applied to output in Low output state
40
mA
T
amb
Operating free-air temperature range
0 to +70
C
T
stg
Storage temperature range
65 to +150
C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
NOM
MAX
UNIT
V
CC
Supply voltage
4.5
5.0
5.5
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
IK
Input clamp current
18
mA
I
OH
High-level output current
1
mA
I
OL
Low-level output current
20
mA
T
amb
Operating free-air temperature range
0
+70
C
Philips Semiconductors
Product specification
74F30
8-input NAND gate
March 3, 1989
4
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
TYP
2
MAX
UNIT
V
O
High level output voltage
V
CC
= MIN, V
IL
= MAX
10%V
CC
2.5
V
V
OH
High-level output voltage
V
IH
= MIN, I
OH
= MAX
5%V
CC
2.7
3.4
V
V
O
Low level output voltage
V
CC
= MIN, V
IL
= MAX
10%V
CC
0.30
0.50
V
V
OL
Low-level output voltage
V
IH
= MIN, I
OL
= MAX
5%V
CC
0.30
0.50
V
V
IK
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
0.73
1.2
V
I
I
Input current at maximum input voltage
V
CC
= MAX, V
I
= 7.0V
100
A
I
IH
High-level input current
V
CC
= MAX, V
I
= 2.7V
20
A
I
IL
Low-level input current
V
CC
= MAX, V
I
= 0.5V
0.6
mA
I
OS
Short-circuit output current
3
V
CC
= MAX
60
150
mA
I
CC
Supply current (total)
I
CCH
V
CC
= MAX
V
IN
= GND
0.6
1.5
mA
I
CC
Supply current (total)
I
CCL
V
CC
= MAX
V
IN
= 4.5V
2.8
4.0
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25
C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
TEST
V
CC
= +5.0V
V
CC
= +5.0V
10%
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25
C
T
amb
= 0
C to +70
C
UNIT
CONDITION
C
L
= 50pF, R
L
= 500
C
L
= 50pF, R
L
= 500
MIN
TYP
MAX
MIN
MAX
t
PLH
t
PHL
Propagation delay
Da, Db, Dc, Dd, De, Df, Dg, Dh to Q
Waveform 1
1.5
1.0
3.5
3.0
5.0
4.5
1.5
1.0
5.5
5.0
ns
AC WAVEFORMS
VM
VM
VM
VM
Q
Da, Db, Dc, Dd,
De, Df, Dg, Dh
tPHL
tPLH
SF00074
Waveform 1.
Propagation Delay for Inverting Outputs
NOTE:
For all waveforms, V
M
= 1.5V.
Philips Semiconductors
Product specification
74F30
8-input NAND gate
March 3, 1989
5
TEST CIRCUIT AND WAVEFORMS
tw
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
0V
tTHL (tf
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
t
THL
1MHz
500ns
2.5ns
2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN
VOUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
tTHL (tf
)
tTLH (tr
)
tTLH (tr
)
AMP (V)
amplitude
3.0V
1.5V
V
M
SF00006
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