DATA SHEET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT253
Dual 4-input multiplexer; 3-state
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990
2
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
FEATURES
Non-inverting data path
3-state outputs for bus interface
and multiplex expansion
Common select inputs
Separate output enable inputs
Output capability: bus driver
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT253 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT253 have two identical 4-input multiplexers
with 3-state outputs which select two bits from four sources
selected by common data select inputs (S
0
, S
1
).
When the individual output enable (1OE, 2OE) inputs of
the 4-input multiplexers are HIGH, the outputs are forced
to the high impedance OFF-state. The "253" is the logic
implementation of a 2-pole, 4-position switch, where the
position of the switch is determined by the logic levels
applied to S
0
and S
1
.
The logic equations for the outputs are:
1Y = 1OE(1l
0
.S
1
.S
0
+
1I
1
.S
1
.S
0
+
1I
2
.S
1
.S
0
+
1I
3
.S
1
.S
0
)
2Y = 2OE(2l
0
.S
1
.S
0
+
2I
1
.S
1
.S
0
+
2I
2
.S
1
.S
0
+
2I
3
.S
1
.S
0
)
APPLICATIONS
Data selectors
Data multiplexers
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W):
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
V
CC
2
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
-
1.5 V
ORDERING INFORMATION
See
"74HC/HCT/HCU/HCMOS Logic Package Information"
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
propagation delay
C
L
= 15 pF; V
CC
= 5 V
1I
n
, 2I
n
to nY;
17
17
ns
S
n
to nY
18
19
ns
C
I
input capacitance
3.5
3.5
pF
C
PD
power dissipation capacitance per multiplexer
notes 1 and 2
55
55
pF
December 1990
3
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1, 15
1OE, 2OE
output enable inputs (active LOW)
14, 2
S
0
, S
1
common data select inputs
7, 9
1Y, 2Y
3-state multiplexer outputs
8
GND
ground (0 V)
6, 5, 4, 3
1I
0
to 1I
3
data inputs from source 1
10, 11, 12, 13
2I
0
to 2I
3
data inputs from source 2
16
V
CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
4
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
FUNCTION TABLE
NOTES
1. H = HIGH voltage level
L = LOW voltage level
X = don't care
Z = high impedance OFF-state
SELECT INPUTS
DATA INPUTS
OUTPUT ENABLE
OUTPUT
S
0
S
1
nI
0
nI
1
nI
2
nI
3
nOE
nY
X
X
X
X
X
X
H
Z
L
L
H
H
L
L
L
L
L
H
X
X
X
X
L
H
X
X
X
X
X
X
X
X
L
L
L
L
L
H
L
H
L
L
H
H
H
H
H
H
X
X
X
X
X
X
X
X
L
H
X
X
X
X
L
H
L
L
L
L
L
H
L
H
Fig.4 Functional diagram.
Fig.5 Logic diagram.
December 1990
5
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
"74HC/HCT/HCU/HCMOS Logic Family Specifications"
.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+
25
-
40 to
+
85
-
40
to
+
125
min.
typ. max. min.
max.
min. max.
t
PHL
/ t
PLH
propagation delay
1I
n
to nY;
2I
n
to nY
55
20
16
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.6
t
PHL
/ t
PLH
propagation delay
S
n
to nY
58
21
17
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.6
t
PZH
/ t
PZL
3-state output enable time
nOE to nY
30
11
9
100
20
17
125
25
21
150
30
26
ns
2.0
4.5
6.0
Fig.7
t
PHZ
/ t
PLZ
3-state output disable time
nOE to nY
41
15
12
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.7
t
THL
/ t
TLH
output transition time
14
5
4
60
12
10
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.6
December 1990
6
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
"74HC/HCT/HCU/HCMOS Logic Family Specifications"
.
Output capability: bus driver
I
CC
category: MSI
Note to HCT types
The value of additional quiescent supply current (
I
CC
) for a unit load of 1 is given in the family specifications.
To determine
I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
INPUT
UNIT LOAD COEFFICIENT
1I
n
2I
n
nOE
S
0
S
1
0.40
0.40
1.10
1.10
1.10
SYMBOL PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS
+
25
-
40 to
+
85
-
40 to
+
125
min.
typ.
max.
min. max. min.
max.
t
PHL
/ t
PLH
propagation delay
1I
n
to nY;
2I
n
to nY
20
38
48
57
ns
4.5
Fig.6
t
PHL
/ t
PLH
propagation delay
S
n
to nY
22
40
50
60
ns
4.5
Fig.6
t
PZH
/ t
PZL
3-state output enable time
nOE to nY
14
30
38
45
ns
4.5
Fig.7
t
PHZ
/ t
PLZ
3-state output disable time
nOE to nY
13
30
38
45
ns
4.5
Fig.7
t
THL
/ t
TLH
output transition time
5
12
15
18
ns
4.5
Fig.6
December 1990
7
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
AC WAVEFORMS
PACKAGE OUTLINES
See
"74HC/HCT/HCU/HCMOS Logic Package Outlines"
.
Fig.6
Waveforms showing the input (1I
n
, 2I
n
) to output (1Y, 2Y) propagation delays and the output transition
times.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
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