DATA SHEET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT283
4-bit binary full adder with fast carry
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990
2
Philips Semiconductors
Product specification
4-bit binary full adder with fast carry
74HC/HCT283
FEATURES
High-speed 4-bit binary addition
Cascadable in 4-bit increments
Fast internal look-ahead carry
Output capability: standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT283 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT283 add two 4-bit binary words (A
n
plus B
n
)
plus the incoming carry. The binary sum appears on the
sum outputs (
1
to
4
) and the out-going carry (C
OUT
)
according to the equation:
C
IN
+
(A
1
+
B
1
)
+
2(A
2
+
B
2
)
+ +
4(A
3
+
B
3
)
+
8(A
4
+
B
4
) =
=
1
+
2
2
+
4
3
+
8
4
+
16C
OUT
Where (
+
) = plus.
Due to the symmetry of the binary add function, the "283"
can be used with either all active HIGH operands (positive
logic) or all active LOW operands (negative logic); see
function table. In case of all active LOW operands the
results
1
to
4
and C
OUT
should be interpreted also as
active LOW. With active HIGH inputs, C
IN
must be held
LOW when no "carry in" is intended. Interchanging inputs
of equal weight does not affect the operation, thus C
IN
, A
1
,
B
1
can be assigned arbitrarily to pins 5, 6, 7, etc.
See the "583" for the BCD version.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W):
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
V
CC
2
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
-
1.5 V
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
propagation delay
C
L
= 15 pF; V
CC
= 5 V
C
IN
to
1
16
15
ns
C
IN
to
2
18
21
ns
C
IN
to
3
20
23
ns
C
IN
to
4
23
27
ns
A
n
or B
n
to
n
21
25
ns
C
IN
to C
OUT
20
23
ns
A
n
or B
n
to C
OUT
20
24
ns
C
I
input capacitance
3.5
3.5
pF
C
PD
power dissipation capacitance per package
notes 1 and 2
88
92
pF
December 1990
4
Philips Semiconductors
Product specification
4-bit binary full adder with fast carry
74HC/HCT283
FUNCTION TABLE
Note
1. H = HIGH voltage level
L = LOW voltage level
2. example
1001
1010
-----
10011
3. for active HIGH, example = (9 + 10 = 19)
4. for active LOW, example = (carry + 6 + 5 = 12)
PINS
C
IN
A
1
A
2
A
3
A
4
B
1
B
2
B
3
B
4
1
2
3
4
C
OUT
EXAMPLE
(2)
logic levels
L
L
H
L
H
H
L
L
H
H
H
L
L
H
active HIGH
0
0
1
0
1
1
0
0
1
1
1
0
0
1
(3)
active LOW
1
1
0
1
0
0
1
1
0
0
0
1
1
0
(4)
Fig.4 Functional diagram.
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