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Электронный компонент: 74HC3G04DP

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DATA SHEET
Product specification
Supersedes data of 2002 Jul 26
2003 Oct 30
INTEGRATED CIRCUITS
74HC3G04; 74HCT3G04
Inverter
2003 Oct 30
2
Philips Semiconductors
Product specification
Inverter
74HC3G04; 74HCT3G04
FEATURES
Wide supply voltage range from 2.0 to 6.0 V
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Very small 8 pins package
Output capability: standard
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
DESCRIPTION
The 74HC3G/HCT3G04 is a high-speed Si-gate CMOS
device and is pin compatible with low power Schottky
TTL (LSTTL). Specified in compliance with JEDEC
standard no. 7.
The 74HC3G/HCT3G04 provides three inverting buffers.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
6.0 ns.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
N +
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total switching outputs;
(C
L
V
CC
2
f
o
) = sum of outputs.
2. For HC3G04 the condition is V
I
= GND to V
CC
.
For HCT3G04 the condition is V
I
= GND to V
CC
-
1.5 V.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC3G04
HCT3G04
t
PHL
/t
PLH
propagation delay nA to nY
C
L
= 50 pF; V
CC
= 4.5 V 8
10
ns
C
I
input capacitance
1.5
1.5
pF
C
PD
power dissipation capacitance per buffer
notes 1 and 2
9
9
pF
INPUT
OUTPUT
nA
nY
L
H
H
L
2003 Oct 30
3
Philips Semiconductors
Product specification
Inverter
74HC3G04; 74HCT3G04
ORDERING INFORMATION
PINNING
TYPE NUMBER
PACKAGE
TEMPERATURE RANGE
PINS
PACKAGE
MATERIAL
CODE
MARKING
74HC3G04DP
-
40 to +125
C
8
TSSOP8
plastic
SOT505-2
H04
74HCT3G04DP
-
40 to +125
C
8
TSSOP8
plastic
SOT505-2
T04
74HC3G04DC
-
40 to +125
C
8
VSSOP8
plastic
SOT765-2
H04
74HCT3G04DC
-
40 to +125
C
8
VSSOP8
plastic
SOT765-2
T04
PIN
SYMBOL
DESCRIPTION
1
1A
data input 1A
2
3Y
data output 3Y
3
2A
data input 2A
4
GND
ground (0 V)
5
2Y
data output 2Y
6
3A
data input 3A
7
1Y
data output 1Y
8
V
CC
supply voltage
handbook, halfpage
1
2
3
4
8
7
6
5
MNA719
04
VCC
1Y
3Y
3A
2Y
GND
2A
1A
Fig.1 Pin configuration.
handbook, halfpage
MNA720
1A
1Y
1
7
2A
2Y
3
5
3A
3Y
6
2
Fig.2 Logic symbol.
2003 Oct 30
4
Philips Semiconductors
Product specification
Inverter
74HC3G04; 74HCT3G04
handbook, halfpage
7
1
1
1
5
3
MNA721
1
2
6
Fig.3 IEC logic symbol.
handbook, halfpage
MNA110
A
Y
Fig.4 Logic diagram (one driver).
2003 Oct 30
5
Philips Semiconductors
Product specification
Inverter
74HC3G04; 74HCT3G04
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 110
C the value of P
D
derates linearly with 8 mW/K.
SYMBOL
PARAMETER
CONDITIONS
74HC3G04
74HCT3G04
UNIT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
V
CC
supply voltage
2.0
5.0
6.0
4.5
5.0
5.5
V
V
I
input voltage
0
-
V
CC
0
-
V
CC
V
V
O
output voltage
0
-
V
CC
0
-
V
CC
V
T
amb
operating ambient
temperature
see DC and AC
characteristics per
device
-
40
+25
+125
-
40
+25
+125
C
t
r
, t
f
input rise and fall times
V
CC
= 2.0 V
-
-
1000
-
-
-
ns
V
CC
= 4.5 V
-
6.0
500
-
6.0
500
ns
V
CC
= 6.0 V
-
-
400
-
-
-
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
-
0.5
+7.0
V
I
IK
input diode current
V
I
<
-
0.5 V or V
I
> V
CC
+ 0.5 V; note 1
-
20
mA
I
OK
output diode current
V
O
<
-
0.5 V or V
O
> V
CC
+ 0.5 V; note 1
-
20
mA
I
O
output source or sink current
-
0.5 V < V
O
< V
CC
+ 0.5 V; note 1
-
25
mA
I
CC
V
CC
or GND current
note 1
-
50
mA
T
stg
storage temperature
-
65
+150
C
P
D
power dissipation
T
amb
=
-
40 to +125
C; note 2
-
300
mW