Document Outline
- FEATURES
- GENERAL DESCRIPTION
- QUICK REFERENCE DATA
- ORDERING INFORMATION
- PIN DESCRIPTION
- FUNCTION TABLE
- DC CHARACTERISTICS
- AC CHARACTERISTICS
- AC WAVEFORMS
- PACKAGE OUTLINES
DATA SHEET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT540
Octal buffer/line driver; 3-state;
inverting
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990
2
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state;
inverting
74HC/HCT540
FEATURES
Inverting outputs
Output capability: bus driver
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT540 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT540 are octal inverting buffer/line drivers
with 3-state outputs. The 3-state outputs are controlled by
the output enable inputs OE
1
and OE
2
.
A HIGH on OE
n
causes the outputs to assume a high
impedance OFF-state.
The "540" is identical to the "541" but has inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W):
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
V
CC
2
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
-
1.5 V
ORDERING INFORMATION
See
"74HC/HCT/HCU/HCMOS Logic Package Information"
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
propagation delay A
n
to Y
n
C
L
= 15 pF; V
CC
= 5 V
9
11
ns
C
I
input capacitance
3.5
3.5
pF
C
PD
power dissipation capacitance per buffer notes 1 and 2
39
44
pF
December 1990
3
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
74HC/HCT540
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1, 19
OE
1
, OE
2
output enable input (active LOW)
2, 3, 4, 5, 6, 7, 8, 9
A
0
to A
7
data inputs
10
GND
ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11
Y
0
to Y
7
bus outputs
20
V
CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
4
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
74HC/HCT540
Fig.4 Functional diagram.
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don't care
Z = high impedance OFF-state
INPUTS
OUTPUT
OE
1
OE
2
A
n
Y
n
L
L
X
H
L
L
H
X
L
H
X
X
H
L
Z
Z
Fig.5 Logic diagram.
December 1990
5
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
74HC/HCT540
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
"74HC/HCT/HCU/HCMOS Logic Family Specifications"
.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+
25
-
40 to
+
85
-
40 to
+
125
min.
typ.
max. min.
max.
min.
max.
t
PHL
/ t
PLH
propagation delay
A
n
to Y
n
30
11
9
100
20
17
125
25
21
150
30
26
ns
2.0
4.5
6.0
Fig.6
t
PZH
/ t
PZL
3-state output
enable time
OE to Y
n
52
19
15
160
32
27
200
40
34
240
48
41
ns
2.0
4.5
6.0
Fig.7
t
PHZ
/ t
PLZ
3-state output
disable time
OE to Y
n
61
22
18
160
32
27
200
40
34
240
48
41
ns
2.0
4.5
6.0
Fig.7
t
THL
/ t
TLH
output transition time
14
5
4
60
12
10
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.6
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