Document Outline
- FEATURES
- GENERAL DESCRIPTION
- QUICK REFERENCE DATA
- ORDERING INFORMATION
- PIN DESCRIPTION
- FUNCTION TABLE
- DC CHARACTERISTICS
- AC CHARACTERISTICS
- AC WAVEFORMS
- PACKAGE OUTLINES
DATA SHEET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT643
Octal bus transceiver; 3-state;
true/inverting
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990
2
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state;
true/inverting
74HC/HCT643
FEATURES
Octal bidirectional bus interface
True and inverting 3-state outputs
Output capability: bus driver
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT643 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT643 are octal transceivers featuring true
and inverting 3-state bus compatible outputs in both send
and receive directions.
The "643" features an output enable (OE) input for easy
cascading and a send/receive (DIR) for direction control.
OE controls the outputs so that the buses are effectively
isolated.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W):
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
V
CC
2
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
-
1.5 V
ORDERING INFORMATION
See
"74HC/HCT/HCU/HCMOS Logic Package Information"
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/
t
PLH
propagation delay
A
n
to B
n
; inverting
B
n
to A
n
; true
C
L
= 15 pF; V
CC
= 5 V
7
8
8
11
ns
ns
C
I
input capacitance
3.5
3.5
pF
C
I/O
input/output capacitance
10
10
pF
C
PD
power dissipation capacitance per transceiver notes 1 and 2
42
44
pF
December 1990
3
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state;
true/inverting
74HC/HCT643
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
DIR
direction control
2, 3, 4, 5, 6, 7, 8, 9
A
0
to A
7
data inputs/outputs
10
GND
ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11 B
0
to B
7
data inputs/outputs
19
OE
output enable input (active LOW)
20
V
CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don't care
Z = high impedance OFF-state
INPUTS
INPUTS/OUTPUTS
OE
DIR
A
n
B
n
L
L
H
L
H
X
A = B
inputs
Z
inputs
B = A
Z
Fig.4 Functional diagram.
December 1990
4
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state;
true/inverting
74HC/HCT643
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
"74HC/HCT/HCU/HCMOS Logic Family Specifications"
.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL
PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+25
-
40 to +85
-
40 to +125
min.
typ.
max. min. max. min.
max.
t
PHL
/ t
PLH
propagation delay
A
n
to B
n
;
inverting
25
9
7
90
18
15
115
23
20
135
27
23
ns
2.0
4.5
6.0
Fig.5
t
PHL
/ t
PLH
propagation delay
B
n
to A
n
;
non-inverting (true)
28
10
8
90
18
15
115
23
20
135
27
23
ns
2.0
4.5
6.0
Fig.6
t
PZH
/ t
PZL
3-state output enable time
OE, DIR to A
n
;
OE, DIR to B
n
39
14
11
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.7
t
PHZ
/ t
PLZ
3-state output disable time
OE, DIR to A
n
;
OE, DIR to B
n
44
16
13
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.7
t
THL
/ t
TLH
output transition time
14
5
4
60
12
10
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.5 and Fig.6
December 1990
5
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state;
true/inverting
74HC/HCT643
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
"74HC/HCT/HCU/HCMOS Logic Family Specifications"
.
Output capability: bus driver
I
CC
category: MSI
Note to HCT types
The value of additional quiescent supply current (
I
CC
) for a unit load of 1 is given in the family specifications.
To determine
I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
INPUT
UNIT LOAD COEFFICIENT
A
n
B
n
OE
DIR
1.50
0.40
1.50
0.90
SYMBOL
PARAMETER
T
amb
(
C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS
+25
-
40 to +85
-
40 to +125
min.
typ.
max. min. max. min.
max.
t
PHL
/ t
PLH
propagation delay
A
n
to B
n
;
inverting
10
20
25
30
ns
4.5
Fig.5
t
PHL
/ t
PLH
propagation delay
B
n
to A
n
;
non-inverting (true)
13
23
29
35
ns
4.5
Fig.6
t
PZH
/ t
PZL
3-state output enable time
OE, DIR to A
n
;
OE, DIR to B
n
16
30
38
45
ns
4.5
Fig.7
t
PHZ
/ t
PLZ
3-state output disable time
OE, DIR to A
n
;
OE, DIR to B
n
17
30
38
45
ns
4.5
Fig.7
t
THL
/ t
TLH
output transition time
5
12
15
18
ns
4.5
Fig.5 and Fig.6
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