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Электронный компонент: 74HC/HCT03

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DATA SHEET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT03
Quad 2-input NAND gate
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990
2
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74HC/HCT03
FEATURES
Level shift capability
Output capability: standard (open drain)
I
CC
category: SSI
GENERAL DESCRIPTION
The 74HC/HCT03 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT03 provide the 2-input NAND function.
The 74HC/HCT03 have open-drain N-transistor outputs,
which are not clamped by a diode connected to V
CC
. In
the OFF-state, i.e. when one input is LOW, the output
may be pulled to any voltage between GND and V
Omax
.
This allows the device to be used as a LOW-to-HIGH or
HIGH-to-LOW level shifter. For digital operation and
OR-tied output applications, these devices must have a
pull-up resistor to establish a logic HIGH level.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W):
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) +
(V
O
2
/R
L
)
duty factor LOW, where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
V
O
= output voltage in V
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
R
L
= pull-up resistor in M
(C
L
V
CC
2
f
o
) = sum of outputs
(V
O
2
/R
L
) = sum of outputs
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
-
1.5 V
3. The given value of C
PD
is obtained with:
C
L
= 0 pF and R
L
=
ORDERING INFORMATION
See
"74HC/HCT/HCU/HCMOS Logic Package Information"
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PZL
/ t
PLZ
propagation delay
C
L
= 15 pF; R
L
= 1 k
; V
CC
= 5 V
8
10
ns
C
I
input capacitance
3.5
3.5
pF
C
PD
power dissipation capacitance per gate
notes 1, 2 and 3
4.0
4.0
pF
December 1990
3
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74HC/HCT03
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1, 4, 9, 12
1A to 4A
data inputs
2, 5, 10, 13
1B to 4B
data inputs
3, 6, 8, 11
1Y to 4Y
data outputs
7
GND
ground (0 V)
14
V
CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
Fig.4 Functional diagram.
Fig.5 Logic diagram (one gate).
FUNCTION TABLE
Note
1. H = HIGH voltage level
L = LOW voltage level
Z = high impedance OFF-state
INPUTS
OUTPUT
nA
nB
nY
L
L
H
H
L
H
L
H
Z
Z
Z
L
December 1990
4
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74HC/HCT03
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to GND (ground = 0 V)
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
V
CC
DC supply voltage
-
0.5
+7
V
V
O
DC output voltage
-
0.5
+7
V
I
IK
DC input diode current
20
mA
for V
I
< -
0.5 V or V
I
>
V
CC
+ 0.5 V
-
I
OK
DC output diode current
20
mA
for V
O
< -
0.5 V
-
I
O
DC output sink current
25
mA
for
-
0.5 V
<
V
O
I
CC
;
I
GND
DC VCC or GND current
50
mA
T
stg
storage temperature range
-
65
+150
C
P
tot
power dissipation per package
for temperature range;
-
40 to +125
C
74HC/HCT
plastic DIL
750
mW
above +70
C: derate linearly with 12 mW/K
plastic mini-pack (SO)
500
mW
above +70
C: derate linearly with 8 mW/K
December 1990
5
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74HC/HCT03
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
"74HC/HCT/HCU/HCMOS Logic Family Specifications"
, except that the V
OH
values are
not valid for open drain. They are replaced by I
OZ
as given below.
Output capability: standard (open drain), excepting V
OH
I
CC
category: SSI
Voltages are referenced to GND (ground = 0 V)
Note
1. The maximum operating output voltage (V
O(max)
) is 6.0 V.
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL
PARAMETER
T
amb
(
C)
TEST CONDITIONS
74HC
UNIT
V
CC
(V)
V
I
OTHER
+25
-
40 to +85
-
40 to +125
min.
typ.
max. min.
max. min.
max.
I
OZ
HIGH level output
leakage current
0.5
5.0
10.0
A
2.0
to
6.0
V
IL
V
O
= V
O(max)
(1)
or GND
SYMBOL PARAMETER
T
amb
(
C)
TEST CONDITIONS
74HC
UNIT
V
CC
(V)
WAVEFORMS
+25
-
40 to +85
-
40 to
+
125
min.
typ.
max.
min.
max.
min.
max.
t
PZL
/
t
PLZ
propagation delay
nA, nB to nY
28
10
8
95
19
16
120
24
20
145
29
25
ns
2.0
4.5
6.0
Fig.6
t
THL
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.6