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Электронный компонент: 74LV377D

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Philips
Semiconductors
74LV377
Octal D-type flip-flop with data enable;
positive edge-trigger
Product specification
Supersedes data of 1997 Mar 04
IC24 Data Handbook
1998 Jun 10
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74LV377
Octal D-type flip-flop with data enable;
positive edge-trigger
2
1998 Jun 10
8531935 19545
FEATURES
Optimized for Low Voltage applications: 1.0 to 3.6V
Accepts TTL input levels between V
CC
= 2.7V and V
CC
= 3.6V
Typical V
OLP
(output ground bounce)
t
0.8V @ V
CC
= 3.3V,
T
amb
= 25
C
Typical V
OHV
(output V
OH
undershoot)
u
2V @ V
CC
= 3.3V,
T
amb
= 25
C
Ideal for addressable register applications
Data enable for address and data synchronization applications
Eight positive-edge triggered D-type flip-flops
Output capability: standard
I
CC
category: MSI
DESCRIPTION
The 74LV377 is a lowvoltage CMOS device and is pin and function
compatible with 74HC/HCT377.
The 74LV377 has eight edge-triggered, D-type flip-flops with
individual D inputs and Q outputs. A common clock (CP) input loads
all flip-flops simultaneously when the data enable (E) is LOW. The
state of each D input, one set-up time before the LOW-to-HIGH
clock transition, is transferred to the corresponding output (Q
n
) of
the flip-flop. The E input must be stable only one set-up time prior to
the LOW-to-HIGH transition for predictable operation.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
C; t
r
= t
f
v
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
CP to Q
n
C
L
= 15pF
V
3 3V
13
ns
f
max
Maximum clock frequency
V
CC
= 3.3V
77
MHz
C
I
Input capacitance
3.5
pF
C
PD
Power dissipation capacitance per flip-flop
Notes 1 and 2
20
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
f
i
)S
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
S
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
20-Pin Plastic DIL
40
C to +125
C
74LV377 N
74LV377 N
SOT146-1
20-Pin Plastic SO
40
C to +125
C
74LV377 D
74LV377 D
SOT163-1
20-Pin Plastic SSOP Type II
40
C to +125
C
74LV377 DB
74LV377 DB
SOT339-1
20-Pin Plastic TSSOP Type I
40
C to +125
C
74LV377 PW
74LV377PW DH
SOT360-1
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1
E
Data enable input (active-LOW)
2, 5, 6, 9, 12,
15, 16, 19
Q
0
to Q
7
flip-flop outputs
3, 4, 7, 8, 13,
14, 17, 18
D
0
to D
7
Data inputs
10
GND
Ground (0V)
11
CP
Clock input
(LOW-to-HIGH, edge-triggered)
20
V
CC
Positive supply voltage
FUNCTION TABLE
OPERATING MODES
INPUTS
OUTPUTS
OPERATING MODES
CP
E
D
n
Q
n
Load ``1''
l
h
H
Load ``0''
l
l
L
Hold (do nothing)
X
h
H
X
X
No change
No change
H
= HIGH voltage level
h
= HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
L
= LOW voltage level
l
= LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
= LOWtoHIGH CP transition
X
= Don't care
Philips Semiconductors
Product specification
74LV377
Octal D-type flip-flop with data enable;
positive edge-trigger
1998 Jun 10
3
PIN CONFIGURATION
SV00667
Q
0
Q
1
Q
2
Q
3
GND
Q
4
Q
5
Q
6
Q
7
D
0
D
1
D
2
D
3
V
CC
D
4
D
5
D
6
D
7
CP
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
E
LOGIC SYMBOL
SV00668
1
2
3
4
5
6
7
8
9
Q
0
D
0
D
1
Q
1
Q
2
D
2
D
3
Q
3
Q
4
D
4
D
5
Q
5
Q
6
D
6
D
7
Q
7
19
18
17
16
15
14
13
12
11
E
CP
LOGIC SYMBOL (IEEE/IEC)
SV00669
2
5
6
9
12
15
16
19
3
4
7
8
13
14
17
18
1C2
G1
2D
11
1
FUNCTIONAL DIAGRAM
SV00670
3
4
7
8
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
18
17
14
13
11
1
E
CP
OUTPUTS
FF1
to
FF8
2
5
6
9
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
19
16
15
12
Philips Semiconductors
Product specification
74LV377
Octal D-type flip-flop with data enable;
positive edge-trigger
1998 Jun 10
4
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
V
CC
DC supply voltage
See Note 1
1.0
3.3
3.6
V
V
I
Input voltage
0
V
CC
V
V
O
Output voltage
0
V
CC
V
T
amb
Operating ambient temperature range in free air
See DC and AC
characteristics
40
40
+85
+125
C
t
r
, t
f
Input rise and fall times
V
CC
= 1.0V to 2.0V
V
CC
= 2.0V to 2.7V
V
CC
= 2.7V to 3.6V





500
200
100
ns/V
NOTE:
1. The LV is guaranteed to function down to V
CC
= 1.0V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2V to V
CC
= 3.6V.
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +4.6
V
I
IK
DC input diode current
V
I
< 0.5 or V
I
> V
CC
+ 0.5V
20
mA
I
OK
DC output diode current
V
O
< 0.5 or V
O
> V
CC
+ 0.5V
50
mA
I
O
DC output source or sink current
standard outputs
0.5V < V
O
< V
CC
+ 0.5V
25
mA
I
GND
,
I
CC
DC V
CC
or GND current for types with
standard outputs
50
mA
T
stg
Storage temperature range
65 to +150
C
Power dissipation per package
for temperature range: 40 to +125
C
P
t t
plastic DIL
above +70
C derate linearly with 12mW/K
750
mW
P
tot
plastic mini-pack (SO)
above +70
C derate linearly with 8 mW/K
500
mW
plastic shrink mini-pack (SSOP and TSSOP)
above +60
C derate linearly with 5.5 mW/K
400
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors
Product specification
74LV377
Octal D-type flip-flop with data enable;
positive edge-trigger
1998 Jun 10
5
DC CHARACTERISTICS FOR THE LV FAMILY
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
-40
C to +85
C
-40
C to +125
C
UNIT
MIN
TYP
1
MAX
MIN
MAX
HIGH l
l I
t
V
CC
= 1.2V
0.9
0.9
V
IH
HIGH level Input
voltage
V
CC
= 2.0V
1.4
1.4
V
voltage
V
CC
= 2.7 to 3.6V
2.0
2.0
LOW l
l I
t
V
CC
= 1.2V
0.3
0.3
V
IL
LOW level Input
voltage
V
CC
= 2.0V
0.6
0.6
V
voltage
V
CC
= 2.7 to 3.6V
0.8
0.8
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100
A
1.2
HIGH level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
1.8
2.0
1.8
voltage; all outputs
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100
A
2.5
2.7
2.5
V
OH
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
2.8
3.0
2.8
V
HIGH level output
voltage;
STANDARD
outputs
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 6mA
2.40
2.82
2.20
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
LOW level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
voltage; all outputs
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
OL
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
LOW level output
voltage;
STANDARD
outputs
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 6mA
0.25
0.40
0.50
I
I
Input leakage
current
V
CC
= 3.6V; V
I
= V
CC
or GND
1.0
1.0
A
I
CC
Quiescent supply
current; MSI
V
CC
= 3.6V; V
I
= V
CC
or GND; I
O
= 0
20.0
160
A
I
CC
Additional
quiescent supply
current per input
V
CC
= 2.7V to 3.6V; V
I
= V
CC
0.6V
500
850
A
NOTE:
1. All typical values are measured at T
amb
= 25
C.