Philips
Semiconductors
74LV74
Dual D-type flip-flop with set and reset;
positive-edge trigger
Product specification
Supersedes data of 1996 Nov 07
IC24 Data Handbook
1998 Apr 20
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
2
1998 Apr 20
853-1888 19258
FEATURES
Wide operating voltage: 1.0 to 5.5V
Optimized for Low Voltage applications: 1.0 to 3.6V
Accepts TTL input levels between V
CC
= 2.7V and V
CC
= 3.6V
Typical V
OLP
(output ground bounce)
t
0.8V @ V
CC
= 3.3V,
T
amb
= 25
C
Typical V
OHV
(output V
OH
undershoot)
u
2V @ V
CC
= 3.3V,
T
amb
= 25
C
Output capability: standard
I
CC
category: flip-flops
DESCRIPTION
The 74LV74 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT74.
The 74LV74 is a dual positive edge triggered, D-type flip-flop with
individual data (D) inputs, clock (CP) inputs, set (S
D
) and (R
D
)
inputs; also complementary Q and Q outputs.
The set and reset are asynchronous active LOW inputs and operate
independently of the clock input. Information on the data input is
transferred to the Q output on the LOW-to-HIGH transition of the
clock pulse. The D inputs must be stable one set-up time prior to the
LOW-to-HIGH clock transition, for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly
tolerant to slower clock rise and fall times.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
C; t
r
=t
f
v
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nCP to nQ, nQ
nS
D
to nQ, nQ
nR
D
to nQ, nQ
C
L
= 15pF
V
CC
= 3.3V
11
14
14
ns
f
max
Maximum clock frequency
C
L
= 15pF
V
CC
= 3.3V
76
MHz
C
I
Input capacitance
3.5
pF
C
PD
Power dissipation capacitance per flip-flop
Notes 1 and 2
24
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
x f
i
)S
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
S
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
40
C to +125
C
74LV74 N
74LV74 N
SOT27-1
14-Pin Plastic SO
40
C to +125
C
74LV74 D
74LV74 D
SOT108-1
14-Pin Plastic SSOP Type II
40
C to +125
C
74LV74 DB
74LV74 DB
SOT337-1
14-Pin Plastic TSSOP Type I
40
C to +125
C
74LV74 PW
74LV74PW DH
SOT402-1
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 13
1R
D,
2R
D
Asynchronous reset-direct input
(active-LOW)
2, 12
1D, 2D
Data inputs
3, 11
1CP, 2CP
Clock input (LOW-to-HIGH),
edge-triggered)
4, 10
1S
D,
2S
D
Asynchronous set-direct input
(active-LOW)
5, 9
1Q, 2Q
True flip-flop outputs
6, 8
1Q
,
2Q
Complement flip-flop outputs
7
GND
Ground (0V)
14
V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS
OUTPUTS
S
D
R
D
CP
D
Q
Q
L
H
L
H
L
L
X
X
X
X
X
X
H
L
H
L
H
H
INPUTS
OUTPUTS
S
D
R
D
CP
D
Q
n+1
Q
n+1
H
H
H
H
L
H
L
H
H
L
H
= HIGH voltage level
L
= LOW voltage level
X
= don't care
= LOW-to-HIGH CP transition
Q
n+1
= state after the next LOW-to-HIGH CP transition
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
3
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1R
D
1S
D
1D
1CP
1Q
1Q
GND
V
CC
2D
2CP
2S
D
2Q
2Q
2R
D
SV00330
LOGIC SYMBOL (IEEE/IEC)
SV00332
4
3
2
1
10
11
12
13
5
6
9
8
S
C1
1D
R
S
C2
2D
R
LOGIC SYMBOL
SV00331
4
10
1S
D
2S
D
S
D
2 1D
1Q
5
12
2D
2Q
9
D
Q
CP
FF
11 2CP
Q
1Q
R
D
1R
D
2R
D
1
13
2Q
8
3 1CP
6
FUNCTIONAL DIAGRAM
2
3
CP FF1
D
Q
Q
1D
2
1CP
4
S
D
1
R
D
6
1Q
1Q
5
CP FF2
D
Q
Q
2D
12
2CP
11
10
13
8
2Q
9
S
D
R
D
Q
SV00333
1S
D
1R
D
2S
D
2R
D
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
4
LOGIC DIAGRAM (ONE FLIP-FLOP)
Q
Q
C
C
C
C
C
C
C
C
D
C
C
R
D
S
D
CP
SV00334
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNIT
V
CC
DC supply voltage
See Note1
1.0
3.3
5.5
V
V
I
Input voltage
0
V
CC
V
V
O
Output voltage
0
V
CC
V
T
amb
Operating ambient temperature range in free
air
See DC and AC
characteristics
40
40
+85
+125
C
t
r
, t
f
Input rise and fall times except for
Schmitt-trigger inputs
V
CC
= 1.0V to 2.0V
V
CC
= 2.0V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V to 5.5V
500
200
100
50
ns/V
NOTE:
1. The LV is guaranteed to function down to V
CC
= 1.0V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2V to V
CC
= 5.5V.
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0.5 or V
I
> V
CC
+ 0.5V
20
mA
I
OK
DC output diode current
V
O
< 0.5 or V
O
> V
CC
+ 0.5V
50
mA
I
O
DC output source or sink current
standard outputs
0.5V < V
O
< V
CC
+ 0.5V
25
mA
I
GND
,
I
CC
DC V
CC
or GND current for types with
standard outputs
50
mA
T
stg
Storage temperature range
65 to +150
C
Power dissipation per package
for temperature range: 40 to +125
C
P
t t
plastic DIL
above +70
C derate linearly with 12mW/K
750
mW
P
tot
plastic mini-pack (SO)
above +70
C derate linearly with 8 mW/K
500
mW
plastic shrink mini-pack (SSOP and TSSOP)
above +60
C derate linearly with 5.5 mW/K
400
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
5
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
-40
C to +85
C
-40
C to +125
C
UNIT
MIN
TYP
1
MAX
MIN
MAX
V
CC
= 1.2V
0.9
0.9
V
IH
HIGH level Input
V
CC
= 2.0V
1.4
1.4
V
V
IH
voltage
V
CC
= 2.7 to 3.6V
2.0
2.0
V
V
CC
= 4.5 to 5.5V
0.7*V
CC
0.7*V
CC
V
CC
= 1.2V
0.3
0.3
V
IL
LOW level Input
V
CC
= 2.0V
0.6
0.6
V
V
IL
voltage
V
CC
= 2.7 to 3.6V
0.8
0.8
V
V
CC
= 4.5 to 5.5
0.3*V
CC
0.3*V
CC
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100
A
1.2
HIGH level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
1.8
2.0
1.8
V
OH
HIGH level output
voltage; all outputs
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100
A
2.5
2.7
2.5
V
voltage all out uts
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
2.8
3.0
2.8
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 100
A
4.3
4.5
4.3
V
OH
HIGH level output
voltage;
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 6mA
2.40
2.82
2.20
V
V
OH
g
STANDARD
outputs
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 12mA
3.60
4.20
3.50
V
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
LOW level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
OL
LOW level output
voltage; all outputs
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
voltage all out uts
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
OL
LOW level output
voltage;
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 6mA
0.25
0.40
0.50
V
V
OL
g
STANDARD
outputs
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 12mA
0.35
0.55
0.65
V
I
I
Input leakage
current
V
CC
= 5.5V; V
I
= V
CC
or GND
1.0
1.0
A
I
CC
Quiescent supply
current; flip-flops
V
CC
= 5.5V; V
I
= V
CC
or GND; I
O
= 0
20.0
80
A
I
CC
Additional
quiescent supply
current per input
V
CC
= 2.7V to 3.6V; V
I
= V
CC
0.6V
500
850
A
NOTE:
1. All typical values are measured at T
amb
= 25
C.
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
6
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
v
2.5ns; C
L
= 50pF; R
L
= 1K
SYMBOL
PARAMETER
WAVEFORM
CONDITION
LIMITS
40 to +85
C
LIMITS
40 to +125
C
UNIT
V
CC
(V)
MIN
TYP
1
MAX
MIN
MAX
1.2
70
Propagation delay
2.0
24
44
56
t
PHL/
t
PLH
Propagation delay
nCP to nQ, nQ
Figures, 1, 3
2.7
18
28
41
ns
nCP to nQ, nQ
3.0 to 3.6
13
2
26
33
4.5 to 5.5
9.5
3
17
23
1.2
90
Propagation delay
2.0
31
46
58
t
PHL/
t
PLH
Propagation delay
nS
D
to nQ, nQ
Figures 2, 3
2.7
23
34
43
ns
nS
D
to nQ, nQ
3.0 to 3.6
17
2
27
34
4.5 to 5.5
12
3
19
24
1.2
90
Propagation delay
2.0
31
46
58
t
PHL/
t
PLH
Propagation delay
nR
D
to nQ, nQ
Figures 2, 3
2.7
23
34
43
ns
nR
D
to nQ, nQ
3.0 to 3.6
17
2
27
34
4.5 to 5.5
12
3
19
24
2.0
34
10
41
t
W
Clock pulse width
Figure 1
2.7
25
8
30
ns
t
W
HIGH to LOW
Figure 1
3.0 to 3.6
20
7
2
24
ns
4.5 to 5.5
15
6
3
18
2.0
34
10
41
t
W
Set or reset pulse
Figure 2
2.7
25
8
30
ns
t
W
width LOW
Figure 2
3.0 to 3.6
20
7
2
24
ns
4.5 to 5.5
15
6
3
18
1.2
5
Removal time
2.0
14
2
15
t
rem
Removal time
set or reset
Figure 2
2.7
10
1
11
ns
set or reset
3.0 to 3.6
8
1
2
9
4.5 to 5.5
6
1
3
7
1.2
10
Set up time
2.0
22
4
26
t
su
Set-up time
nD to nCP
Figure 1
2.7
12
3
15
ns
nD to nCP
3.0 to 3.6
8
2
2
10
4.5 to 5.5
6
1
2
8
1.2
10
Hold time
2.0
3
2
3
t
h
Hold time
nD to nCP
Figure 1
2.7
3
2
3
ns
nD to nCP
3.0 to 3.6
3
2
2
3
4.5 to 5.5
3
2
3
3
2.0
14
40
12
f
Maximum clock
Figure 1
2.7
50
90
40
MHz
f
max
pulse frequency
Figure 1
3.0 to 3.6
60
100
2
48
MHz
4.5 to 5.5
70
110
3
56
NOTE:
1. Unless otherwise stated, all typical values are at T
amb
= 25
C.
2. Typical value measured at V
CC
= 3.3V.
3. Typical value measured at V
CC
= 5.0V.
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
7
AC WAVEFORMS
V
M
= 1.5V at V
CC
w
2.7V
v
3.6V
V
M
= 0.5 * V
CC
at V
CC
t
2.7V and
w
4.5V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
nQ OUTPUT
VM
nD INPUT
nCP INPUT
nQ OUTPUT
V
M
V
M
V
M
t
su
1/f
max
t
h
t
h
t
PHL
t
PHL
t
PLH
t
PLH
t
W
GND
GND
V
I
V
I
V
OL
V
OL
V
OH
V
OH
t
su
SV00335
Figure 1.The clock (nCP) to output (nQ, nQ) propagation
delays, the clock pulse width, the nD to nCP setup times, the
nCP to nD hold times, the output transition times and the
maximum clock pulse frequency
NOTE:
The shaded areas indicate when the input is permitted to change for
predictable output performance.
nCP INPUT
nS
D
INPUT
nR
D
INPUT
nQ OUTPUT
nQ OUTPUT
GND
GND
GND
V
I
V
I
V
I
V
OL
V
OL
V
OH
V
OH
V
M
V
M
V
M
V
M
t
rem
t
PHL
t
PLH
t
W
t
W
V
M
t
PLH
t
PHL
SV00336
Figure 2.The set (nS
D
) and reset (nR
D
) input to output (nQ, nQ)
propagation delays, the set and reset pulse widths and the nR
D
to nCP removal time
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
l
D.U.T.
V
O
C
L
R
L
= 1k
V
cc
Test Circuit for Outputs
DEFINITIONS
V
CC
V
I
< 2.7V
2.73.6V
V
CC
2.7V
TEST
t
PLH/
t
PHL
4.5 V
V
CC
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitiance
50pF
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
SV00902
Figure 3. Load circuitry for switching times
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
8
DIP14:
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
9
SO14:
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
10
SSOP14:
plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
11
TSSOP14:
plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Date of release: 05-96
Document order number:
9397-750-04414
Philips
Semiconductors
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