Philips
Semiconductors
74LVC02A
Quad 2-input NOR gate
Product specification
Supersedes data of 1997 Aug 11
IC24 Data Handbook
1998 Apr 28
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
2
1998 Apr 28
853-2019 19310
FEATURES
Wide supply range of 1.2V to 3.6V
Complies with JEDEC standard no. 8-1A
Inputs accept voltages up to 5.5V
CMOS low power consumption
Direct interface with TTL levels
5-volt tolerant inputs, for interfacing with 5-volt logic
DESCRIPTION
The 74LVC02A is a high performance, low-power, low-voltage,
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
The 74LVC02A provides the 2-input NOR function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
v
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
t
PLH
Propagation delay
nA, nB to nY
C
L
= 50 pF;
V
CC
= 3.3 V
2.8
ns
C
I
Input capacitance
5.0
pF
C
PD
Power dissipation capacitance per gate
Notes 1 and 2
28
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
f
i
)
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
14-Pin Plastic SO
40
C to +85
C
74LVC02A D
74LVC02A D
SOT108-1
14-Pin Plastic SSOP Type II
40
C to +85
C
74LVC02A DB
74LVC02A DB
SOT337-1
14-Pin Plastic TSSOP Type I
40
C to +85
C
74LVC02A PW
74LVC02APW DH
SOT402-1
PIN CONFIGURATION
SV00389
1
2
3
4
5
6
7
1Y
1A
1B
2Y
2A
2B
GND
V
CC
4Y
4B
4A
3Y
3B
3A
8
9
10
11
12
13
14
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
1, 4, 10, 13
1Y 4Y
Data outputs
2, 5, 8, 11
1A 4A
Data inputs
3, 6, 9, 12
1B 4B
Data inputs
7
GND
Ground (0 V)
14
V
CC
Positive supply voltage
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
1998 Apr 28
3
LOGIC SYMBOL
1A
1B
2A
2B
4B
4A
3B
3A
1Y
2Y
3Y
4Y
2
3
5
6
12
11
9
8
1
4
13
10
SV00390
LOGIC SYMBOL (IEEE/IEC)
2
5
8
11
3
6
9
12
1
4
10
13
1
SV00391
1
1
1
LOGIC DIAGRAM (ONE GATE)
Y
B
A
SV00820
FUNCTION TABLE
INPUTS
OUTPUTS
nA
nB
nY
L
L
H
L
H
L
H
L
L
H
H
L
NOTES:
H = HIGH voltage level
L = LOW voltage level
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
V
CC
DC supply voltage (for max. speed performance)
2.7
3.6
V
V
CC
DC supply voltage (for low-voltage applications)
1.2
3.6
V
V
I
DC Input voltage range
0
5.5
V
V
O
DC output voltage range
0
V
CC
V
T
amb
Operating ambient temperature range in free-air
40
+85
C
t
r
, t
f
Input rise and fall times
V
CC
= 1.2 to 2.7V
V
CC
= 2.7 to 3.6V
0
0
20
10
ns/V
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
1998 Apr 28
4
ABSOLUTE MAXIMUM RATINGS
1
Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage (for max. speed
performance)
0.5 to +6.5
V
I
IK
DC input diode current
V
I
t
0
50
mA
V
I
DC input voltage
Note 2
0.5 to +5.5
V
I
OK
DC output diode current
V
O
u
V
CC
or V
O
t
0
"
50
mA
V
O
DC output voltage
Note 2
0.5 to V
CC
+ 0.5
V
I
O
DC output source or sink current
V
O
= 0 to V
CC
"
50
mA
I
GND
, I
CC
DC V
CC
or GND current
"
100
mA
T
stg
Storage temperature range
65 to +150
C
Power dissipation per package
P
TOT
plastic mini-pack (SO)
above +70
C derate linearly with 8 mW/K
500
mW
plastic shrink mini-pack (SSOP and TSSOP)
above +60
C derate linearly with 5.5 mW/K
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
HIGH level Input voltage
V
CC
= 1.2V
V
CC
V
V
IH
HIGH level Input voltage
V
CC
= 2.7 to 3.6V
2.0
V
V
LOW level Input voltage
V
CC
= 1.2V
GND
V
V
IL
LOW level Input voltage
V
CC
= 2.7 to 3.6V
0.8
V
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
V
CC
*
0.5
V
O
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100
A
V
CC
*
0.2
V
CC
V
V
OH
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 18mA
V
CC
*
0.6
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
V
CC
*
0.8
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
0.40
V
OL
LOW level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100
A
0.20
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
0.55
I
Input leakage current
V
CC
= 3 6V; V = 5 5V or GND
"
0 1
"
5
A
I
I
Input leakage current
V
CC
= 3.6V; V
I
= 5.5V or GND
"
0.1
"
5
A
I
CC
Quiescent supply current
V
CC
= 3.6V; V
I
= V
CC
or GND; I
O
= 0
0.1
10
A
I
CC
Additional quiescent supply current
per input pin
V
CC
= 2.7V to 3.6V; V
I
= V
CC
0.6V; I
O
= 0
5
500
A
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
1998 Apr 28
5
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
v
2.5 ns; C
L
= 50 pF
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V
0.3V
V
CC
= 2.7V
V
CC
= 1.2V
UNIT
MIN
TYP
1
MAX
MIN
TYP
1
MAX
TYP
t
PHL
/t
PLH
Propagation delay
nA, nB to nY
Figures 1, 2
1.5
2.8
4.6
1.5
3.2
5.6
11
ns
NOTE:
1. These typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC WAVEFORMS
V
M
= 1.5 V at V
CC
w
2.7 V
V
M
= 0.5
S
V
CC
at V
CC
< 2.7 V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
SV00392
V
I
nA, nB, INPUT
GND
V
OH
nY OUTPUT
V
OL
V
M
t
PHL
t
PLH
V
M
Waveform 1. Input (nA, nB) to output (nY) propagation delays.
TEST CIRCUIT
PULSE
GENERATOR
V
I
R
T
D.U.T.
V
O
C
L
50pF
S
1
2
<
V
CC
Open
GND
500
500
V
CC
V
I
t
2.7V
V
CC
2.7V 3.6V
2.7V
Test
S
1
t
PLH
/t
PHL
Open
V
CC
SY00077
Waveform 2. Load circuitry for switching times.
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
1998 Apr 28
6
SO14:
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
1998 Apr 28
7
SSOP14:
plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
1998 Apr 28
8
TSSOP14:
plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
1998 Apr 28
9
NOTES
Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
yyyy mmm dd
10
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
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Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Date of release: 05-96
Document order number:
9397-750-04477
Philips
Semiconductors
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