Philips
Semiconductors
74LVC32A
Quad 2-input OR gate
Product specification
IC24 Data Handbook
1997 Jun 30
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74LVC32A
Quad 2-input OR gate
2
1997 Jun 30
853-1995 18166
FEATURES
Wide supply voltage range of 1.2 V to 3.6 V
In accordance with JEDEC standard no. 8-1A.
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
DESCRIPTION
The 74LVC32A is a high-performance, low-power, low-voltage
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5V devices. This feature
allows the use of these devices as translators in a mixed 3.3V/5V
environment.
The 74LVC32A provides the 2-input OR function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nA, nB to nY
C
L
= 50 pF;
V
CC
= 3.3 V
2.6
ns
C
I
Input capacitance
5.0
pF
C
PD
Power dissipation capacitance per gate
Notes 1 and 2
28
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
f
i
)
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
14-Pin Plastic SO
40
C to +85
C
74LVC32A D
74LVC32A D
SOT108-1
14-Pin Plastic SSOP Type II
40
C to +85
C
74LVC32A DB
74LVC32A DB
SOT337-1
14-Pin Plastic TSSOP Type I
40
C to +85
C
74LVC32A PW
74LVC32APW DH
SOT402-1
PIN CONFIGURATION
1
2
3
4
5
6
7
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
14
13
12
11
10
9
8
SV00450
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 4, 9, 12
1A 4A
Data inputs
2, 5, 10, 13
1B 4B
Data inputs
3, 6, 8, 11
1Y 4Y
Data outputs
7
GND
Ground (0 V)
14
V
CC
Positive supply voltage
Philips Semiconductors
Product specification
74LVC32A
Quad 2-input OR gate
1997 Jun 30
3
LOGIC SYMBOL
1A
1B
2A
2B
4B
4A
3B
3A
1Y
2Y
3Y
4Y
1
2
4
5
13
12
10
9
3
6
11
8
SV00452
LOGIC SYMBOL (IEEE/IEC)
1
4
9
12
2
5
10
13
3
6
8
11
1
1
1
1
SV00453
LOGIC DIAGRAM (ONE GATE)
A
B
Y
SV00454
FUNCTION TABLE
INPUTS
OUTPUTS
nA
nB
nY
L
L
L
L
H
H
H
L
H
H
H
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
Philips Semiconductors
Product specification
74LVC32A
Quad 2-input OR gate
1997 Jun 30
4
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
V
CC
DC supply voltage (for max. speed performance)
2.7
3.6
V
V
CC
DC supply voltage (for low-voltage applications)
1.2
3.6
V
V
I
DC input voltage range
0
5.5
V
V
O
DC output voltage range; output HIGH or LOW state
0
V
CC
V
T
amb
Operating ambient temperature range in free-air
40
+85
C
t
r
, t
f
Input rise and fall times
V
CC
= 1.2 to 2.7V
V
CC
= 2.7 to 3.6V
0
0
20
10
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +6.5
V
I
IK
DC input diode current
V
I
t
0
50
mA
V
I
DC input voltage
Note 2
0.5 to +6.5
V
I
OK
DC output diode current
V
O
u
V
CC
or V
O
t
0
"
50
mA
V
O
DC output voltage; output HIGH or LOW state
Note 2
0.5 to V
CC
+0.5
V
I
O
DC output source or sink current
V
O
= 0 to V
CC
"
50
mA
I
GND
, I
CC
DC V
CC
or GND current
"
100
mA
T
stg
Storage temperature range
65 to +150
C
Power dissipation per package
P
TOT
plastic mini-pack (SO)
above +70
C derate linearly with 8 mW/K
500
mW
plastic shrink mini-pack (SSOP and TSSOP)
above +60
C derate linearly with 5.5 mW/K
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors
Product specification
74LVC32A
Quad 2-input OR gate
1997 Jun 30
5
DC CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
HIGH level Input voltage
V
CC
= 1.2V
V
CC
V
V
IH
HIGH level Input voltage
V
CC
= 2.7 to 3.6V
2.0
V
V
LOW level Input voltage
V
CC
= 1.2V
GND
V
V
IL
LOW level Input voltage
V
CC
= 2.7 to 3.6V
0.8
V
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
V
CC
*
0.5
V
O
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100
A
V
CC
*
0.2
V
CC
V
V
OH
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 18mA
V
CC
*
0.6
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
V
CC
*
0.8
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
0.40
V
OL
LOW level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100
A
0.20
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
0.55
I
Input leakage current
V
CC
= 3 6V; V = 5 5V or GND
"
0 1
"
5
A
I
I
Input leakage current
V
CC
= 3.6V; V
I
= 5.5V or GND
"
0.1
"
5
A
I
CC
Quiescent supply current
V
CC
= 3.6V; V
I
= V
CC
or GND; I
O
= 0
0.1
10
A
I
CC
Additional quiescent supply current per
input pin
V
CC
= 2.7V to 3.6V; V
I
= V
CC
0.6V; I
O
= 0
5
500
A
NOTE:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
v
2.5 ns; C
L
= 50 pF
LIMITS
SYMBOL
PARAMETER
WAVEFORMS
V
CC
= 3.3V
0.3V
V
CC
= 2.7V
V
CC
= 1.2V
UNIT
MIN
TYP
1
MAX
MIN
TYP
MAX
TYP
t
PHL
/
t
PLH
Propagation delay
nA, nB to nY
1, 2
1.5
2.6
4.9
1.5
3.0
5.9
16
ns
NOTE:
1. These typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC WAVEFORMS
V
M
= 1.5 V at V
CC
w
2.7 V
V
M
= 0.5
S
V
CC
at V
CC
< 2.7 V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
SV00414
VM
nA, nB INPUT
nY OUTPUT
VM
tPLH
t PHL
GND
V
l
VOL
VOH
Waveform 1. Input (nA, nB) to output (nY) propagation delays.
TEST CIRCUIT
PULSE
GENERATOR
V
I
R
T
D.U.T.
V
O
C
L
50pF
S
1
2
<
V
CC
Open
GND
500
500
V
CC
V
I
t
2.7V
V
CC
2.7V 3.6V
2.7V
Test
S
1
t
PLH
/t
PHL
Open
V
CC
SY00077
Waveform 2. Load circuitry for switching times.
PDF 
ZIP