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Электронный компонент: 74LVC3GU04

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1.
General description
The 74LVC3GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device
superior to most advanced CMOS compatible TTL families.
Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these
devices in a mixed 3.3 V and 5 V environment.
The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered
output.
2.
Features
s
Wide supply voltage range from 1.65 V to 5.5 V
s
5 V tolerant input/output for interfacing with 5 V logic
s
High noise immunity
s
Complies with JEDEC standard:
x
JESD8-7 (1.65 V to 1.95 V)
x
JESD8-5 (2.3 V to 2.7 V)
x
JESD8-B/JESD36 (2.7 V to 3.6 V).
s
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V.
s
24 mA output drive at V
CC
= 3.0 V
s
CMOS low power consumption
s
Latch-up performance exceeds 250 mA
s
Multiple package options
s
Specified from
-
40
C to +85
C and from
-
40
C to +125
C.
74LVC3GU04
Triple inverter
Rev. 03 -- 01 February 2005
Product data sheet
9397 750 14546
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
2 of 16
Philips Semiconductors
74LVC3GU04
Triple inverter
3.
Quick reference data
[1]
C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
N +
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of outputs.
[2]
The condition is V
I
= GND to V
CC
.
4.
Ordering information
5.
Marking
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
C.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
t
PHL
, t
PLH
propagation delay
inputs nA to outputs nY
C
L
= 30 pF; R
L
= 1 k
;
V
CC
= 1.8 V
-
2.3
-
ns
C
L
= 30 pF; R
L
= 500
;
V
CC
= 2.5 V
-
1.8
-
ns
C
L
= 50 pF; R
L
= 500
;
V
CC
= 2.7 V
-
2.6
-
ns
C
L
= 50 pF; R
L
= 500
;
V
CC
= 3.3 V
-
2.3
-
ns
C
L
= 50 pF; R
L
= 500
;
V
CC
= 5.0 V
-
1.7
-
ns
C
I
input capacitance
-
5
-
pF
C
PD
power dissipation
capacitance per gate
V
CC
= 3.3 V
[1] [2]
-
7
-
pF
Table 2:
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74LVC3GU04DP
-
40
C to +125
C
TSSOP8
plastic thin shrink small outline package; 8 leads; body
width 3 mm; lead length 0.5 mm
SOT505-2
74LVC3GU04DC
-
40
C to +125
C
VSSOP8
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
SOT765-1
74LVC3GU04GT
-
40
C to +125
C
XSON8
plastic extremely thin small outline package; no leads;
8 terminals; body 1
1.95
0.5 mm
SOT833-1
Table 3:
Marking codes
Type number
Marking code
74LVC3GU04DP
VU04
74LVC3GU04DC
VU4
74LVC3GU04GT
VU4
9397 750 14546
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
3 of 16
Philips Semiconductors
74LVC3GU04
Triple inverter
6.
Functional diagram
7.
Pinning information
7.1 Pinning
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
mna720
1A
1Y
1
7
2A
2Y
3
5
3A
3Y
6
2
7
1
1
1
5
3
mna721
1
2
6
mna636
A
Y
100
V
CC
V
CC
Fig 4.
Pin configuration TSSOP8 and
VSSOP8
Fig 5.
Pin configuration XSON8
U04
1A
V
CC
3Y
1Y
2A
3A
GND
2Y
mnb120
1
2
3
4
6
5
8
7
U04
3A
1Y
V
CC
2Y
2A
3Y
1A
GND
001aac021
3
6
2
7
1
8
4
5
Transparent top view
9397 750 14546
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
4 of 16
Philips Semiconductors
74LVC3GU04
Triple inverter
7.2 Pin description
8.
Functional description
8.1 Function table
[1]
H = HIGH voltage level;
L = LOW voltage level.
9.
Limiting values
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Table 4:
Pin description
Symbol
Pin
Description
1A
1
data input
3Y
2
data output
2A
3
data input
GND
4
ground (0 V)
2Y
5
data output
3A
6
data input
1Y
7
data output
V
CC
8
supply voltage
Table 5:
Function table
[1]
Input nA
Output nY
L
H
H
L
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
V
CC
supply voltage
-
0.5
+6.5
V
V
I
input voltage
[1]
-
0.5
+6.5
V
V
O
output voltage
active mode
[1]
-
0.5
V
CC
+ 0.5
V
I
IK
input diode current
V
I
< 0 V
-
-
50
mA
I
OK
output diode current
V
O
> V
CC
or V
O
< 0 V
-
50
mA
I
O
output source or sink
current
V
O
= 0 V to V
CC
-
50
mA
I
CC
, I
GND
V
CC
or GND current
-
100
mA
T
stg
storage temperature
-
65
+150
C
P
tot
power dissipation
T
amb
=
-
40
C to +125
C
-
300
mW
9397 750 14546
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
5 of 16
Philips Semiconductors
74LVC3GU04
Triple inverter
10. Recommended operating conditions
11. Static characteristics
Table 7:
Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
CC
supply voltage
1.65
-
5.5
V
V
I
input voltage
0
-
5.5
V
V
O
output voltage
active mode
0
-
V
CC
V
Power-down mode;
V
CC
= 0 V
0
-
5.5
V
T
amb
ambient temperature
-
40
-
+125
C
t
r
, t
f
input rise and fall times V
CC
= 1.65 V to 2.7 V
0
-
20
ns/V
V
CC
= 2.7 V to 5.5 V
0
-
10
ns/V
Table 8:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
T
amb
=
-
40
C to +85
C
[1]
V
IH
HIGH-level input voltage
V
CC
= 1.65 V to 5.5 V
0.75
V
CC
-
-
V
V
IL
LOW-level input voltage
V
CC
= 1.65 V to 5.5 V
-
-
0.25
V
CC
V
V
OH
HIGH-level output voltage
V
I
= V
IH
or V
IL
I
O
=
-
100
A;
V
CC
= 1.65 V to 5.5 V
V
CC
-
0.1
-
-
V
I
O
=
-
4 mA; V
CC
= 1.65 V
1.2
-
-
V
I
O
=
-
8 mA; V
CC
= 2.3 V
1.9
-
-
V
I
O
=
-
12 mA; V
CC
= 2.7 V
2.2
-
-
V
I
O
=
-
24 mA; V
CC
= 3.0 V
2.3
-
-
V
I
O
=
-
32 mA; V
CC
= 4.5 V
3.8
-
-
V
V
OL
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 100
A;
V
CC
= 1.65 V to 5.5 V
-
-
0.1
V
I
O
= 4 mA; V
CC
= 1.65 V
-
-
0.45
V
I
O
= 8 mA; V
CC
= 2.3 V
-
-
0.3
V
I
O
= 12 mA; V
CC
= 2.7 V
-
-
0.4
V
I
O
= 24 mA; V
CC
= 3.0 V
-
-
0.55
V
I
O
= 32 mA; V
CC
= 4.5 V
-
-
0.55
V
I
LI
input leakage current
V
I
= 5.5 V or GND;
V
CC
= 5.5 V
-
0.1
5
A
I
CC
quiescent supply current
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
-
0.1
10
A
C
I
input capacitance
-
5
-
pF