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Электронный компонент: 74LVC4066

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DATA SHEET
Product specification
2003 Aug 12
INTEGRATED CIRCUITS
74LVC4066
Quad bilateral switches
2003 Aug 12
2
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
FEATURES
Very low ON resistance:
7.5
(typical) at V
CC
= 2.7 V
6.5
(typical) at V
CC
= 3.3 V
6
(typical) at V
CC
= 5 V.
ESD protection:
HBM EIA/JESD22-A114-A Exceeds 2000 V
MM EIA/JESD22-A115-A Exceeds 200 V.
High noise immunity
CMOS low power consumption
Latch up performance exceeds 250 mA
Complies with JEDEC standard no. 8-1A
Direct interface TTL-levels.
DESCRIPTION
The 74LVC4066 is a high-speed Si-gate CMOS device.
The 74LVC4066 has four independent analog switches.
Each switch has two input/output terminals (nY and nZ)
and an active HIGH enable input (nE). When nE is LOW,
the analog switch is turned off.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
2.5 ns.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
N + ((C
L
+ C
S
)
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
C
S
= switch capacitance.
2. The condition is V
I
= GND to V
CC
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PZH
/t
PZL
turn-on time E to V
os
C
L
= 50 pF; R
L
= 500
; V
CC
= 3 V
2.5
ns
C
L
= 50 pF; R
L
= 500
; V
CC
= 5 V
1.9
ns
t
PHZ
/t
PLZ
turn-off time E to V
os
C
L
= 50 pF; R
L
= 500
; V
CC
= 3 V
3.4
ns
C
L
= 50 pF; R
L
= 500
; V
CC
= 5 V
2.5
ns
C
I
input capacitance
V
CC
= 3 V
3.5
pF
C
PD
power dissipation capacitance
V
CC
= 3.3 V; notes 1 and 2
12.5
pF
C
S
switch capacitance
OFF-state
8.0
pF
ON-state
14.0
pF
2003 Aug 12
3
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
INPUT nE
SWITCH
L
OFF
H
ON
TYPE NUMBER
PACKAGE
TEMPERATURE
RANGE
PINS
PACKAGE
MATERIAL
CODE
74LVC4066D
-
40 to +125
C
14
SO14
plastic
SOT108-2
74LVC4066PW
-
40 to +125
C
14
TSSOP14
plastic
SOT402-1
74LVC4066BQ
-
40 to +125
C
14
DHVQFN14
plastic
SOT762-1
PINNING
PIN
SYMBOL
DESCRIPTION
1
1Y
independent input/output
2
1Z
independent output/input
3
2Z
independent output/input
4
2Y
independent input/output
5
2E
enable input (active HIGH)
6
3E
enable input (active HIGH)
7
GND
ground (0 V)
8
3Y
independent input/output
9
3Z
independent output/input
10
4Z
independent output/input
11
4Y
independent input/output
12
4E
enable input (active HIGH)
13
1E
enable input (active HIGH)
14
V
CC
supply voltage
handbook, halfpage
MNB109
1
2
3
4
5
6
7
8
14
13
12
11
10
9
1Y
1Z
2Z
2Y
4066
2E
3E
GND
3Y
3Z
4Z
4Y
4E
1E
VCC
Fig.1 Pin configuration SO14 and TSSOP14.
2003 Aug 12
4
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, halfpage
1
14
GND
(1)
1Y
VCC
7
2
3
4
5
6
1Z
2Z
2Y
2E
3E
13
12
11
10
9
1E
4E
4Y
4Z
3Z
8
GND
Top view
3Y
MNB110
Fig.2 Pin configuration DHVQFN14.
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
handbook, halfpage
MNB111
1Y
1Z
1
2
2Y
2Z
4
3
1E
13
3Y
3Z
8
9
4Y
4Z
11
10
3E
6
4E
12
2E
5
Fig.3 Logic symbol.
MNB112
1
2
13
#
4
3
5
#
8
9
6
#
11
10
(a)
12
#
1
2
13
1
X1
1
X1
1
X1
1
1
1
1
1
X1
#
4
3
5
#
8
9
6
#
11
10
(b)
12
#
Fig.4 logic symbol (IEEE/IEC).
handbook, halfpage
MNA658
VCC
E
Y
Z
Fig.5 Logic diagram (one switch).
2003 Aug 12
5
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V);
see note 1.
Notes
1. To avoid drawing V
CC
current out of terminal Z, when switch current flows in terminal Y, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no V
CC
current will flow out of
terminal Y. In this case there is no limit for the voltage drop across the switch, but the voltage at Y and Z may not
exceed V
CC
or GND.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3. For SO14 packages: above 70
C derate linearly with 8 mW/K.
For TSSOP14 packages: above 60
C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60
C derate linearly with 4.5 mW/K.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
1.65
5.5
V
V
I
input voltage
0
5.5
V
V
S
switch voltage
0
V
CC
V
T
amb
operating ambient temperature
-
40
+125
C
t
r
, t
f
input rise and fall times
V
CC
= 1.65 to 2.7 V
0
20
ns/V
V
CC
= 2.7 to 5.5 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
-
0.5
+6.5
V
V
I
input voltage
note 2
-
0.5
+6.5
V
I
IK
input diode current
V
I
<
-
0.5 V or V
I
> V
CC
+ 0.5 V
-
-
50
mA
I
SK
switch diode current
V
I
<
-
0.5 V or V
I
> V
CC
+ 0.5 V
-
50
mA
V
S
switch voltage
enable and disable mode
-
0.5
+6.5
V
I
S
switch source or sink current
-
0.5 < V
S
< V
CC
+ 0.5 V
-
50
mA
I
CC
, I
GND
V
CC
or GND current
-
100
mA
T
stg
storage temperature
-
65
+150
C
P
tot
power dissipation
T
amb
=
-
40 to +125
C; note 3
-
500
mW
2003 Aug 12
6
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
DC CHARACTERISTICS
At recommended operating conditions; voltage are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
OTHER
V
CC
(V)
T
amb
=
-
40 to +85
C; note 1
V
IH
HIGH-level input
voltage
1.65 to 1.95
0.65V
CC
-
-
V
2.3 to 2.7
1.7
-
-
V
2.7 to 3.6
2.0
-
-
V
4.5 to 5.5
0.7V
CC
-
-
V
V
IL
LOW-level input
voltage
1.65 to 1.95
-
-
0.35V
CC
V
2.3 to 2.7
-
-
0.7
V
2.7 to 3.6
-
-
0.8
V
4.5 to 5.5
-
-
0.30V
CC
V
I
LI
input leakage current
(control pin)
V
I
= 5.5 V or GND
5.5
-
0.1
5
A
I
S(OFF)
analog switch
OFF-state current
V
I
= V
IH
or V
IL
;
|V
S
| = V
CC
-
GND; see Fig.7
5.5
-
0.1
5
A
I
S(ON)
analog switch
ON-state current
V
I
= V
IH
or V
IL
;
|V
S
| = V
CC
-
GND; see Fig.8
5.5
-
0.1
5
A
I
CC
quiescent supply
current
V
I
= V
CC
or GND;
V
S
= GND or V
CC
; I
O
= 0 A
5.5
-
0.1
10
A
I
CC
additional quiescent
supply current per
control pin
V
I
= V
CC
-
0.6 V;
V
S
= GND or V
CC
; I
O
= 0 A
5.5
-
5
500
A
2003 Aug 12
7
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
Note
1. All typical values are measured at T
amb
= 25
C.
T
amb
=
-
40 to +125
C
V
IH
HIGH-level input
voltage
1.65 to 1.95
0.65V
CC
-
-
V
2.3 to 2.7
1.7
-
-
V
2.7 to 3.6
2.0
-
-
V
4.5 to 5.5
0.7V
CC
-
-
V
V
IL
LOW-level input
voltage
1.65 to 1.95
-
-
0.35V
CC
V
2.3 to 2.7
-
-
0.7
V
2.7 to 3.6
-
-
0.8
V
4.5 to 5.5
-
-
0.30V
CC
V
I
LI
input leakage current
(control pin)
V
I
= 5.5 V or GND
5.5
-
-
20
A
I
S(OFF)
analog switch
OFF-state current
V
I
= V
IH
or V
IL
;
|V
S
| = V
CC
-
GND; see Fig.7
5.5
-
-
20
A
I
S(ON)
analog switch
ON-state current
V
I
= V
IH
or V
IL
;
|V
S
| = V
CC
-
GND; see Fig.8
5.5
-
-
20
A
I
CC
quiescent supply
current
V
I
= V
CC
or GND;
V
S
= GND or V
CC
; I
O
= 0 A
5.5
-
-
40
A
I
CC
additional quiescent
supply current per
control pin
V
I
= V
CC
-
0.6 V;
V
S
= GND or V
CC
; I
O
= 0 A
5.5
-
-
5000
A
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
OTHER
V
CC
(V)
2003 Aug 12
8
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
Resistance R
ON
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
OTHER
I
S
(mA)
V
CC
(V)
T
amb
=
-
40 to +85
C; note 1; see Fig.6
R
ON(peak)
ON-resistance
(peak)
V
S
= GND to V
CC
;
V
I
= V
IH
4
1.65 to 1.95
-
35
100
8
2.3 to 2.7
-
14
30
12
2.7
-
11.5
25
24
3.0 to 3.6
-
8.5
20
32
4.5 to 5.5
-
6.5
15
R
ON(rail)
ON-resistance (rail)
V
S
= GND; V
I
= V
IH
4
1.65 to 1.95
-
10
30
8
2.3 to 2.7
-
8.5
20
12
2.7
-
7.5
18
24
3.0 to 3.6
-
6.5
15
32
4.5 to 5.5
-
6
10
V
S
= V
CC
; V
I
= V
IH
4
1.65 to 1.95
-
12
30
8
2.3 to 2.7
-
8.5
20
12
2.7
-
7.5
18
24
3.0 to 3.6
-
6.5
15
32
4.5 to 5.5
-
6
10
R
ON(flatness)
ON-resistance
(flatness)
V
S
= GND to V
CC
;
V
I
= V
IH
;
see Figs.10 to 13
4
1.8
-
100
-
8
2.5
-
17
-
12
2.7
-
10
-
24
3.3
-
5
-
32
5.0
-
3
-
2003 Aug 12
9
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
Note
1. Typical value R
on(flatness)
is measured at T
amb
=
-
40 to +85
C, all other typical values are measured at T
amb
= 25
C.
T
amb
=
-
40 to +125
C; see Fig.6
R
ON(peak)
ON-resistance
(peak)
V
S
= GND to V
CC
;
V
I
= V
IH
4
1.65 to 1.95
-
-
150
8
2.3 to 2.7
-
-
45
12
2.7
-
-
38
24
3.0 to 3.6
-
-
30
32
4.5 to 5.5
-
-
23
R
ON(rail)
ON-resistance (rail)
V
S
= GND; V
I
= V
IH
4
1.65 to 1.95
-
-
45
8
2.3 to 2.7
-
-
30
12
2.7
-
-
27
24
3.0 to 3.6
-
-
23
32
4.5 to 5.5
-
-
15
V
S
= V
CC
; V
I
= V
IH
4
1.65 to 1.95
-
-
45
8
2.3 to 2.7
-
-
30
12
2.7
-
-
27
24
3.0 to 3.6
-
-
23
32
4.5 to 5.5
-
-
15
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
OTHER
I
S
(mA)
V
CC
(V)
2003 Aug 12
10
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
MNA659
V
Y
Z
IS
VS = GND to VCC
E
VIH
GND
GND
Fig.6
Test circuit for measuring ON-state
resistance (R
ON
).
MNA660
A
A
Y
E
Z
VI = VCC or GND
VO = GND or VCC
VIL
GND
Fig.7 Test circuit for measuring OFF-state current.
MNA661
A
A
Y
E
Z
VI = VCC or GND
VO (open circuit)
VIH
GND
Fig.8 Test circuit for measuring ON-state current.
handbook, halfpage
5
0
1
2
3
4
VI (V)
RON
(
)
10
2
10
1
MNA673
VCC = 1.8 V
2.5 V
2.7 V
3.3 V
5.0 V
Fig.9
Typical ON-resistance (R
ON
) as a function
of input voltage (V
S
) for V
S
= GND to V
CC
.
2003 Aug 12
11
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, halfpage
0
0
1
3
15
5
10
2
Vl (V)
RON
(
)
MNA663
Tamb =
+
85
C
+
25
C
-
40
C
Fig.10 R
ON
for V
CC
= 2.5 V.
handbook, halfpage
0
0
1
3
15
5
10
2
Vl (V)
RON
(
)
MNA664
Tamb =
+
85
C
+
25
C
-
40
C
Fig.11 R
ON
for V
CC
= 2.7 V.
handbook, halfpage
0
1
2
4
10
0
8
3
6
4
2
MNA665
Vl (V)
RON
(
)
+
85
C
Tamb =
+
25
C
-
40
C
Fig.12 R
ON
for V
CC
= 3.3 V.
handbook, halfpage
0
5
8
2
4
6
3
5
7
1
2
3
4
MNA666
VI (V)
RON
(
)
Tamb =
+
85
C
+
25
C
-
40
C
Fig.13 R
ON
for V
CC
= 5.0 V.
2003 Aug 12
12
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
AC CHARACTERISTICS
GND = 0 V.
Notes
1. All typical values are measured at T
amb
= 25
C.
2. t
PHL
/t
PLH
propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and
the specified capacitance when driven by an ideal voltage source (zero output impedance).
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
WAVEFORMS
V
CC
(V)
T
amb
=
-
40 to +85
C; note 1
t
PHL
/t
PLH
propagation delay nY to nZ
or nZ to nY
see Figs 14 and 16;
note 2
1.65 to 1.95
-
0.8
2.0
ns
2.3 to 2.7
-
0.4
1.2
ns
2.7
-
0.4
1.0
ns
3.0 to 3.6
-
0.3
0.8
ns
4.5 to 5.5
-
0.2
0.6
ns
t
PZH
/t
PZL
turn-ON time E to V
OS
see Figs 15 and 16
1.65 to 1.95
1.0
5.3
10
ns
2.3 to 2.7
1.0
3.0
5.6
ns
2.7
1.0
2.6
5.0
ns
3.0 to 3.6
1.0
2.5
4.4
ns
4.5 to 5.5
1.0
1.9
3.9
ns
t
PHZ
/t
PLZ
turn-OFF time E to V
OS
see Figs 15 and 16
1.65 to 1.95
1.0
4.2
9.0
ns
2.3 to 2.7
1.0
2.4
5.5
ns
2.7
1.0
3.6
6.5
ns
3.0 to 3.6
1.0
3.4
6.0
ns
4.5 to 5.5
1.0
2.5
5.0
ns
T
amb
=
-
40 to +125
C
t
PHL
/t
PLH
propagation delay nY to nZ
or nZ to nY
see Figs 14 and 16;
note 2
1.65 to 1.95
-
-
3.0
ns
2.3 to 2.7
-
-
2.0
ns
2.7
-
-
1.5
ns
3.0 to 3.6
-
-
1.5
ns
4.5 to 5.5
-
-
1.0
ns
t
PZH
/t
PZL
turn-ON time E to V
OS
see Figs 15 and 16
1.65 to 1.95
1.0
-
12.5
ns
2.3 to 2.7
1.0
-
7.0
ns
2.7
1.0
-
6.5
ns
3.0 to 3.6
1.0
-
5.5
ns
4.5 to 5.5
1.0
-
5.0
ns
t
PHZ
/t
PLZ
turn-OFF time E to V
OS
see Figs 15 and 16
1.65 to 1.95
1.0
-
11.5
ns
2.3 to 2.7
1.0
-
7.0
ns
2.7
1.0
-
8.5
ns
3.0 to 3.6
1.0
-
7.5
ns
4.5 to 5.5
1.0
-
6.5
ns
2003 Aug 12
13
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
AC WAVEFORMS
handbook, halfpage
MNA667
tPHL
tPLH
VM
VM
Y or Z
Z or Y
GND
VI
VOH
VOL
Fig.14 The input (V
S
) to output (V
O
) propagation delays.
V
OL
and V
OH
are typical output voltage drop that occur with the output load.
V
CC
V
M
INPUT
V
I
t
r
= t
f
1.65 to 1.95 V
0.5V
CC
V
CC
2.0 ns
2.3 to 2.7 V
0.5V
CC
V
CC
2.0 ns
2.7 and 3.0 to 3.6 V 1.5 V
2.7 V
2.5 ns
4.5 to 5.5 V
0.5V
CC
V
CC
2.5 ns
2003 Aug 12
14
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, full pagewidth
MNA668
tPLZ
tPHZ
switch
disabled
switch
enabled
VY
VX
switch
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
E
Y or Z
Y or Z
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
Fig.15 Turn-on and turn-off times.
V
OL
and V
OH
are typical output voltage drop that occur with the output load.
V
X
= V
OL
+ 0.3 V at V
CC
2.7 V;
V
X
= V
OL
+ 0.1
V
CC
at V
CC
< 2.7 V;
V
Y
= V
OH
-
0.3 V at V
CC
2.7 V;
V
Y
= V
OH
-
0.1
V
CC
at V
CC
< 2.7 V.
V
CC
V
M
INPUT
V
I
t
r
= t
f
1.65 to 1.95 V
0.5V
CC
V
CC
2.0 ns
2.3 to 2.7 V
0.5V
CC
V
CC
2.0 ns
2.7 and 3.0 to 3.6 V
1.5 V
2.7 V
2.5 ns
4.5 to 5.5 V
0.5V
CC
V
CC
2.5 ns
2003 Aug 12
15
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, full pagewidth
VEXT
VCC
VI
VO
MNA616
D.U.T.
CL
RT
RL
RL
PULSE
GENERATOR
V
CC
V
I
C
L
R
L
V
EXT
t
PLH
/t
PHL
t
PZH
/t
PHZ
t
PZL
/t
PLZ
1.65 to 1.95 V
V
CC
30 pF
1 k
open
GND
2V
CC
2.3 to 2.7 V
V
CC
30 pF
500
open
GND
2V
CC
2.7 and 3.0 to 3.6 V 2.7 V
50 pF
500
open
GND
6 V
4.5 to 5.5 V
V
CC
50 pF
500
open
GND
2V
CC
Definitions for test circuits:
R
L
= Load resistor.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse generator.
Fig.16 Load circuitry for switching times.
ADDITIONAL AC CHARACTERISTICS
Recommended conditions and typical values at T
amb
= 25
C.
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
(V)
TYPICAL
UNIT
d
sin
sine-wave distortion
R
L
= 10 k
; C
L
= 50 pF; f
in
= 1 kHz;
see Fig.18
1.65
0.032
%
2.3
0.008
%
3
0.006
%
4.5
0.005
%
R
L
= 10 k
; C
L
= 50 pF;
f
in
= 10 kHz; see Fig.18
1.65
0.068
%
2.3
0.009
%
3
0.008
%
4.5
0.006
%
f
ON
switch ON signal frequency
response
R
L
= 600
; C
L
= 50 pF; see
Fig.17; note 1
1.65
170
MHz
2.3
210
MHz
3
212
MHz
4.5
215
MHz
R
L
= 50
; C
L
= 5 pF; see Fig.17;
note 1
1.65
> 500
MHz
2.3
> 500
MHz
3
> 500
MHz
4.5
> 500
MHz
2003 Aug 12
16
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
Notes
1. Adjust f
in
voltage to obtain 0 dBm level at output. Increase f
in
frequency until dB meter reads
-
3 dB.
2. Adjust f
in
voltage to obtain 0 dBm level at input.
3. Guaranteed by design.
OFF(feedthru)
switch OFF signal feed-through
attenuation
R
L
= 600
; C
L
= 50 pF;
f
in
= 1 MHz; see Fig.19; note 2
1.65
-
46
dB
2.3
-
46
dB
3
-
46
dB
4.5
-
46
dB
R
L
= 50
; C
L
= 5 pF; f
in
= 1 MHz;
see Fig.19; note 2
1.65
-
42
dB
2.3
-
42
dB
3
-
42
dB
4.5
-
42
dB
ct(E-Y/Z)
crosstalk between control input
to signal output
R
L
= 600
; C
L
= 50 pF;
f
in
= 1 MHz; t
r
= t
f
= 2 ns; see
Fig.20
1.65
69
mV
2.3
87
mV
3
156
mV
4.5
302
mV
ct(S)
crosstalk between switches)
R
L
= 600
; C
L
= 50 pF;
f
in
= 1 MHz; see Fig.21
1.65
-
58
dB
2.3
-
58
dB
3
-
58
dB
4.5
-
58
dB
R
L
= 50
; C
L
= 5 pF; f
in
= 1 MHz;
see Fig.21
1.65
-
58
dB
2.3
-
58
dB
3
-
58
dB
4.5
-
58
dB
C
PD
power dissipation capacitance
f
in
= 10 MHz
2.5
11.0
pF
3.3
12.5
pF
5.0
15.6
pF
Q
charge injection
C
L
= 0.1 nF; V
gen
= 0 V; R
gen
= 0
;
f = 1 MHz; R
L
= 1 M
; see Fig.22;
note 3
3.3
0.8
pC
5.5
1.2
pC
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
(V)
TYPICAL
UNIT
handbook, full pagewidth
MNA669
0.1
F
RL
VO
1/2VCC
CL dB
Z/Y
Y/Z
channel
ON
E
VIH
fin
50
Fig.17 Test circuit for measuring the frequency response when switch is ON.
2003 Aug 12
17
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, full pagewidth
MNA670
10
F
RL
VO
1/2VCC
CL
DISTORTION
METER
Z/Y
Y/Z
fin
channel
ON
E
VIH
600
Fig.18 Test circuit for measuring sine-wave distortion.
V
CC
V
IH
1.65 V
1.4 V (p-p)
2.3 V
2 V (p-p)
3 V
2.5 V (p-p)
4. V
4 V (p-p)
handbook, full pagewidth
MNB113
0.1
F
RL
RL
VO
1/2VCC
1/2VCC
CL dB
Z/Y
Y/Z
channel
OFF
E
VIL
fin
50
Fig.19 Test circuit for measuring feed-through when switch is OFF.
handbook, full pagewidth
MNA672
RL
Rin
VO
1/2VCC
1/2VCC
CL
50 pF
Z/Y
Y/Z
E
600
50
600
Fig.20 Crosstalk between control input to signal output.
2003 Aug 12
18
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, full pagewidth
MNB114
0.1
F
RL
600
Rin
VO1
1/2VCC
CL
50 pF
1Y or 1Z
1Z or 1Y
channel ON
E1
VIH
fin
50
600
RL
600
VO2
1/2VCC
CL
50 pF
2Y or 2Z
2Z or 2Y
channel OFF
E2
VIL
Rin
600
Fig.21 Crosstalk between switches.
handbook, full pagewidth
MNA675
on
off
logic
input (E)
VO
Vout
off
handbook, full pagewidth
MNA674
RL
VO
CL
Rgen
Vgen
logic
input
1
M
0.1
nF
Z/Y
Y/Z
E
Fig.22 Charge injection test.
Q =
V
out
C
L
2003 Aug 12
19
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
PACKAGE OUTLINES
UNIT
A
max.
A
1
A
2
A
3
b
p
c
D
(1)
E
(1)
(1)
e
H
E
L
L
p
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
inches
1.75
0.25
0.10
1.55
1.40
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
0.7
0.3
8
0
o
o
0.25
0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT108-2
X
w
M
A
A
1
A
2
b
p
D
H
E
L
p
detail X
E
Z
e
c
L
v
M
A
(A )
3
A
7
8
1
14
y
MS-012
pin 1 index
0.069
0.010
0.004
0.061
0.055
0.01
0.019
0.014
0.0100
0.0075
0.35
0.34
0.16
0.15
0.05
1.05
0.041
0.244
0.228
0.028
0.012
0.01
0.25
0.01
0.004
0.039
0.016
01-05-29
03-02-19
0
2.5
5 mm
scale
SO14: plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm
SOT108-2
2003 Aug 12
20
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
UNIT
A
1
A
2
A
3
b
p
c
D
(1)
E
(2)
(1)
e
H
E
L
L
p
Q
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.72
0.38
8
0
o
o
0.13
0.1
0.2
1
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT402-1
MO-153
99-12-27
03-02-18
w
M
b
p
D
Z
e
0.25
1
7
14
8
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v
M
A
X
A
y
0
2.5
5 mm
scale
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
A
max.
1.1
pin 1 index
2003 Aug 12
21
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
terminal 1
index area
0.5
1
A1
Eh
b
UNIT
y
e
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
3.1
2.9
Dh
1.65
1.35
y1
2.6
2.4
1.15
0.85
e1
2
0.30
0.18
0.05
0.00
0.05
0.1
DIMENSIONS (mm are the original dimensions)
SOT762-1
MO-241
- - -
- - -
0.5
0.3
L
0.1
v
0.05
w
0
2.5
5 mm
scale
SOT762-1
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
A
(1)
max.
A
A1
c
detail X
y
y1 C
e
L
Eh
Dh
e
e1
b
2
6
13
9
8
7
1
14
X
D
E
C
B
A
02-10-17
03-01-27
terminal 1
index area
A
C
C
B
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
2003 Aug 12
22
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL
DATA SHEET
STATUS
(1)
PRODUCT
STATUS
(2)(3)
DEFINITION
I
Objective data
Development
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
DEFINITIONS
Short-form specification
The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition
Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications
These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status `Production'), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands
613508/01/pp
23
Date of release:
2003 Aug 12
Document order number:
9397 750 11652