DATA SHEET
Product specification
Supersedes data of April 1991
File under Discrete Semiconductors, SC07
1996 Aug 01
DISCRETE SEMICONDUCTORS
BF998; BF998R
Silicon N-channel dual-gate
MOS-FETs
1996 Aug 01
2
Philips Semiconductors
Product specification
Silicon N-channel dual-gate MOS-FETs
BF998; BF998R
FEATURES
Short channel transistor with high forward transfer
admittance to input capacitance ratio
Low noise gain controlled amplifier up to 1 GHz.
APPLICATIONS
VHF and UHF applications with 12 V supply voltage,
such as television tuners and professional
communications equipment.
DESCRIPTION
Depletion type field effect transistor in a plastic
microminiature SOT143 or SOT143R package with source
and substrate interconnected. The transistors are
protected against excessive input voltage surges by
integrated back-to-back diodes between gates and
source.
PINNING
CAUTION
The device is supplied in an antistatic package. The
gate-source input must be protected against static
discharge during transport or handling.
PIN
SYMBOL
DESCRIPTION
1
s, b
source
2
d
drain
3
g
2
gate 2
4
g
1
gate 1
Fig.1
Simplified outline (SOT143)
and symbol; BF998.
Marking code: MOp.
handbook, halfpage
s,b
d
g
1
g
2
4
3
2
1
Top view
MAM039
handbook, halfpage
s,b
d
g
1
g
2
MAM040
3
4
1
2
Top view
Fig.2
Simplified outline (SOT143R)
and symbol; BF998R.
Marking code: MOp.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
V
DS
drain-source voltage
-
12
V
I
D
drain current
-
30
mA
P
tot
total power dissipation
-
200
mW
y
fs
forward transfer admittance
24
-
mS
C
ig1-s
input capacitance at gate 1
2.1
-
pF
C
rs
reverse transfer capacitance
f = 1 MHz
25
-
fF
F
noise figure
f = 800 MHz
1
-
dB
T
j
operating junction temperature
-
150
C
1996 Aug 01
3
Philips Semiconductors
Product specification
Silicon N-channel dual-gate MOS-FETs
BF998; BF998R
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes
1. Device mounted on a ceramic substrate, 8 mm
10 mm
0.7 mm.
2. Device mounted on a printed-circuit board.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
drain-source voltage
-
12
V
I
D
drain current
-
30
mA
I
G1
gate 1 current
-
10
mA
I
G2
gate 2 current
-
10
mA
P
tot
total power dissipation; BF998
up to T
amb
= 60
C; see Fig.3; note 1
-
200
mW
up to T
amb
= 50
C; see Fig.3; note 2
-
200
mW
P
tot
total power dissipation; BF998R up to T
amb
= 50
C; see Fig.4; note 1
-
200
mW
T
stg
storage temperature
-
65
+150
C
T
j
operating junction temperature
-
150
C
Fig.3 Power derating curves; BF998.
handbook, halfpage
0
100
0
200
100
200
(mW)
Ptot max
(2)
(1)
MLA198
Tamb ( C)
o
(1) Ceramic substrate.
(2) Printed-circuit board.
Fig.4 Power derating curve; BF998R.
handbook, halfpage
0
100
0
200
100
200
(mW)
Ptot max
MGA002
Tamb (
C)
1996 Aug 01
4
Philips Semiconductors
Product specification
Silicon N-channel dual-gate MOS-FETs
BF998; BF998R
THERMAL CHARACTERISTICS
Notes
1. Device mounted on a ceramic substrate, 8 mm
10 mm
0.7 mm.
2. Device mounted on a printed-circuit board.
STATIC CHARACTERISTICS
T
j
= 25
C; unless otherwise specified.
Note
1. Measured under pulse condition.
DYNAMIC CHARACTERISTICS
Common source; T
amb
= 25
C; V
DS
= 8 V; V
G2-S
= 4 V; I
D
= 10 mA.
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
R
th j-a
thermal resistance from junction to ambient in free air; BF998
note 1
460
K/W
note 2
500
K/W
R
th j-a
thermal resistance from junction to ambient in free air; BF998R note 1
500
K/W
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
(BR)G1-SS
gate 1-source breakdown voltage
V
G2-S
= V
DS
= 0; I
G1-SS
=
10 mA
6
20
V
V
(BR)G2-SS
gate 2-source breakdown voltage
V
G1-S
= V
DS
= 0; I
G2-SS
=
10 mA
6
20
V
-
V
(P)G1-S
gate 1-source cut-off voltage
V
G2-S
= 4 V; V
DS
= 8 V; I
D
= 20
A
-
2.0
V
-
V
(P)G2-S
gate 2-source cut-off voltage
V
G1-S
= 0; V
DS
= 8 V; I
D
= 20
A
-
1.5
V
I
DSS
drain-source current
V
G2-S
= 4 V; V
DS
= 8 V; V
G1-S
= 0; note 1
2
18
mA
I
G1-SS
gate 1 cut-off current
V
G2-S
= V
DS
= 0; V
G1-S
=
5 V
-
50
nA
I
G2-SS
gate 2 cut-off current
V
G1-S
= V
DS
= 0; V
G2-S
=
5 V
-
50
nA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
y
fs
forward transfer admittance
f = 1 kHz
21
24
-
mS
C
ig1-s
input capacitance at gate 1
f = 1 MHz
-
2.1
2.5
pF
C
ig2-s
input capacitance at gate 2
f = 1 MHz
-
1.2
-
pF
C
os
output capacitance
f = 1 MHz
-
1.05
-
pF
C
rs
reverse transfer capacitance
f = 1 MHz
-
25
-
fF
F
noise figure
f = 200 MHz; G
S
= 2 mS; B
S
= B
Sopt
-
0.6
-
dB
f = 800 MHz; G
S
= 3.3 mS; B
S
= B
Sopt
-
1.0
-
dB
1996 Aug 01
5
Philips Semiconductors
Product specification
Silicon N-channel dual-gate MOS-FETs
BF998; BF998R
Fig.5 Output characteristics; typical values.
handbook, halfpage
0
10
24
0
8
16
4
12
20
MGE813
2
4
6
8
VDS (V)
ID
(mA)
0.4 V
0.3 V
0.2 V
0.1 V
0 V
-
0.5 V
-
0.4 V
-
0.3 V
-
0.2 V
-
0.1 V
VG1-S =
V
G2-S
= 4 V; T
amb
= 25
C.
Fig.6 Transfer characteristics; typical values.
handbook, halfpage
-
1
1
24
0
8
16
4
12
20
MGE815
0
3 V
2 V
1 V
0 V
VG2-S = 4 V
VG1 (V)
ID
(mA)
V
DS
= 8 V; T
amb
= 25
C.
Fig.7
Drain current as a function of gate 1
voltage; typical values.
handbook, halfpage
-
1600
-
400
-
800
-
1200
400
24
0
8
16
4
12
20
MGE814
0
max
typ
min
VG1 (mV)
ID
(mA)
V
DS
= 8 V; V
G2-S
= 4 V; T
amb
= 25
C.
Fig.8
Forward transfer admittance as a function of
drain current; typical values.
handbook, halfpage
0
20
30
0
6
12
18
24
MGE811
16
12
8
4
ID (mA)
0.5 V
4 V
1 V
2 V
3 V
VG2-S = 0 V
|yfs|
(mS)
V
DS
= 8 V; T
amb
= 25
C.
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