ChipFind - документация

Электронный компонент: CBT3306D

Скачать:  PDF   ZIP
www.docs.chipfind.ru
background image
Philips
Semiconductors
CBT3306
Dual bus switch
Product data
File under Integrated Circuits -- ICL03
2001 Nov 08
INTEGRATED CIRCUITS
background image
Philips Semiconductors
Product data
CBT3306
Dual bus switch
2
2001 Nov 08
853-2304 27313
FEATURES
5
switch connection between two ports
TTL-compatible input levels
Package options include plastic small outline (SO) and
thin shrink small outline (TSSOP)
Latch-up protection exceeds 100 mA per JESD78
ESD protection exceeds 2000 V HBM per JESD22-A114 and
1000 V CDM per JESD22-C101
DESCRIPTION
The CBT3306 Dual FET Bus Switch features independent line
switches. Each switch is disabled with the associated Output Enable
(OE) input is high.
The CBT3306 is characterized for operation from 40 to +85
C.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
1OE
1A
1B
GND
V
CC
2OE
2B
2A
SA00535
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 7
1OE, 2OE
Output enable
2, 5
1A, 2A
A port inputs
3, 6
1B, 2B
B port outputs
4
GND
Ground (0 V)
8
V
CC
Positive supply voltage
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
C; GND = 0 V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
A to B or B to A
C
L
= 50 pF; V
CC
= +5.0 V
0.5 V
0.25 (MAX)
ns
C
IO(OFF)
Pin capacitance (OFF state)
V
O
= 3 V or 0; OE = V
CC
6.45
pF
I
CC
Quiescent supply current
V
CC
= 5.5 V; I
O
= 0, V
I
= V
CC
or GND
3
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DWG NUMBER
8-pin plastic SO
40 to 85
C
CBT3306D
SOT96-1
8-pin plastic TSSOP
40 to 85
C
CBT3306PW
SOT530-1
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
LOGIC DIAGRAM (positive logic)
2
1A
3
1B
SA00534
1
1OE
5
2A
6
2B
7
2OE
FUNCTION TABLE
INPUT
FUNCTION
OE
FUNCTION
L
A port = B port
H
Disconnect
background image
Philips Semiconductors
Product data
CBT3306
Dual bus switch
2001 Nov 08
3
ABSOLUTE MAXIMUM RATINGS
1
T
amb
= 40 to +85
C, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +7.0
V
V
I
DC input voltage
2
0.5 to +7.0
V
I
OUT
DC output current
128
mA
I
IK
Diode current
V
I/O
< 0
50
mA
T
stg
Storage temperature range
65 to +150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. The package thermal impedance is calculated in accordance with JESD 51.
RECOMMENDED OPERATING CONDITIONS
1
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
MAX
UNIT
V
CC
DC supply voltage
4.5
5.5
V
V
IH
High-level input voltage
2.0
--
V
V
IL
Low-level Input voltage
--
0.8
V
T
amb
Operating free-air temperature range
40
+85
C
NOTE:
1. All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation.
DC ELECTRICAL CHARACTERISTICS
T
amb
= 40 to +85
C, unless otherwise specified.
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= 40 to +85
C
UNIT
MIN
TYP
1
MAX
V
IK
Input clamp voltage
V
CC
= 4.5 V; I
I
= 18 mA
--
--
1.2
V
I
I
Input leakage current
V
CC
= 5.5 V; V
I
= GND or 5.5 V
--
--
1
A
I
CC
Quiescent supply current
V
CC
= 5.5 V; I
O
= 0, V
I
= V
CC
or GND
--
--
3
A
V
P
Output high pass voltage
V
I
= V
CC
= 5.0 V; I
O
= 100
A
3.4
3.6
3.9
V
I
CC
Additional supply current per input pin
2
V
CC
= 5.5 V, one input at 3.4 V,
other inputs at V
CC
or GND
--
--
2.5
mA
C
I
Control pin capacitance
V
I
= 3 V or 0
--
3.15
--
pF
C
IO(OFF)
Port off capacitance
V
O
= 3 V or 0; OE = V
CC
--
6.45
--
pF
3
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 64 mA
--
3.4
5
r
on
3
On-resistance
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 30 mA
--
3.4
5
V
CC
= 4.5 V; V
I
= 2.4 V; I
I
= 15 mA
--
6.8
7.5
NOTES:
1. All typical values are at V
CC
= 5 V, T
amb
= 25
C.
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch.
On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
background image
Philips Semiconductors
Product data
CBT3306
Dual bus switch
2001 Nov 08
4
AC CHARACTERISTICS
T
amb
= 40 to +85
C; C
L
= 50 pF
TO
LIMITS
SYMBOL
PARAMETER
FROM (INPUT)
TO
(OUTPUT)
V
CC
= +5.0 V
0.5 V
UNIT
(OUTPUT)
MIN
MAX
t
pd
Propagation delay
1
A or B
B or A
--
0.25
ns
t
en
Output enable time
to High and Low level
OE
A or B
1.8
5
ns
t
dis
Output disable time
from High and Low level
OE
A or B
1
5
ns
NOTE:
1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
AC WAVEFORMS
V
M
= 1.5 V, V
IN
= GND to 3.0 V
INPUT
1.5 V
OUTPUT
t
PLH
t
PHL
SA00028
1.5 V
1.5 V
1.5 V
3 V
0 V
V
OH
V
OL
Waveform 1. Input to Output Propagation Delays
Output Control
(Low-level
enabling )
1.5 V
t
PZH
t
PHZ
V
OH
V
OL
t
PZL
t
PLZ
3.5 V
0 V
V
OL
+ 0.3 V
V
OH
0.3 V
SA00029
1.5 V
1.5 V
1.5 V
0 V
3 V
Output
Waveform 1
S1 at 7 V
(see Note)
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
Output
Waveform 2
S1 at Open
(see Note)
Waveform 2. 3-State Output Enable and Disable Times
NOTES:
1. t
PLZ
and t
PHZ
are the same as t
dis
.
2. t
PZL
and t
PZH
are the same as t
en
.
3. t
PLH
and t
PHL
are the same as t
pd
.
TEST CIRCUIT AND WAVEFORMS
C
L
= 50 pF
500
Load Circuit
DEFINITIONS
C
L
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
TEST
S1
t
pd
open
t
PLZ
/t
PZL
7 V
t
PHZ
/t
PZH
open
SA00012
500
From Output
Under Test
S1
7 V
Open
GND
NOTES:
1. All input pulses are supplied by generators having the following
characteristics: PRR
10 MHz, Z
O
= 50
, t
r
2.5 ns, t
f
2.5 ns.
2. The outputs are measured one at a time with one transition per
measurement.
background image
Philips Semiconductors
Product data
CBT3306
Dual bus switch
2001 Nov 08
5
TSSOP8: plastic thin shrink small outline; 8 leads; body width 4.4 mm
SOT530-1
background image
Philips Semiconductors
Product data
CBT3306
Dual bus switch
2001 Nov 08
6
SO8:
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
background image
Philips Semiconductors
Product data
CBT3306
Dual bus switch
2001 Nov 08
7
NOTES
background image
Philips Semiconductors
Product data
CBT3306
Dual bus switch
2001 Nov 08
8
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Contact information
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Koninklijke Philips Electronics N.V. 2001
All rights reserved. Printed in U.S.A.
Date of release: 11-01
Document order number:
9397 750 09115
Philips
Semiconductors
Data sheet status
[1]
Objective data
Preliminary data
Product data
Product
status
[2]
Development
Qualification
Production
Definitions
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.
Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.

Document Outline