Document Outline
- Table of Contents
- SEARCH (WIN Only)
- HELP
- PRINT
- Features
- Quick Reference Data
- Ordering Information
- Absolute Maximum Ratings
- PIN Configuration
- Description
- PIN Description
- Function Table
- Recommended Operating Conditions
- Logic Diagram For FB2040
- DC Electrical Characteristics
- AC Electrical Characteristics
- AC Waveforms
- Test Circuit and Waveforms
- QFP52: plastic quad flat package; 52 leads (lead length 1.6 mm); body 10 x 10 x 2.0 mm
- Data sheet status
Philips
Semiconductors
FB2040A
8-bit Futurebus+ transceiver
Product specification
IC19 Data Handbook
1995 May 25
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
2
1995 May 25
853-1801 15279
FEATURES
8-bit BTL transceivers
Separate I/O on TTL A-port
Inverting
Drives heavily loaded backplanes with equivalent load
impedances down to 10
.
High drive 100mA BTL open collector drivers on B-port
Allows incident wave switching in heavily loaded backplane buses
Reduced BTL voltage swing produces less noise and reduces
power consumption
Built-in precision band-gap reference provides accurate receiver
thresholds and improved noise immunity
Compatible with IEEE Futurebus+ or proprietary BTL backplanes
Controlled output ramp and multiple GND pins minimize ground
bounce
Each BTL driver has a dedicated Bus GND for a signal return
Glitch-free power up/power down operation
Low I
CC
current
Tight output skew
Supports live insertion
Pins for the optional JTAG boundary scan function are provided
High density packaging in plastic Quad Flat Pack
QUICK REFERENCE DATA
SYMBOL
PARAMETER
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
AIn to Bn
4.4
3.1
ns
t
PLH
t
PHL
Propagation delay
Bn to AOn
3.4
3.2
ns
C
OB
Output capacitance (B0 B7 only)
4
pF
I
OL
Output current (B0 B7 only)
100
mA
Standby
4
AIn to Bn
(outputs Low or High)
4
I
CC
Supply current
Bn to AOn
(outputs Low)
22
mA
Bn to AOn
(outputs High)
12
ORDERING INFORMATION
PACKAGES
COMMERCIAL RANGE
V
CC
= 5V
10%; T
amb
= 0
C to +70
C
DRAWING
NUMBER
52-pin Plastic Quad Flat Pack (QFP)
FB2040BB
SOT379-1
ABSOLUTE MAXIMUM RATINGS
Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Supply voltage
-0.5 to +7.0
V
V
Input voltage
AI0 AI7, OEB0, OEB1, OEA
-1.2 to +7.0
V
V
IN
Input voltage
B0 B7
-1.2 to +5.5
V
I
IN
Input current
-18 to +5.0
mA
V
OUT
Voltage applied to output in High output state
-0.5 to +V
CC
V
I
O
Current applied to output in Low
A0 A7
48
mA
I
OUT
output state
B0 B7
200
mA
T
amb
Operating free-air temperature range
-40 to ++85
C
T
STG
Storage temperature
-65 to +150
C
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
3
PIN CONFIGURATION
52 51 50 49 48 47 46
45 44 43 42 41 40
39
38
37
36
35
34
33
32
31
30
29
28
27
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19
20
21 22 23 24 25 26
BUS GND
B1
BUS GND
B2
BUS GND
B3
BUS GND
B4
BUS GND
B5
BUS GND
B6
BUS GND
LOGIC GND
AI1
AI2
AO2
LOGIC GND
AO3
LOGIC GND
AI3
AI4
AO4
LOGIC GND
AO5
LOGIC GND
AI5
LOGIC GND
AO6
BG GND
TDO (option)
TDI (option)
AI6
B7
BUS V
CC
BG V
CC
AO1
AO0
OEA
TCK (option)
TMS (option)
BUS GND
OEB1
BIAS V
B0/B0
BUS V
CC
LOGIC V
CC
OEB0
8-Bit Transceiver
FB2040A
52-lead PQFP
AI0
NC
AI7
AO7
SG00076
DESCRIPTION
The FB2040A is an 8-bit bidirectional BTL transceiver and is
intended to provide the electrical interface to a high performance
wired-OR bus. The FB2040A is an inverting transceiver.
The B-port drivers are Low-capacitance open collectors with
controlled ramp and are designed to sink 100mA. Precision band
gap references on the B-port insure very good noise margins by
limiting the switching threshold to a narrow region centered at 1.55V.
The B-port interfaces to "Backplane Transceiver Logic" (See the
IEEE 1194.1 BTL standard). BTL features low power consumption
by reducing voltage swing (1Vp-p, between 1V and 2V) and reduced
capacitive loading by placing an internal series diode on the drivers.
BTL also provides incident wave switching, a necessity for high
performance backplanes.
The A-port operates at TTL levels with separate I/O. The 3-state
A-port drivers are enabled when OEA goes High after an extra 6ns
delay which is built in to provide a break-before-make function.
When OEA goes Low, A-port drivers become High impedance
without any extra delay. During power on/off cycles, the A-port
drivers are held in a High impedance state when V
CC
is below 2.5V.
The B-port has two output enables, OEB0 and OEB1. When OEB0
is High and OEB1 is Low the output is enabled. When OEB0 is Low
or if OEB1 is High, the B-port is inactive and is at the level of the
backplane signal.
To support live insertion, OEB0 is held Low during power on/off
cycles to insure glitch free B port drivers. Proper bias for B port
drivers during live insertion is provided by the BIAS V pin when at a
5V level while V
CC
is Low. If live insertion is not a requirement, the
BIAS V pin should be tied to a V
CC
pin.
The LOGIC GND and BUS GND pins are isolated in the package to
minimize noise coupling between the BTL and TTL sides. These
pins should be tied to a common ground external to the package.
Each BTL driver has an associated BUS GND pin that acts as a
signal return path and these BUS GND pins are internally isolated
from each other. In the event of a ground return fault, a "hard" signal
failure occurs instead of a pattern dependent error that may be very
infrequent and impossible to trouble-shoot.
The LOGIC V
CC
and BUS V
CC
pins are also isolated internally to
minimize noise and may be externally decoupled separately or
simply tied together.
JTAG boundary scan pins are provided with signals TMS, TCK, TDI
and TDO. TMS and TCK are no-connects (no bond wires) and TDI
and TDO are shorted together internally. Boundary scan
functionality is not implemented at this time.
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
4
PIN DESCRIPTION
SYMBOL
PIN NUMBER
TYPE
NAME AND FUNCTION
AI0 AI7
51, 2, 3, 8, 9, 14, 18, 24
Input
Data inputs (TTL)
AO0 AO7
50, 52, 4, 6, 10, 12, 16, 20
Output
3-state outputs (TTL)
B0 B7
40, 38, 36, 34,
32, 30, 28, 26
I/O
Data inputs/Open Collector outputs. High current drive (BTL)
OEB0
46
Input
Enables the B outputs when High
OEB1
45
Input
Enables the B outputs when Low
OEA
47
Input
Enables the A outputs when High
BUS GND
41, 39, 37, 35, 33, 31, 29, 27
GND
Bus ground (0V)
LOGIC GND
1, 5, 7, 11, 13, 15
GND
Logic ground (0V)
BUS V
CC
23, 43
Power
Positive supply voltage
LOGIC V
CC
49
Power
Positive supply voltage
BG V
CC
17
Power
Band Gap threshold voltage reference
BG GND
19
GND
Band Gap threshold voltage reference ground
BIAS V
48
Power
Live insertion pre-bias pin
TMS
42
Input
Test Mode Select (optional, if not implemented then no-connect)
TCK
44
Input
Test Clock (optional, if not implemented then no-connect)
TDI
22
Input
Test Data In (optional, if not implemented then shorted to TDO)
TDO
21
Output
Test Data Out (optional, if not implemented then shorted to TDI)
NC
25
NC
No Connect
FUNCTION TABLE
MODE
INPUTS
OUTPUTS
MODE
AIn
Bn*
OEB0
OEB1
OEA
AOn
Bn*
L
--
H
L
L
Z
H**
AIn to Bn
H
--
H
L
L
Z
L
AIn to Bn
L
--
H
L
H
L
H**
H
--
H
L
H
H
L
Disable Bn outputs
X
X
L
X
X
X
H**
Disable Bn out uts
X
X
X
H
X
X
H**
X
L
L
X
H
H
Input
Bn to AOn
X
H
X
H
H
L
Input
Bn to AOn
X
L
X
H
H
H
Input
X
H
L
X
H
L
Input
Disable AOn outputs
--
X
X
X
L
Z
X
H** =
Goes to level of pull-up voltage
B*
=
Precaution should be taken to ensure B inputs do not float. If they do, they are equal to Low state.
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
5
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
NOM
MAX
UNIT
V
CC
Supply voltage
4.5
5.0
5.5
V
V
IH
High-level input voltage
Except B0B7
2.0
V
V
IH
High-level in ut voltage
B0 B7
1.62
1.55
V
V
IL
Low-level input voltage
Except B0B7
0.8
V
V
IL
Low-level in ut voltage
B0 B7
1.47
V
I
IK
Input clamp current
-18
mA
I
OH
High-level output current
AO0 AO7
-3
mA
I
OL
Low-level output current
AO0 AO7
24
mA
I
OL
Low-level out ut current
B0 B7
100
mA
C
OB
Output capacitance on B port
5
pF
T
amb
Operating free-air temperature range
0
+70
C
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
6
LOGIC DIAGRAM FOR FB2040
46
45
OEB0
OEB1
47
OEA
BTL
Levels
TTL
Levels
TMS
TCK
TDI
TDO
42
44
22
21
(Future JTAG Boundary Scan option)
NC
=
25
LOGIC VCC
=
49
LOGIC GND
=
1, 5, 7, 11, 13, 15
BUS VCC
=
23, 43
BUS GND
=
27, 29, 31, 33, 35, 37, 39, 41
BIAS V
=
48
BG VCC
=
17
BG GND
=
19
51
AI0
50
AO0
B0
40
38
B1
2
52
AI1
AO1
36
3
4
B2
AI2
AO2
34
8
6
B3
AI3
AO3
32
9
10
30
14
12
28
18
16
B4
AI4
AO4
B5
AI5
AO5
B6
AI6
AO6
26
24
20
B7
AI7
AO7
SG00077
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
7
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted.
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
TYP
2
MAX
UNIT
I
OH
High level output current
B0 B7
V
CC
= MAX, V
IL
= MAX, V
IH
= MIN, V
OH
= 2.1V
100
A
I
OFF
Power-off output current
B0 B7
V
CC
= 0.0V, V
IL
= MAX, V
IH
= MIN, V
OH
= 2.1V
100
A
V
OH
High-level output voltage
AO0 AO7
3
V
CC
= MIN, V
IL
= MAX, V
IH
= MIN, I
OH
= -3mA
2.5
2.85
V
AO0 AO7
3
V
CC
= MIN, V
IL
= MAX, V
IH
= MIN, I
OL
= 24mA
0.33
0.5
V
OL
Low-level output voltage
B0
B7
V
CC
= MIN, V
IL
= MAX, V
IH
= MIN, I
OL
= 80mA
.75
1.0
1.10
V
B0 B7
V
CC
= MIN, V
IL
= MAX, V
IH
= MIN, I
OL
= 100mA
1.15
V
IK
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
-1.2
V
I
I
Input current at maximum
input voltage
OEB0, OEB1,
OEA, AI0AI7
V
CC
= MAX, V
I
= GND or 5.5V
50
A
I
IH
High-level input current
OEB0, OEB1,
OEA, AI0AI7
V
CC
= MAX, V
I
= 2.7V
20
A
I
IH
High level in ut current
B0 B7
V
CC
= MAX, V
I
= 2.1V
100
A
I
IL
Low-level input current
OEB0, OEB1,
OEA, AI0AI7
V
CC
= MAX, V
I
= 0.5V
-20
A
I
IL
Low level in ut current
B0 B7
V
CC
= MAX, V
I
= 0.75V
-100
A
I
OZH
Off-state output current
AO0 AO7
V
CC
= MAX, V
O
= 2.7V
50
A
I
OZL
Off-state output current
AO0 AO7
V
CC
= MAX, V
O
= 0.5V
-50
A
I
OS
Short-circuit output
current
4
AO0 AO7
only
V
CC
= MAX, V
O
= 0.0V
-30
-150
mA
I
CCZ
(standby)
V
CC
= MAX
19
30
I
CCB,
AIn to
Bn
V
CC
= MAX, outputs Low or High
40
60
I
CC
Supply current (total)
I
CCA,
Bn to
AOn
V
CC
= MAX, outputs Low
22
35
mA
I
CCA,
Bn to
AOn
V
CC
= MAX, outputs High
19
35
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operation conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
A
= 25
C.
3. Due to test equipment limitations, actual test conditions are V
IH
= 1.8V and V
IL
= 1.3V for the B side.
4. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged
shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In
any sequence of parameter tests, I
OS
should be performed last.
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
8
AC ELECTRICAL CHARACTERISTICS
A PORT LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= +25
C, V
CC
= 5V,
C
L
= 50pF, R
L
= 500
T
amb
= 0 to 70
C,
V
CC
= 5V
10%,
C
L
= 50pF, R
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
t
PLH
t
PHL
Propagation delay,
Bn to AOn
Waveform 1, 2
1.8
1.6
3.4
3.2
5.0
4.9
1.6
1.6
5.6
5.3
ns
t
PZH
t
PZL
Output enable time,
OEA to AOn
Waveform 4, 5
1.0
1.0
5.0
5.0
1.5
1.5
5.5
5.5
ns
t
PHZ
t
PLZ
Output disable time,
OEA to AOn
Waveform 4, 5
1.5
1.5
3.3
3.3
4.8
5.4
1.2
1.3
5.0
5.9
ns
t
TLH
t
THL
Transition time, AOn Port
(10% to 90% or 90% to 10%)
Test Circuit and
Waveforms
1.5
1.5
2.2
2.4
3.5
3.5
1.0
1.0
4.5
4.5
ns
t
SK
(o)
Output skew between receivers
in same package
1
Waveform 3
0.4
1.0
1.0
ns
B PORT LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= +25
C, V
CC
= 5V,
C
D
= 30pF, R
U
= 9
T
amb
= 0 to 70
C,
V
CC
= 5V
10%,
C
D
= 30pF, R
U
= 9
UNIT
t
PLH
t
PHL
Propagation delay,
AIn to Bn
Waveform 1, 2
2.9
1.6
4.4
3.3
5.0
4.8
2.3
1.5
5.5
5.1
ns
t
PLH
t
PHL
Enable/disable time,
OEB0 to Bn
Waveform 2
2.9
1.9
4.7
3.5
5.9
5.1
2.6
1.8
7.8
5.7
ns
t
PLH
t
PHL
Enable/disable time,
OEB1 to Bn
Waveform 1
3.0
1.7
5.3
3.2
6.3
4.8
2.7
1.5
8.0
5.7
ns
t
TLH
t
THL
Transition time, Bn Port
(1.3V to 1.8V)
Test Circuit and
Waveforms
1.0
0.5
1.4
1.1
3.0
3.0
1.0
0.5
3.0
3.0
ns
t
SK
(o)
Output skew between drivers in
same package
1
Waveform 3
0.3
1.0
1.0
ns
SYMBOL
PARAMETER
TEST CONDITION
R
U
= 16.5
R
U
= 16.5
UNIT
t
PLH
t
PHL
Propagation delay,
AIn to Bn
Waveform 1, 2
3.0
1.7
4.5
3.3
6.4
4.8
2.3
1.6
6.9
5.1
ns
t
PLH
t
PHL
Enable/disable time,
OEB0 to Bn
Waveform 2
3.0
2.0
4.8
3.5
6.0
5.2
2.7
1.9
7.9
5.7
ns
t
PLH
t
PHL
Enable/disable time,
OEB1 to Bn
Waveform 1
3.1
1.8
5.4
3.3
6.4
4.9
2.8
1.6
8.1
5.7
ns
t
TLH
t
THL
Transition time, Bn Port
(1.3V to 1.8V)
Test Circuit and
Waveforms
1.0
0.5
1.5
1.1
3.0
3.0
1.0
0.5
3.0
3.0
ns
t
SK
(o)
Output skew between drivers in
same package
1
Waveform 3
0.3
1.0
1.0
ns
NOTES:
1.
t
PN
actual t
PM
actual
for any data input to output path compared to any other data input to output path where N and M are either LH or
HL. Skew times are valid only under same test conditions (temperature, V
CC
, loading, etc.).
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
9
AC WAVEFORMS
t
PZL
AIn, Bn
OEB1
AOn, Bn
VM
VM
VM
VM
t
PLH
t
PHL
VM
VM
VM
VM
t
PHL
t
PLH
AOn, Bn
AIn, Bn
AOn, Bn
VM
VM
tSK(o)
AOn
OEA
VM
VM
t
PLZ
VM
VOL +0.3V
AOn
OEA
VM
VM
VM
VOH -0.3V
OV
t
PHZ
t
PZH
NOTE: VM = 1.55V for Bn, VM = 1.5V for all others.
AIn, Bn
OEB0
Waveform 1. Propagation Delay for Data
or Output Enable to Output
Waveform 2. Propagation Delay for Data
or Output Enable to Output
Waveform 3. Output Skews
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
SG00078
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
10
TEST CIRCUIT AND WAVEFORMS
2.5ns
2.5ns
500ns
500ns
INPUT PULSE REQUIREMENTS
Rep. Rate
Amplitude
t
TLH
t
THL
1MHz
3.0V
2.5ns
Input Pulse Definitions
VM = 1.55V for Bn, VM = 1.5V for all others.
VCC
Family
FB+
D.U.T.
PULSE
GENERATOR
7.0V
RL
RL
CL
RT
VIN
VOUT
Test Circuit for 3-State Outputs on A Port
TEST
SWITCH
SWITCH POSITION
t
PLZ,
t
PZL
All other
closed
open
DEFINITIONS:
R
L
= Load Resistor; see AC CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance; see AC
CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
C
D
= Load capacitance includes jig and probe capacitance; see AC
CHARACTERISTICS for value.
R
U
= Pull up resistor; see AC CHARACTERISTICS for value.
tW
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
LOW V
LOW V
tTHL
(t
f
)
tTLH
(t
r
)
tW
BIAS
V
t
W
Low V
0.0V
tTLH
(t
r
)
tTHL
(t
f
)
A Port
1MHz
2.0V
2.5ns
1.0V
B Port
VCC
D.U.T.
PULSE
GENERATOR
RU
CD
RT
VIN
VOUT
Test Circuit for Outputs on B Port
BIAS
V
2.0V (for RU = 9
)
2.1V (for RU = 16.5
)
SG00059
VIN
VIN
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
11
QFP52:
plastic quad flat package; 52 leads (lead length 1.6 mm); body 10 x 10 x 2.0 mm
SOT379-1
Philips Semiconductors
Product specification
FB2040A
8-bit Futurebus+ transceiver
1995 May 25
12
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Date of release: 08-98
Document order number:
Philips
Semiconductors
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1]
Please consult the most recently issued datasheet before initiating or completing a design.
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