GTL1655 16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Rev. 01 -- 11 May 2004

Product data

Description

The GTL1655 is a 16-bit bus transceiver that incorporates HIGH-drive
LOW-output-impedance (100 mA/12

) with LVTTL-to-GTL/GTL+ and

GTL/GTL+-to-LVTTL logic level translation.

The device is configured as two 8-bit transceivers that share a common clock and a
master output enable pin, but also have individual latch timing and output enable
signals. D-type flip-flops and D-type latches enable three modes of data transfer;
Clocked, Latched, or Transparent. The GTL1655 provides the ideal interface between
cards operating at LVTTL levels and backplanes using GTL/GTL+ signal levels. The
combination of reduced output swing, reduced input threshold levels and configurable
edge control provides the higher speed operation of GTL/GTL+ backplanes.

The GTL1655 can be used at GTL (V

= 1.2 V, V

REF

= 0.8 V) or GTL+ (V

= 1.5 V,

REF

= 1.0 V) signalling levels. Port A and the control inputs are compliant with

LVTTL signal levels and are 5 V tolerant. Port B is designed to operate at GTL or
GTL+ signal levels, with V

REF

providing the reference voltage input.

The latch enable pins (nLEAB and nLEBA), the output enable pins (nOEAB, nOEBA)
and the clock pin (CP) are used to control the data flow through the two 8-bit
transceivers (n = 1 or 2). When nLEAB is set HIGH, the device will operate in the
transparent mode Port A to Port B. HIGH-to-LOW transitions of nLEAB will latch A
data independently of CP HIGH or LOW (latched mode). LOW-to-HIGH transitions of
CP will clock A data to the B port if nLEAB is LOW (clocked mode). Using the control
pins nLEBA, nOEBA and CP in the same way, data flow from Port B to Port A can be
controlled. The OE pin can be used to disable all of the I/O pins.

To optimize signal integrity, the GTL1655 features an adjustable edge rate control
(V

ERC

). By adjusting V

ERC

between GND and V

, a designer can adjust the Port B

edge rate to suit an application's load conditions.

The GTL1655 permits true live insertion capability by incorporating:

BIAS V

, to pre-charge outputs and avoid disturbing active data during card

insertion.

off

to disable current flow through powered-off I/Os.

Power-up 3-state, which ensures outputs are high-impedance during power-up,
thus preventing bus contention issues. Once V

is above 1.5 V, the power-up

3-state circuit relinquishes control of the outputs to the OE pin. To ensure the
outputs remain 3-state, the OE pin should be tied to V

via a pull-up resistor.

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

2 of 23

9397 750 12936

Features

Combination of D-type latches and D-type flip-flops for transceiver operation in
clocked, latched or transparent mode

Logic level translation between LVTTL and GTL/GTL+ signals

HIGH-drive LOW-output-impedance (100 mA/12

) on Port B

Configurable rise and fall times on Port B

Supports live insertion (I

off

, Power-up 3-state, and BIAS V

)

Bus Hold on Port A inputs

Over voltage tolerance on Port A

Minimized switching noise through use of distributed V

and GND pins

Available in TSSOP64 package

Industrial temperature range (

C to +85

ESD protection

HBM EIA/JESD22-A114-A exceeds 2000 V

CDM EIA/JESD22-C101 exceeds 1000 V

Latch-up EIA/JEDS78 exceeds 200 mA

Quick reference data

Table 1:

Quick reference data

GND = 0 V; T

amb

= 25

C; t

= t

2.5 ns

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

PLH

propagation delay, nAn to nBn

= 3.3 V; V

ERC

= GND;

= 1.5 V; V

REF

= 1 V

3.9

= 3.3 V; V

ERC

= GND;

= 1.5 V; V

REF

= 1 V

4.4

propagation delay, nBn to nAn

= 3.3 V

2.6

PHL

propagation delay, nAn to nBn

= 3.3 V; V

ERC

= GND;

= 1.5 V; V

REF

= 1 V

3.1

= 3.3 V; V

ERC

= GND;

= 1.5 V; V

REF

= 1 V

2.7

propagation delay, nBn to nAn

= 3.3 V

4.2

input capacitance (control pins)

= V

or GND

I/O

I/O capacitance, Port A

= V

or GND

I/O capacitance, Port B

= V

or GND

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

4 of 23

9397 750 12936

Pinning information

5.1 Pinning

Fig 1.

TSSOP64 pin configuration.

GTL1655DGG

1OEAB

1OEBA

1LEAB

1LEBA

1A1

ERC

GND

1A2

1B1

1A3

1B2

GND

1A4

1B3

GND

1B4

1A5

1B5

GND

1A6

1B6

1A7

1B7

1A8

1B8

2A1

2B1

GND

2A2

2B2

2A3

2B3

GND

2A4

2B4

2A5

2B5

GND

REF

2A6

2B6

GND

2A7

2B7

2B8

2A8

BIAS_V

GND

2LEAB

2OEAB

2LEBA

2OEBA

002aaa763

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

5 of 23

9397 750 12936

5.2 Pin description

Table 4:

Pin description

Symbol

Pin

Description

1OEAB

output enable 1A-to-1B (active-LOW)

1OEBA

output enable 1B-to-1A (active-LOW)

3, 15, 28, 50

DC supply voltage

1A1 to 1A8

4, 6, 7, 9, 11, 13,
14, 16

data inputs/outputs port 1A

GND

5, 8, 10, 12, 18,
21, 24, 26, 30,
39, 44, 47, 53,
57, 60

ground (0 V)

2A1 to 2A8

17, 19, 20, 22,
23, 25, 27, 29

data inputs/outputs port 2A

2OEAB

output enable 2A-to-2B (active-LOW)

2OEBA

output enable 2B-to-2A (active-LOW)

output enable, all I/O pins (active-LOW)

2LEBA

latch enable 2B-to-2A

2LEAB

latch enable 2A-to-2B

BIAS_V

bias supply voltage

2B8 to 2B1

37, 38, 40, 42,
43, 45, 46, 48

data inputs/outputs port 2B

REF

reference voltage

1B8 to 1B1

49, 51, 52, 54,
55, 56, 58, 59

data inputs/outputs port 1B

ERC

edge-rate control voltage Port B

1LEBA

latch enable 2B-to-2A

1LEAB

latch enable 1A-to-1B

clock input

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

7 of 23

9397 750 12936

6.1 Function table

[1]

A-to-B data flow is shown. B-to-A is similar, but uses OEBA, LEBA, and CP. It is not recommended to
set OEAB and OEBA LOW at the same time.

X -- don't care

H -- HIGH voltage level

L -- LOW voltage level

Z -- high-impedance OFF-state

-- LOW-to-HIGH transition

[2]

Output level before the indicated steady-state input conditions were established, provided that CP
was HIGH before LEAB went LOW.

[3]

Output level before the indicated steady-state input conditions were established.

Table 5:

Function table

See

Table note [1]

Inputs

Output

Mode

OEAB

LEAB

Port A

Port B

isolation

transparent

registered

[2]

previous state

[3]

previous state

Table 6:

Output Enable function table

See

Table note [1]

Inputs

Outputs

OEAB

OEBA

Port A

Port B

active

Table 7:

Port B edge-rate control (V

ERC

) function table

See

Table note [1]

Input V

ERC

Output port B edge-rate

Logic level

Nominal voltage

slow

GND

fast

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

8 of 23

9397 750 12936

Limiting values

[1]

Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any conditions beyond those indicated under

Section 8 "Recommended operating conditions"

is not implied.

Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

[2]

The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150

[3]

The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

Table 8:

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). See

Table note [1]

and

Table note [2]

Symbol

Parameter

Conditions

Min

Max

Unit

DC supply voltage

0.5

+4.6

BIAS V

BIAS supply voltage

0.5

+4.6

input clamping diode current

< 0 V

DC input voltage

port A

[3]

0.5

+7.0

port B; V

ERC

, V

REF

[3]

0.5

+4.6

DC output voltage

output in HIGH or power-OFF state;
port A

0.5

+7.0

output in HIGH or power-OFF state;
port B

0.5

+4.6

OL(d)

DC LOW-level diode output current

port A

port B

200

OH(d)

DC HIGH-level diode output current

port A

stg

storage temperature

+150

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

9 of 23

9397 750 12936

Recommended operating conditions

Table 9:

Recommended operating conditions

Symbol

Parameter

Conditions

Min

Max

Unit

BIAS V

DC supply voltage

3.0

3.6

termination voltage

GTL

1.14

1.26

GTL+

1.35

1.65

REF

GTL reference voltage

GTL

0.74

0.87

GTL+

0.87

1.10

input voltage

port B

except port B

5.5

HIGH-level input voltage

port B

REF

+ 50 mV

except port B

2.0

ERC

0.6

LOW-level input voltage

port B

REF

50 mV

except port B

0.8

ERC

0.6

input clamp current

HIGH-level output current

port A

LOW-level output current

port A

port B

100

power-up ramp rate

200

s/V

amb

operating ambient temperature

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

10 of 23

9397 750 12936

Static characteristics

Table 10:

DC characteristics

amb

C to +85

C; values otherwise stated V

REF

= 1 V; V

= 1.5 V.

Symbol

Parameter

Conditions

Min

Typ

[1]

Max

Unit

input clamp voltage

= 3.0 V; I

= 19 mA

1.2

HIGH-level output
voltage

port A

= 3.0 V to 3.6 V;

100

0.2 -

= 3.0 V;

12 mA

2.4

= 3.0 V;

24 mA

2.2

LOW-level output
voltage

port A

= 3.0 to 3.6 V;

= 100

0.2

= 3.0 V;

= 12 mA

0.4

= 3.0 V;

= 24 mA

0.55

port B

= 3.0 V;

= 40 mA

0.2

= 3.0 V;

= 80 mA

0.4

= 3.0 V;

= 100 mA

0.5

input leakage current

control pins

= 3.6 V;

= V

or GND

port B

= 3.6 V;

= V

or GND

off

output OFF current

port A +
control pin

= 0 V;

= 0 V to 3.6 V

100

port B

= 0 V;

= 0 V to 1.5 V

300

HOLD

bus hold current,
A outputs

port A

= 3.0 V;

= 0.8 V

= 3.0 V;

= 2.0 V

overdrive current

port A

= 3.6 V;

= 0 V to V

[2]

500

OZH

HIGH OFF-state output
current

port B

= 3.6 V;

= 1.5 V

OZL

LOW OFF-state
output current

port B

= 3.6 V;

= 0.4 V

OFF-state output
current

port A

= 3.6 V;

= V

or GND

[3]

OZPU

power-up 3-state output
current

= 0 to 3.6 V; V

= 0.5 V to 3 V;

OE = LOW

OZPD

power-down 3-state
output current

= 3.6 to 0 V; V

= 0.5 V to 3 V;

OE = LOW

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

11 of 23

9397 750 12936

[1]

All typical values are measured at V

= 3.3 V and T

amb

= 25

[2]

This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to
another.

[3]

For I/O ports, this parameter I

includes the input leakage current.

[4]

This is the increase in supply current for each input that is at the specified TTL voltage level rather than V

or GND.

quiescent supply
current

outputs
HIGH

= 3.6 V;

= V

or GND;

= 0 mA

outputs
LOW

= 3.6 V;

= V

or GND;

= 0 mA

disabled

= 3.6 V;

= V

or GND;

= 0 mA

additional quiescent
supply current per input
pin; except port B

= 3.6 V; one input at

0.6 V; port A or control inputs

at V

or GN D

[4]

0.1

input capacitance

control pins

= 3.6 V;

= V

or 0

I/O capacitance

port A

= 3.6 V;

= V

or 0

port B

= 3.6 V;

= V

or 0

Table 10:

DC characteristics

...continued

amb

C to +85

C; values otherwise stated V

REF

= 1 V; V

= 1.5 V.

Symbol

Parameter

Conditions

Min

Typ

[1]

Max

Unit

Table 11:

Live insertion characteristics

amb

C to +85

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

(BIAS V

)

supply current

= 0 V to 3.0 V; V (port B) = 0 to 1.2 V;

(BIAS V

) = 3.0 V to 3.6 V

= 3.0 V to 3.6 V;

V (port B) = 0 to 1.2 V;
V

(BIAS V

) = 3.0 V to 3.6 V

output voltage

port B

= 0 V;

(BIAS V

) = 3.3 V

1.2

output current

port B

= 0 V; V (port B) = 0.4 V;

(BIAS V

) = 3 V to 3.6 V

= 0 V to 3.6 V; OE = 3.3 V;

V (port B) = 0 V to 1.5 V

300

= 0 V to 1.5 V;

OE = 0 V to 3.3 V;
V (port B) = 0 V to 1.5 V

300

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

12 of 23

9397 750 12936

10. Dynamic characteristics

Table 12:

Timing requirements over recommended supply voltage

= 1.2 V; V

REF

= 0.8 V and V

ERC

= V

or GND for GTL (unless otherwise noted; see Figures

and

amb

C to +85

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

pulse duration

CP HIGH or LOW; see Figures

and

3.0

LE HIGH; see Figures

and

3.0

set-up time

data before CP

; see Figures

and

2.7

data before LE

;

see Figures

and

2.8

hold time

data after CP

; see Figures

and

0.4

data after LE

;

see Figures

and

1.2

Table 13:

Port A to Port B switching

= 1.2 V; V

REF

= 0.8 V and V

ERC

= V

or GND for GTL (see

Figure 16

amb

C to +85

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

PLH

A to B

OEAB = OE = 0 V;
LEAB = 3 V

ERC

= V

;

see

Figure 10

3.1

5.3

6.2

PHL

2.2

3.8

6.2

PLH

CP to B

OEAB = OE = 0 V;
LEAB = 0 V

ERC

= V

;

see

Figure 4

3.4

5.9

7.2

PHL

2.4

4.1

6.0

PLH

LEAB to B

OEAB = OE = 0 V;
CP = 0 or 3 V

ERC

= V

;

see

Figure 8

3.3

5.7

7.0

PHL

2.6

4.6

6.8

PLH

OEAB or OE to B

LEAB = 3.0 V;
Port A = 0 V

ERC

= V

;

see

Figure 12

2.7

5.3

6.5

PHL

2.5

3.9

6.4

PLH

A to B

OEAB = OE = 0 V;
LEAB = 3 V

ERC

= GND;

see

Figure 10

2.3

4.4

5.3

PHL

1.7

2.7

4.4

PLH

CP to B

OEAB = OE = 0 V;
LEAB = 0 V

ERC

= GND;

see

Figure 4

2.7

5.2

6.1

PHL

1.8

3.7

5.3

PLH

LEAB to B

OEAB = OE = 0 V;
CP = 0 or 3 V

ERC

= GND;

see

Figure 8

2.5

4.8

6.5

PHL

2.0

3.6

5.3

PLH

OEAB or OE to B

LEAB = 3.0 V;
Port A = 0 V

ERC

= GND;

see

Figure 12

2.0

4.8

6.2

PHL

2.0

3.1

4.9

output slew rate

0.6 V to 1.0 V

ERC

= V

V/ns

ERC

= GND

V/ns

sk(o)

output edge skew

measured at V

REF

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

13 of 23

9397 750 12936

Table 14:

Port B to Port A switching

= 1.2 V; V

REF

= 0.8 V for GTL (see

Figure 15

amb

C to +85

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

max

maximum
frequency

160

MHz

PLH

B to A

OEBA = OE = 0 V;
LEBA = 3 V

see

Figure 11

1.8

2.6

4.9

PHL

2.3

4.2

5.3

PLH

CP to A

OEBA = OE = 0 V;
LEBA = 0 V

see

Figure 5

1.5

3.1

4.4

PHL

1.5

3.7

4.6

PLH

LEBA to A

OEBA = OE = 0 V

see

Figure 9

1.3

2.7

4.0

PHL

1.4

3.1

3.9

PZL

OEBA or OE to A

LEBA = 3.0 V;
Port B = 0 V

see

Figure 13

1.3

3.1

5.1

PLZ

1.7

2.8

6.1

PZH

LEBA = 3 V;
Port B = V

see

Figure 14

1.3

3.3

5.1

PHZ

1.7

3.3

6.1

sk(o)

output edge skew

measured at 1.5 V

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

14 of 23

9397 750 12936

Table 15:

Timing requirements over recommended supply voltage

= 1.5 V; V

REF

= 1 V and V

ERC

= V

or GND for GTL+ (unless otherwise noted).

amb

C to +85

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

pulse duration

CP HIGH or LOW; see Figures

and

3.0

LE HIGH; see Figures

and

3.0

set-up time

data before CP

; see Figures

and

2.7

data before LE

;

see Figures

and

2.8

hold time

data after CP

; see Figures

and

0.4

data after LE

;

see Figures

and

1.2

Table 16:

Port A to Port B switching

= 1.5 V; V

REF

= 1 V and V

ERC

= V

or GND for GTL+ (see Figures

and

amb

C to +85

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

PLH

A to B

OEAB = OE = 0 V;
LEAB = 3 V

ERC

= V

;

see

Figure 10

3.0

4.7

6.1

PHL

2.3

4.4

6.5

PLH

CP to B

OEAB = OE = 0 V;
LEAB = 0 V

ERC

= V

;

see

Figure 4

3.3

5.3

7.0

PHL

2.7

4.7

6.2

PLH

LEAB to B

OEAB = OE = 0 V;
CP = 0 or 3 V

ERC

= V

;

see

Figure 8

3.2

5.2

6.8

PHL

2.8

5.2

7.1

PLH

OEAB or OE to B

LEAB = 3.0 V;
Port A = 0 V

ERC

= V

;

see

Figure 12

3.2

4.8

6.5

PHL

2.6

4.6

6.6

PLH

A to B

OEAB = OE = 0 V;
LEAB = 3 V

ERC

= GND;

see

Figure 10

2.3

3.9

5.2

PHL

1.7

3.1

4.5

PLH

CP to B

OEAB = OE = 0 V;
LEAB = 0 V

ERC

= GND;

see

Figure 4

2.5

4.8

6.0

PHL

1.9

4.1

5.4

PLH

LEAB to B

OEAB = OE = 0 V;
CP = 0 or 3 V

ERC

= GND;

see

Figure 8

2.5

4.3

6.5

PHL

2.1

4.0

5.4

PLH

OEAB or OE to B

LEAB = 3.0 V;
Port A = 0 V

ERC

= GND;

see

Figure 12

2.1

4.4

6.1

PHL

2.0

3.4

5.0

output slew rate

0.6 V to 1.3 V

ERC

= V

V/ns

ERC

= GND

V/ns

sk(o)

output edge skew

measured at V

REF

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

15 of 23

9397 750 12936

10.1 AC waveforms

Table 17:

Port B to Port A switching

= 1.5 V; V

REF

= 1 V for GTL+ (see Figures

and

amb

C to +85

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

max

maximum
frequency

160

MHz

PLH

B to A

OEBA = OE = 0 V;
LEBA = 3 V

see

Figure 11

1.8

2.6

4.9

PHL

2.3

4.2

5.3

PLH

CP to A

OEBA = OE = 0 V;
LEBA = 0 V

see

Figure 5

1.5

3.1

4.4

PHL

1.5

3.7

4.6

PLH

LEBA to A

OEBA = OE = 0 V

see

Figure 9

1.3

2.7

4.0

PHL

1.4

3.1

3.9

PZL

OEBA or OE to A

LEBA = 3.0 V;
Port B = 0 V

see

Figure 13

1.3

3.1

5.1

PLZ

1.7

2.8

6.1

PZH

LEBA = 3 V;
Port B = V

see

Figure 14

1.3

3.3

5.1

PHZ

1.7

3.3

6.1

sk(o)

output edge skew

measured at 1.5 V

Test condition: OEAB = OE = 0 V

Test condition: OEAB = OE = 0 V; LEBA = 0 V

Fig 4.

CP to B timing.

Fig 5.

CP to A timing.

Test condition: OEAB = OE = 0 V

Fig 6.

LEAB set-up and hold times.

Fig 7.

LEBA set-up and hold times.

002aaa766

3.0 V

0 V

PLH

PHL

REF

1.5 V

input

Port B
output

1.5 V

Port A

input

1.5 V

0 V

3.0 V

002aaa767

3.0 V

0 V

PLH

PHL

1.5 V

input

Port A
output

REF

Port B

input

REF

0 V

REF

002aaa768

3.0 V

0 V

1.5 V

LEAB

input

1.5 V

Port A

input

1.5 V

0 V

3.0 V

002aaa769

3.0 V

0 V

1.5 V

LEBA

input

REF

Port B

input

REF

0 V

REF

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16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

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Test condition: OEAB = OE = 0 V; CP = 0 V or 3 V

Fig 8.

LEAB to B propagation delay.

Fig 9.

LEBA to A propagation delay.

Test conditions: OEAB = OE = 0 V; LEAB = 3 V

Test conditions: OEBA = OE = 0 V; LEBA = 3 V

Fig 10. A to B propagation delay.

Fig 11. B to A propagation delay.

Test conditions: LEAB = 3 V; Port A = 0 V

Test conditions: LEBA = 3 V; Port B = 0 V

Fig 12. OE or OEAB to B propagation delay.

Fig 13. OE or OEBA to A propagation delay.

Test conditions: LEBA = 3 V; Port B = V

Fig 14. OE or OEBA to A propagation delay.

002aaa770

3.0 V

0 V

PLH

PHL

REF

1.5 V

LEAB

input

Port B
output

002aaa771

3.0 V

0 V

PLH

PHL

1.5 V

LEBA

input

Port A
output

002aaa772

3.0 V

0 V

PLH

PHL

REF

1.5 V

Port A

input

Port B

input

002aaa773

0 V

PLH

PHL

1.5 V

REF

Port B

input

Port A

input

002aaa774

3.0 V

0 V

PHL

PLH

REF

1.5 V

OE or

OEAB

input

Port B
output

002aaa775

3.0 V

0 V

3.0 V

PZL

PLZ

+ 0.3 V

1.5 V

OE or

OEBA

input

Port A
output

002aaa776

3.0 V

0 V

PZH

PHZ

0.3 V

1.5 V

OE or

OEBA

input

Port A
output

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

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9397 750 12936

11. Test information

= Load resistor.

= Load capacitance including jig and probe capacitance.

= Termination resistance should be equal to the output impedance Z

of the pulse

generator.

Fig 15. Load circuitry for Port A output switching times.

= Load resistor.

= Load capacitance including jig and probe capacitance.

= Termination resistance should be equal to the output impedance Z

of the pulse

generator.

Fig 16. Load circuitry for Port B output switching times.

PULSE

GENERATOR

D.U.T.

50 pF

500

6 V
open
GND

002aaa777

500

PULSE

GENERATOR

D.U.T.

30 pF

12.5

002aaa778

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16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

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12. Package outline

Fig 17. TSSOP64 package outline (SOT646-1).

UNIT

(1)

(2)

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

JEITA

0.15
0.05

0.2
0.1

8
0

0.1

DIMENSIONS (mm are the original dimensions).

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

SOT646-1

00-08-21
03-02-18

detail X

(A )

0.25

1.05
0.85

0.27
0.17

0.2
0.1

17.1
16.9

6.2
6.0

0.5

0.2

8.3
7.9

0.89
0.61

0.08

0.75
0.45

TSSOP64: plastic thin shrink small outline package; 64 leads; body width 6.1 mm

SOT646-1

max.

1.2

2.5

5 mm

scale

pin 1 index

MO-153

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16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

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13. Soldering

13.1 Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology. A more in-depth account
of soldering ICs can be found in our

Data Handbook IC26; Integrated Circuit

Packages (document order number 9398 652 90011).

There is no soldering method that is ideal for all surface mount IC packages. Wave
soldering can still be used for certain surface mount ICs, but it is not suitable for fine
pitch SMDs. In these situations reflow soldering is recommended. In these situations
reflow soldering is recommended.

13.2 Reflow soldering

Reflow soldering requires solder paste (a suspension of fine solder particles, flux and
binding agent) to be applied to the printed-circuit board by screen printing, stencilling
or pressure-syringe dispensing before package placement. Driven by legislation and
environmental forces the worldwide use of lead-free solder pastes is increasing.

Several methods exist for reflowing; for example, convection or convection/infrared
heating in a conveyor type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending on heating method.

Typical reflow peak temperatures range from 215 to 270

C depending on solder

paste material. The top-surface temperature of the packages should preferably be
kept:

below 225

C (SnPb process) or below 245

C (Pb-free process)

for all BGA, HTSSON..T and SSOP..T packages

for packages with a thickness

2.5 mm

for packages with a thickness < 2.5 mm and a volume

350 mm

so called

thick/large packages.

below 240

C (SnPb process) or below 260

C (Pb-free process) for packages with

a thickness < 2.5 mm and a volume < 350 mm

so called small/thin packages.

Moisture sensitivity precautions, as indicated on packing, must be respected at all
times.

13.3 Wave soldering

Conventional single wave soldering is not recommended for surface mount devices
(SMDs) or printed-circuit boards with a high component density, as solder bridging
and non-wetting can present major problems.

To overcome these problems the double-wave soldering method was specifically
developed.

If wave soldering is used the following conditions must be observed for optimal
results:

Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave.

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16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

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9397 750 12936

For packages with leads on two sides and a pitch (e):

larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be

parallel to the transport direction of the printed-circuit board;

smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the

transport direction of the printed-circuit board.

The footprint must incorporate solder thieves at the downstream end.

For packages with leads on four sides, the footprint must be placed at a 45

angle

to the transport direction of the printed-circuit board. The footprint must
incorporate solder thieves downstream and at the side corners.

During placement and before soldering, the package must be fixed with a droplet of
adhesive. The adhesive can be applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the adhesive is cured.

Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250

C or

265

C, depending on solder material applied, SnPb or Pb-free respectively.

A mildly-activated flux will eliminate the need for removal of corrosive residues in
most applications.

13.4 Manual soldering

Fix the component by first soldering two diagonally-opposite end leads. Use a low
voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time
must be limited to 10 seconds at up to 300

When using a dedicated tool, all other leads can be soldered in one operation within
2 to 5 seconds between 270 and 320

13.5 Package related soldering information

[1]

For more detailed information on the BGA packages refer to the

(LF)BGA Application Note

(AN01026); order a copy from your Philips Semiconductors sales office.

[2]

All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the
maximum temperature (with respect to time) and body size of the package, there is a risk that internal
or external package cracks may occur due to vaporization of the moisture in them (the so called
popcorn effect). For details, refer to the Drypack information in the

Data Handbook IC26; Integrated

Circuit Packages; Section: Packing Methods.

Table 18:

Suitability of surface mount IC packages for wave and reflow soldering
methods

Package

[1]

Soldering method

Wave

Reflow

[2]

BGA, HTSSON..T

[3]

, LBGA, LFBGA, SQFP,

SSOP..T

[3]

, TFBGA, USON, VFBGA

not suitable

suitable

DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP,
HSQFP, HSSON, HTQFP, HTSSOP, HVQFN,
HVSON, SMS

not suitable

[4]

suitable

PLCC

[5]

, SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended

[5][6]

suitable

SSOP, TSSOP, VSO, VSSOP

not recommended

[7]

suitable

CWQCCN..L

[8]

, PMFP

[9]

, WQCCN..L

[8]

not suitable

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16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

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[3]

These transparent plastic packages are extremely sensitive to reflow soldering conditions and must
on no account be processed through more than one soldering cycle or subjected to infrared reflow
soldering with peak temperature exceeding 217

C measured in the atmosphere of the reflow

oven. The package body peak temperature must be kept as low as possible.

[4]

These packages are not suitable for wave soldering. On versions with the heatsink on the bottom
side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with
the heatsink on the top side, the solder might be deposited on the heatsink surface.

[5]

If wave soldering is considered, then the package must be placed at a 45

angle to the solder wave

direction. The package footprint must incorporate solder thieves downstream and at the side corners.

[6]

Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it
is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

[7]

Wave soldering is suitable for SSOP, TSSOP, VSO and VSOP packages with a pitch (e) equal to or
larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than
0.5 mm.

[8]

Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered
pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex
foil by using a hot bar soldering process. The appropriate soldering profile can be provided on
request.

[9]

Hot bar soldering or manual soldering is suitable for PMFP packages.

14. Revision history

Table 19:

Revision history

Rev Date

CPCN

Description

20040511

Product data (9397 750 12936).

9397 750 12936

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Product data

Rev. 01 -- 11 May 2004

22 of 23

Contact information

For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.

Fax: +31 40 27 24825

15. Data sheet status

[1]

Please consult the most recently issued data sheet before initiating or completing a design.

[2]

The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.

[3]

For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

16. Definitions

Short-form specification -- The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.

Limiting values definition -- Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.

Application information -- Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.

17. Disclaimers

Life support -- These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes -- Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status `Production'),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.

Level

Data sheet status

[1]

Product status

[2][3]

Definition

Objective data

Development

This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.

Preliminary data

Qualification

This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.

III

Product data

Production

This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).

All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.

The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.

Date of release: 11 May 2004

Document order number: 9397 750 12936

Contents

Philips Semiconductors

GTL1655

16-bit LVTTL-to-GTL/GTL+ bus transceiver with live insertion

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

Ordering information . . . . . . . . . . . . . . . . . . . . . 3

4.1

Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3

Pinning information . . . . . . . . . . . . . . . . . . . . . . 4

5.1

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

5.2

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5

Functional description . . . . . . . . . . . . . . . . . . . 6

6.1

Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8

Recommended operating conditions. . . . . . . . 9

Static characteristics. . . . . . . . . . . . . . . . . . . . 10

Dynamic characteristics . . . . . . . . . . . . . . . . . 12

10.1

AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . 15

Test information . . . . . . . . . . . . . . . . . . . . . . . . 17

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18

Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

13.1

Introduction to soldering surface mount
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

13.2

Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 19

13.3

Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 19

13.4

Manual soldering . . . . . . . . . . . . . . . . . . . . . . 20

13.5

Package related soldering information . . . . . . 20

Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21

Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 22

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: GTL1655DGG-T

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: GTL1655DGG-T