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Электронный компонент: HEF4028BP

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DATA SHEET
Product specification
File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4028B
MSI
1-of-10 decoder
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
January 1995
2
Philips Semiconductors
Product specification
1-of-10 decoder
HEF4028B
MSI
DESCRIPTION
The HEF4028B is a 4-bit BCD to 1-of-10 active HIGH
decoder. A 1-2-4-8 BCD code applied to inputs A
0
to A
3
causes the selected output to be HIGH, the other nine will
be LOW. If desired, the device may be used as a 1-of-8
decoder with enable; 3-bit octal inputs are applied to inputs
A
0
, A
1
and A
2
selecting an output O
0
to O
7
. Input A
3
then
becomes an active LOW enable, forcing the selected
output LOW when A
3
is HIGH. The HEF4028B may also
be used as an 8-output (O
0
to O
7
) demultiplexer with A
0
to
A
2
as address inputs and A
3
as an active LOW data input.
The outputs are fully buffered for best performance.
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
PINNING
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
HEF4028BP(N):
16-lead DIL; plastic
(SOT38-1)
HEF4028BD(F):
16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4028BT(D):
16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
A
0
to A
3
address inputs, 1-2-4-8 BCD
O
0
to O
9
outputs (active HIGH)
January 1995
3
Philips Semiconductors
Product specification
1-of-10 decoder
HEF4028B
MSI
Fig.3 Logic diagram.
January 1995
4
Philips Semiconductors
Product specification
1-of-10 decoder
HEF4028B
MSI
TRUTH TABLE
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
2. Extraordinary states.
INPUTS
OUTPUTS
A
3
A
2
A
1
A
0
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
O
8
O
9
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
H
H
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
L
L
L
H
H
L
L
L
L
L
L
L
H
L
L
L
L
H
H
H
L
L
L
L
L
L
L
H
L
L
H
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
H
L
L
L
L
L
L
L
L
L
H
H
L
H
L
L
L
L
L
L
L
L
L
L
L
(2)
H
L
H
H
L
L
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
L
L
L
L
L
L
L
L
L
H
H
H
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
L
January 1995
5
Philips Semiconductors
Product specification
1-of-10 decoder
HEF4028B
MSI
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
A
n
O
n
5
t
PHL
100
200
ns
73 ns
+
(0,55 ns/pF) C
L
HIGH to LOW
10
40
80
ns
29 ns
+
(0,23 ns/pF) C
L
15
30
60
ns
22 ns
+
(0,16 ns/pF) C
L
5
t
PLH
90
180
ns
63 ns
+
(0,55 ns/pF) C
L
LOW to HIGH
10
40
80
ns
29 ns
+
(0,23 ns/pF) C
L
15
30
60
ns
22 ns
+
(0,16 ns/pF) C
L
Output transition times
5
t
THL
60
120
ns
10 ns
+
(1,0 ns/pF) C
L
HIGH to LOW
10
30
60
ns
9 ns
+
(0,42 ns/pF) C
L
15
20
40
ns
6 ns
+
(0,28 ns/pF) C
L
5
60
120
ns
10 ns
+
(1,0 ns/pF) C
L
LOW to HIGH
10
t
TLH
30
60
ns
9 ns
+
(0,42 ns/pF) C
L
15
20
40
ns
6 ns
+
(0,28 ns/pF) C
L
V
DD
V
TYPICAL FORMULA FOR P (
W)
Dynamic power
5
350 f
i
+
(f
o
CL)
V
DD
2
where
dissipation per
10
2 200 f
i
+
(f
o
CL)
V
DD
2
f
i
= input freq. (MHz)
package (P)
15
7 350 f
i
+
(f
o
CL)
V
DD
2
f
o
= output freq. (MHz)
C
L
= total load cap. (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)