Äîêóìåíòàöèÿ è îïèñàíèÿ www.docs.chipfind.ru

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

DESCRIPTION

The HEF4750V frequency synthesizer is one of a pair of
LOCMOS devices, primarily intended for use in
high-performance frequency synthesizers, e.g. in all
communication, instrumentation, television and broadcast
applications. A combination of analogue and digital
techniques results in an integrated circuit that enables high
performance. The complementary device is the universal
divider type HEF4751V.

Together with a standard prescaler, the two LOCMOS
integrated circuits offer low-cost single loop synthesizers
with full professional performance. Salient features offered
(in combination with HEF4751V) are:

Wide choice of reference frequency using a single
crystal.

High-performance phase comparator

low phase

noise

low spurii.

System operation to

1 GHz.

Typical 15 MHz input at 10 V.

Flexible programming:

frequency offsets

ROM compatible

fractional channel capability.

Programme range 6

decades, including up to

3 decades of prescaler control.

Division range extension by cascading.

Built-in phase modulator.

Fast lock feature.

Out-of-lock indication.

Low power dissipation and high noise immunity.

APPLICATION INFORMATION

Some examples of applications for the HEF4750V in
combination with the HEF4751V are:

VHF/UHF mobile radios.

HF s.s.b. transceivers.

Airborne and marine communications and navaids.

Broadcast transmitters.

High quality radio and television receivers.

High performance citizens band equipment.

Signal generators.

SUPPLY VOLTAGE

RATING

RECOMMENDED OPERATING

0,5 to

9,5 to 10,5 V

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

HEF4750VD(F):

28-lead DIL; ceramic (cerdip)

(SOT135)

( ): Package Designator North America

Fig.1 Pinning diagram.

PINNING

phase comparator input, reference

phase comparator input

STB

strobe input

TCA

timing capacitor C

TCB

timing capacitor C

TCC

timing capacitor C

TRA

biasing pin (resistor R

)

analogue phase comparator output

digital phase comparator output

MOD

phase modulation input

out-of-lock indication

OSC

reference oscillator/buffer input

XTAL

reference oscillator/buffer output

to A

programming inputs/programmable divider

, NS

programming inputs, prescaler

OUT

reference divider output

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in

white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in

white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...

Fig.2

Block diagram comprising five basic functions: phase comparator 1 (PC1), phase comparator 2 (PC2), phase modulator, reference
oscillator and reference divider. These functions are described separately.

N.B. PC

= analogue output; PC

= 3-state output.

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

FUNCTIONAL DESCRIPTION

Phase comparator 1

Phase comparator 1 (PC1) is built around a SAMPLE and
HOLD circuit. A negative-going transition at the V-input
causes the hold capacitor (C

) to be discharged and after

a specified delay, caused by the Phase Modulator by
means of an internal V' pulse, it produces a positive-going
ramp. A negative-going transition at the R-input terminates

the ramp. Capacitor C

holds the voltage that the ramp

has attained. Via an internal sampling switch this voltage
is transferred to C

and in turn buffered and made

available at output PC

If the ramp terminates before an R-input is present, an
internal end of ramp (EOR) signal is produced.

These actions are illustrated in Fig.3.

The resultant phase characteristic is shown in Fig.4.

Fig.3 Waveforms associated with PC1.

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

Fig.4 Phase characteristic of PC

PC1 is designed to have a high gain, typically 3200 V/cycle
(at 12,5 kHz). This enables a low noise performance.

Phase comparator 2

Phase comparator 2 (PC2) has a wide range, which
enables faster lock times to be achieved than otherwise
would be possible. It has a linear

360

phase range,

which corresponds to a gain of typically 5 V/cycle.

This digital phase comparator has three stable states:

reset state,

V' leads R state,

R leads V' state.

Conversion from one state to another takes place
according to the state diagram of Fig.5.

Fig.5 State diagram of PC2.

Output PC

produces positive or negative-going pulses

with variable width; they depend on the phase relationship
of R and V'. The average output voltage is a linear function
of the phase difference. Output PC

remains in the high

impedance OFF-state in the region in which PC1 operates.
The resultant phase characteristic is shown in Fig.6.

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

Fig.6 Phase characteristic of PC

Strobe function

The strobe function is intended for applications requiring
extremely fast lock times. In normal operation the
additional strobe input (STB) can be connected to the
V-input and the circuit will function as described in the
previous sections.

In single, phase-locked-loop type frequency synthesizers,
the comparison frequency generally used is either the
nominal channel spacing or a sub-multiple. PC2 runs at
the higher frequency (a higher reference frequency must
also be used), whilst strobing takes place on the lower
frequency, thereby obtaining a decrease in lock time. In a
system using the Universal Divider HEF4751V, the output
OFS cycles on the lower frequency, the output OFF cycles
on the higher frequency.

Out-of-lock function

There are a number of situations in which the system goes
from the locked to the out-of-lock state (OL goes HIGH):

1. When V' leads R, however out of the range of PC1.

2. When R leads V'.

3. When an R-pulse is missing.

4. When a V-pulse is missing.

5. When two successive STB-commands occur, the first

without corresponding V-signal.

Phase modulator

The phase modulator only uses one external capacitor,
C

at pin TCB. A negative-going transition at the V-input

causes C

to produce a positive-going linear ramp. When

the ramp has reached a value almost equal to the
modulation input voltage (at MOD), the ramp terminates,
C

discharges and a start signal to the C

-ramp at TCA is

produced. A linear phase modulation is reached in this

way. If no modulation is required, the MOD-input must be
connected to a fixed voltage of a certain positive value up
to V

. Care must be taken that the V' pulse is never

smaller than the minimum value to ensure that the external
capacitor of PC1 (C

) can be discharged during that time.

Since the V' pulse width is directly related to the TCB ramp
duration, there is a requirement for the minimum value of
this ramp duration.

Reference oscillator

The reference oscillator normally operates with an external
crystal as shown in Fig.2. The internal circuitry can be
used as a buffer amplifier in case an external reference
should be required.

Reference divider

The reference divider consists of a binary divider with a
programmable division ratio of 1 to 1024 and a prescaler
with selectable division ratios of 1, 2, 10 and 100,
according to the following tables:

Binary divider

Prescaler

N (A

TO A

)

DIVISION RATIO

1024

1023

PROGRAMMING WORD

(NS

, NS

)

DIVISION RATIO

100

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

In this way suitable comparison frequencies can be
obtained from a range of crystal frequencies. The divider
can also be used as a `stand alone' programmable divider
by connecting input TRA to V

, which causes all internal

analogue currents to be switched off.

Biasing circuitry

The biasing circuitry uses an external current source or
resistor, which has to be connected between the TRA and
V

pins. This circuitry supplies all analogue parts of the

circuit. Consequently the analogue properties of the
device, such as gain, charge currents, speed, power
dissipation, impedance levels etc., are mainly determined
by the value of the input current at TRA. The TRA input
must be decoupled to V

, as shown in Fig.7. The value of

has to be chosen such that the TRA input is `clean', e.g.

10 nF at R

= 68 k

Fig.7 Decoupling of input TRA.

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)

Supply voltage

0,5 to

15 V

Voltage on any input

0,5 to V

0,5 V

D.C. current into any input or output

max.

10 mA

Power dissipation per package

for T

amb

= 0 to

tot

max.

500 mW

Power dissipation per output

for T

amb

= 0 to 85

max.

100 mW

Storage temperature

stg

65 to

150

Operating ambient temperature

amb

40 to

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

DC CHARACTERISTICS

at V

= 10 V

5%; voltages are referenced to V

= 0 V, unless otherwise specified; for definitions see note 1.

PARAMETER

SYMBOL

amb

(

UNIT

NOTES

MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX.

Quiescent device

current

100

750

Input current; logic

inputs, MOD

300

1000 nA

Output leakage current

3,4

TCA, hold-state

0,05

60 nA

TCC, analogue

switch OFF

0,05

60 nA

, high impedance

OFF-state

500 nA

Logic input voltage

LOW

max. 0,3 V

HIGH

max. 0,7 V

Logic output voltage

LOW; at

50 mV

HIGH

min. V

50 mV

Logic output current

LOW; at V

= 0,5 V

outputs OL, PC

OUT

5,5

4,6

3,6

output XTAL

2,8

2,4

1,9

Logic output current

HIGH;

at V

= V

0,5 V

outputs OL, PC

,OUT

1,5

1,3

1,0

output XTAL

1,4

1,2

0,9

Output TCC sink

current

2,1

3,4,5

Output TCC source

current

1,9

3,4,6

Internal resistance

of TCC

output swing

200 mV

specified output range:

0,3 V

to 0,7 V

0,7

3,4

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

Output TCC voltage

with respect to

TCA input voltage

3,4,7

Output PC

sink

current

1,1

3,4,8

Output PC

source

current

1,0

3,4,9

Internal resistance

of PC

output swing

200 mV

specified output range:

0,3 V

to 0,7 V

1,4

3,4

Output PC

voltage

with respect to

TCC input voltage

3,4,10

EOR generation

EOR

= V

TCA

EOR

0,9

0,7

0,6

3,4,11

Source current; HIGH

at V

OUT

;

output in ramp mode

3,4

TCA

TCB

2,5

PARAMETER

SYMBOL

amb

(

UNIT

NOTES

MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX.

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

AC CHARACTERISTICS

General note

The dynamic specifications are given for the circuit built-up with external components as given in Fig.8, under the
following conditions; for definitions see note 1; for definitions of times see Fig.19; V

= 10 V

5%; T

amb

= 25

C; input

transition times

20 ns; R

= 68 k

30% (see also note 4); C

= 270 pF; C

= 150 pF; C

= 1 nF; C

= 10 nF; unless

otherwise specified.

SYMBOL

MIN.

TYP.

MAX.

UNIT

CONDITIONS

NOTES

Slew rate

TCA

= minimum

TCA

= maximum

TCB

= minimum

TCB

= maximum

Ramp linearity

TCA

TCB

Start of TCA-ramp delay

CBCA

200

Delay of TCA-hold

RCA

Delay of TCA-discharge

VCA

Start of TCB-ramp delay

VCB

TCB-ramp duration

rCB

250

MOD

= 4 V

rCB

350

MOD

= 6 V

rCB

450

MOD

= 8 V

Required TCB min.

ramp duration

rCB

150

Pulse width

V : LOW

PWVL

V : HIGH

PWVH

R : LOW

PWRL

R : HIGH

PWRH

STB : LOW

PWSL

STB : HIGH

PWSH

Fall time

TCA

fCA

TCB

fCB

Prescaler input frequency

MHz

all division ratios

Binary divider frequency

DIV

MHz

all division ratios

Crystal oscillator frequency

OSC

MHz

Average power supply current

locked state

with speed-up 1 : 10

3,6

without speed-up

3,2

January 1995

Philips Semiconductors

Product specification

Frequency synthesizer

HEF4750V

LSI

Notes

1. Definitions:

= external biasing resistor between pins TRA and V

; 68 k

30%.

= external timing capacitor for time/voltage converter, between pins TCA and V

= external timing capacitor for phase modulator, between pins TCB and V

= external hold capacitor between pins TCC and V

= decoupling capacitor between pins TRA and V

Logic inputs: V, R, STB, A

to A

, NS

, OSC.

Logic outputs: OL, PC

, XTAL, OUT.

Analogue signals: TCA, TCB, TCC, TRA, PC

, MOD.

2. TRA at V

; TCA, TCB, TCC and MOD at V

; logic inputs at V

or V

3. All logic inputs at V

or V

4. R

connected; its value chosen such that I

TRA

= 100

5. The analogue switch is in the ON position (see Fig.9).

6. The analogue switch is in the ON position (see Fig.10).

7. See Fig.11.

This guarantees the d.c. voltage gain, combined with d.c.-offset.
Input condition: 0,3 V

TCA

0,7 V

V = V

TCC

TCA

8. See Fig.12.

9. See Fig.13.

10. See Fig.14.

This guarantees the d.c. voltage gain, combined with d.c.-offset.
Input condition: 0,3 V

TCC

0,7 V

V = V

PC1

TCC

11. Switching level at TCA, generating an EOR-signal, during increasing input voltage.

12. See Fig.15.

13. See Fig.16.

Definition of the ramp linearity at full swing.

14. The external components and modulation input voltage must be chosen such that this requirement will be fulfilled, to

ensure that C

is sufficiently discharged during that time.

15. See Fig.17.

Circuit connections for power supply current specification, with speed-up 1 : 10. V and R are in the range of PC1,
such that the output voltage at PC

is equal to 5 V.

OSC

= 5 MHz (external clock)

STB

= 12,5 kHz

= 125 kHz

16. See Fig.18.

Circuit connections for power supply current specification, without speed-up. V and R are in the range of PC1, such
that the output voltage at PC

is equal to 5 V.

OSC

= 5 MHz (external clock)

STB

= 12,5 kHz

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HEF4750VD

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HEF4750VD