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Электронный компонент: ICM7555IFE

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Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
337
August 31, 1994
853-1192 13721
DESCRIPTION
The ICM7555 is a CMOS timer providing significantly improved
performance over the standard NE/SE555 timer, while at the same
time being a direct replacement for those devices in most
applications. Improved parameters include low supply current, wide
operating supply voltage range, low THRESHOLD, TRIGGER, and
RESET currents, no crowbarring of the supply current during output
transitions, higher frequency performance and no requirement to
decouple CONTROL VOLTAGE for stable operation.
The ICM7555 is a stable controller capable of producing accurate
time delays or frequencies.
In the one-shot mode, the pulse width of each circuit is precisely
controlled by one external resistor and capacitor. For astable
operation as an oscillator, the free-running frequency and the duty
cycle are both accurately controlled by two external resistors and
one capacitor. Unlike the bipolar 555 device, the CONTROL
VOLTAGE terminal need not be decoupled with a capacitor. The
TRIGGER and RESET inputs are active low. The output inverter can
source or sink currents large enough to drive TTL loads or provide
minimal offsets to drive CMOS loads.
FEATURES
Exact equivalent in most applications for NE/SE555
Low supply current: 80
A (typ)
Extremely low trigger, threshold, and reset currents: 20pA (typ)
High-speed operation: 500kHz guaranteed
Wide operating supply voltage range guaranteed 3 to 16V over full
automotive temperatures
Normal reset function; no crowbarring of supply during output
transition
Can be used with higher-impedance timing elements than the
bipolar 555 for longer time constants
PIN CONFIGURATION
THRESHOLD
D and N Packages
DISCHARGE
VDD
CONTROL VOLTAGE
1
2
3
4
5
6
7
8
GND
TRIGGER
OUTPUT
RESET
Timing from microseconds through hours
Operates in both astable and monostable modes
Adjustable duty cycle
High output source/sink driver can drive TTL/CMOS
Typical temperature stability of 0.005%/
o
C at 25
C
Rail-to-rail outputs
APPLICATIONS
Precision timing
Pulse generation
Sequential timing
Time delay generation
Pulse width modulation
Pulse position modulation
Missing pulse detector
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
ORDER CODE
DWG #
8-Pin Plastic Dual In-Line Package (DIP)
0 to +70
C
ICM7555CN
0404B
8-Pin Plastic Small Outline (SO) Package
0 to +70
C
ICM7555CD
0174C
8-Pin Plastic Dual In-Line Package (DIP)
-40 to +85
C
ICM7555IN
0404B
8-Pin Plastic Small Outline (SO) Package
-40 to +85
C
ICM7555ID
0174C
Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
August 31, 1994
338
EQUIVALENT BLOCK DIAGRAM
NOTE:
UNUSED INPUTS SHOULD BE CONNECTED TO APPROPRIATE VOLTAGE FROM TRUTH TABLE.
V
DD
8
R
6
5
2
R
1
R
COMPARATOR
A
COMPARATOR
B
FLIPFLOP
RESET
4
OUTPUT
DRIVERS
3
OUTPUT
DISCHARGE
7
N
1
+
+
THRESHOLD
CONTROL
VOLTAGE
TRIGGER
TRUTH TABLE
THRESHOLD VOLTAGE
TRIGGER VOLTAGE
RESET
1
OUTPUT
DISCHARGE SWITCH
DON'T CARE
DON'T CARE
LOW
LOW
ON
>2/3(V+)
> 1/3(V+)
HIGH
LOW
ON
V
TH
< 2/3
V
TR
> 1/3
HIGH
STABLE
STABLE
DON'T CARE
<1/3(V+)
HIGH
HIGH
OFF
NOTES:
1. RESET will dominate all other inputs: TRIGGER will dominate over THRESHOLD.
ABSOLUTE MAXIMUM RATINGS
1
SYMBOL
PARAMETER
RATING
UNITS
V
DD
Supply voltage
+18
V
V
TRIG
1
Trigger input voltage
V
CV
Control voltage
> -0.3 to
V
TH
Threshold input voltage
<V
DD
+ 0.3
V
V
RST
RESET input voltage
I
OUT
Output current
100
mA
P
DMAX
Maximum power dissipation, T
A
= 25
C (still air)
2
N package
1160
mW
D package
780
mW
T
STG
Storage temperature range
-65 to +150
C
T
SOLD
Lead temperature (Soldering 60s)
300
C
NOTES:
1. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a voltage greater than
V
DD
+ 0.3V or less than GND -0.3V may cause destructive latch-up. For this reason it is recommended that no inputs from external sources
not operating from the same power supply be applied to the device before its power supply is established. In multiple systems, the supply of
the ICM7555 must be turned on first.
2. Derate above 25
C, at the following rates:
N package at 9.3mW/
C
D package at 6.2mW/
C
3. See "Power Dissipation Considerations" section.
Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
August 31, 1994
339
DC AND AC ELECTRICAL CHARACTERISTICS
T
A
= 25
C unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNITS
SYMBOL
PARAMETER
TEST CONDITIONS
ICM7555
UNITS
MIN
TYP
MAX
V
DD
Supply voltage
T
MIN
< T
A
< T
MAX
3
16
V
I
DD
Supply current
1
V
DD
= V
MIN
V
DD
= V
MAX
50
180
200
300
A
A
Astable mode timing
2
Initial accuracy
Drift with supply voltage
Drift with temperature
3
R
A
, R
B
= 1k to 100k, C = 0.1
F
5
V <V
DD
<15V
V
DD
= 5V
V
DD
= 10V
V
DD
= 15V
1.0
0.1
50
75
100
5.0
3.0
%
%/V
ppm/
o
C
ppm/
o
C
ppm/
o
C
V
TH
Threshold voltage
V
DD
= 5V
0.63
0.65
0.67
xV
DD
V
TRIG
Trigger voltage
V
DD
= 5V
0.29
0.31
0.34
xV
DD
I
TRIG
Trigger current
V
DD
= V
TRIG
= V
MAX
V
DD
= V
TRIG
= 5V
V
DD
= V
TRIG
= V
MIN
50
10
1
pA
pA
pA
I
TH
Threshold current
V
DD
= V
TH
= V
MAX
V
DD
= V
TH
= 5V
V
DD
= V
TH
= V
MIN
50
10
1
pA
pA
pA
I
RST
Reset current
V
DD
= V
RST
= V
MAX
V
DD
= V
RST
= 5V
V
DD
= V
RST
= V
MIN
100
20
2
pA
pA
pA
V
RST
Reset voltage
V
DD
= V
MIN
and V
MAX
0.4
0.7
1.0
V
V
CV
Control voltage
V
DD
= 5V
0.62
0.65
0.67
xV
DD
V
OL
Output voltage (low)
V
DD
= V
MAX
, I
SINK
= 3.2mA
V
DD
= 5V, I
SINK
= 3.2mA
0.1
0.2
0.4
0.4
V
V
V
OH
Output voltage (high)
V
DD
= V
MAX
, I
SOURCE
= -1.0mA
V
DD
= 5V, I
SOURCE
= -1.0mA
15.25
4.0
15.7
4.5
V
DD
V
DD
V
DIS
Discharge output voltage
V
DD
= 5V, I
DIS
= 10.0mA
0.2
0.4
V
t
R
Rise time of output
3
R
L
= 10M
, C
L
= 10pF, V
DD
=
5V
45
75
ns
t
F
Fall time of output
3
R
L
= 10M
, C
L
= 10pF, V
DD
=
5V
20
75
ns
F
MAX
Maximum oscillator frequency
(astable mode)
500
kHz
NOTES:
1. The supply current value is essentially independent of the TRIGGER, THRESHOLD, and RESET voltages.
2. Astable timing is calculated using the following equation: f =
1.38
(R
A
+ 2R
B
)C
. The components are defined in Figure 2.
3. Parameter is not 100% tested.
Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
August 31, 1994
340
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
High Output Voltage Drop vs Output Source Current
225
200
175
150
125
100
75
50
25
0
0
5
10
15
20
SUPPLY VOLTAGE (VDD)
SUPPL
Y
CURRENT (I ) (
A)
DD
TA = +25
C
TA = +125
C
TA = 55
C
VDD = 18V
VDD = 5V
VDD = 2V
TA = +25
C
100.0
10.0
1.0
0.1
0.1
1.0
10.0
OUTPUT SOURCE CURRENT 9mA)
VDD VOUT (V)
Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
August 31, 1994
341
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
100.0
10.0
1.0
0.1
0.1
1.0
10.0
DISCHARGE VOLTAGE (V)
DISCHARGE CURRENT (mA)
TA = 25
C
VDD = 18V
VDD = 5V
VDD = 2V
VDD = 18V
VDD = 5V
VDD = 2V
TA = +125
C
100.0
10.0
1.0
0.1
0.1
1.0
10.0
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
Discharge Low Output Voltage vs Discharge Sink Current
Low Output Voltage vs Output Sink Current
Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
August 31, 1994
342
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
100.0
10.0
1.0
0.1
0.1
1.0
10.0
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
TA = 25
C
VDD = 18V
VDD = 5V
VDD = 2V
VDD = 18V
VDD = 5V
VDD = 2V
TA = -55
C
100.0
10.0
1.0
0.1
0.1
1.0
10.0
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
0
10
20
30
40
500
400
300
200
100
0
PULSE WIDTH FOR TRIGGER (ns)
LOWEST LEVEL OF TRIGGER PULSE (%VDD)
Low Output Voltage vs Output Sink Current
Low Output Voltage vs Output Sink Current
Minimum Pulse Width for Triggering
VDD = 18V
VDD = 5V
VDD = 2V
Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
August 31, 1994
343
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
0
10
20
30
40
1.0
750.0
500.0
250.0
0.0
PROP
AGA
TION DELA
Y
(ns)
LOWEST VOLTAGE OF TRIGGER PULSE (%VDD)
Propagation Delay vs Voltage Level of Trigger Pulse
VDD = 5V
0
5
10
15
20
6
4
2
0
2
4
NORMALIZED FREQUENCY
(%)
SUPPLY VOLTAGE (VDD)
Normalized Frequency Stability as a Function of Supply Voltage (Astable Mode)
3
NORMALIZED FREQUENCY
(%)
4
2
0
2
4
5.0E1
2.5E1
0.0
25.0
50.0
75.0
100.0
125.0
TEMPERATURE (
C)
Normalized Frequency Stability as a Function of Temperature (Astable Mode)
VDD = 18V
VDD = 5V
VDD = 2V
RA = RB = 1k
C = 0.1
F
TA = +25
C
TA = +125
C
TA = 55
C
TA = +25
C
RA = RB = 10k
C = 0.1
F
Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
August 31, 1994
344
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Free-Running Frequency as a Function of R
A
, R
B
, and C
Monostable Time Delay vs R
A
and C
100.0
10.0
1.0
0.1
0.01
0.001
0.0001
0.0
0.1
1.0
10
100
1k
10k
100k
1M
10M
CAP
ACIT
ANCE ( F)
FREQUENCY (Hz)
100.0
10.0
1.0
0.1
0.01
0.001
0.0001
0.0
CAP
ACIT
ANCE ( F)
TIME DELAY
100ns
1ms
10ms
100ms
1s
10s
1
s
10
s
100
s
VDD = 5V
TA = +25
C
VDD = 5V
TA = +25
C
(RA + 2RB)
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
RA
Figure 1. Supply Current Transient
Compared With a Standard Bipolar 555
During an Output Transition
500
400
300
200
100
0
0
200
400
600
800
SUPPL
Y
CURRENT
(mA)
TIME (ns)
TA = +25
C
NE/SE555
ICM7555
APPLICATION NOTES
General
The ICM7555 device is, in most instances, a direct replacement for
the NE/SE555 device. However, it is possible to effect economies in
the external component count using the ICM7555. Because the
bipolar 555 device produces large crowbar currents in the output
driver, it is necessary to decouple the power supply lines with a
good capacitor close to the device. The 7555 device produces no
such transients. See Figure 1.
The ICM7555 produces supply current spikes of only 2-3mA instead
of 300-400mA and supply decoupling is normally not necessary.
Secondly, in most instances, the CONTROL VOLTAGE decoupling
capacitors are not required since the input impedance of the CMOS
comparators on chip are very high. Thus, for many applications, 2
capacitors can be saved using an ICM7555.
Power Supply Considerations
Although the supply current consumed by the ICM7555 device is
very low, the total system supply can be high unless the timing
components are high impedance. Therefore, high values for R and
low values for C in Figures 2 and 3 are recommended.
Output Drive Capability
The output driver consists of a CMOS inverter capable of driving
most logic families including CMOS and TTL. As such, if driving
CMOS, the output swing at all supply voltages will equal the supply
voltage. At a supply voltage of 4.5V or more, the ICM7555 will drive
at least 2 standard TTL loads.
Philips Semiconductors Linear Products
Product specification
ICM7555
General purpose CMOS timer
August 31, 1994
345
Astable Operation
If the circuit is connected as shown in Figure 2, it will trigger itself
and free run as a multivibrator. The external capacitor charges
through R
A
and R
B
and discharges through R
B
only. Thus, the duty
cycle (D) may be precisely set by the ratio of these two resistors. In
this mode of operation, the capacitor charges and discharges
between 1/3 V
DD
and 2/3 V
DD
. Since the charge rate and the
threshold levels are directly proportional to the supply voltage, the
frequency of oscillation is independent of the supply voltage.
1.38
(R
A
+ 2R
B
)
R
A
+ 2R
B
F =
C
D =
R
A
+ R
B
Monostable Operation
In this mode of operation, the timer functions as a one-shot. Initially,
the external capacitor (C) is held discharged by a transistor inside
the timer. Upon application of a negative pulse to Pin 2,TRIGGER,
the internal flip-flop is set which releases the low impedance on
DISCHARGE; the external capacitor charges and drives the
OUTPUT High. The voltage across the capacitor increases
exponentially with a time constant t = R
A
C. When the voltage
across the capacitor equals 2/3 V
+
, the comparator resets the
flip-flop, which in turn discharges the capacitor rapidly and also
drives the OUTPUT to its low state. TRIGGER must return to a high
state before the OUTPUT can return to a low state.
Control Voltage
The CONTROL VOLTAGE terminal permits the two trip voltages for
the THRESHOLD and TRIGGER internal comparators to be
controlled. This provides the possibility of oscillation frequency
modulation in the astable mode, or even inhibition of oscillation,
depending on the applied voltage. In the monostable mode, delay
times can be changed by varying the applied voltage to the
CONTROL VOLTAGE pin.
RESET
The RESET terminal is designed to have essentially the same trip
voltage as the standard bipolar 555, i.e., 0.6 to 0.7V. At all supply
voltages it represents an extremely high input impedance. The
mode of operation of the RESET function is, however, much
improved over the standard bipolar 555 in that it controls only the
internal flip-flop, which in turn controls simultaneously the state of
the OUTPUT and DISCHARGE pins. This avoids the multiple
threshold problems sometimes encountered with slow falling edges
in the bipolar devices.
1
2
3
4
8
7
6
5
GND
TRIGGER
OUTPUT
RESET
DISHCARGE
THRESHOLD
CONTROL
VOLTAGE
OUTPUT
V
DD
R
A
B
R
V
DD
V
DD
C
Figure 2. Astable Operation
1
2
3
4
8
7
6
5
TRIGGER
OUTPUT
RESET
DISHCARGE
THRESHOLD
CONTROL
VOLTAGE
V
DD
C
OPTIONAL
CAPACITOR
V
DD
< 18V
t = 1.05 R
A
C
R
A
Figure 3. Monostable Operation