Philips Semiconductors

Product specification

74F299

8-bit universal shift/storage register (3-State)

1990 Mar 01

853-0365 98989

FEATURES

Common parallel I/O for reduced pin count

Additional serial inputs and outputs for expansion

Four operating modes: Shift left, shift right, load and store

3-State outputs for bus-oriented applications

DESCRIPTION

The 74F299 is an 8-bit universal shift/storage register with 3-State
outputs. Four modes of operation are possible: Hold (store), shift
left, shift right and parallel load. The parallel load inputs and flip-flop
outputs are multiplexed to reduce the total number of package pins.
Additional outputs are provided for flip-flops Q0 and Q7 to allow
easy serial cascading. A separate active-Low Master Reset is used
to reset the register.

The 74F299 contains eight edge-triggered D-type flip-flops and the
interstage logic necessary to perform synchronous shift left, shift
right, parallel load and hold operations. The type of operation is
determined by S0 and S1, as shown in the Function Table. All
flip-flop outputs are brought out through 3-State buffers to separate
I/O pins that also serve as data inputs in the parallel load mode.
Q0 and Q7 are also brought out on other pins for expansion in serial
shifting of longer words.

A Low signal on MR overrides the Select and CP inputs and resets
the flip-flops. All other state changes are initiated by the rising edge
of the clock. Inputs can change when the clock is in either state
provided only that the recommended setup and hold times, relative
to the rising edge of clock are observed.

A High signal on either OE0 or OE1 disables the 3-State buffers and
puts the I/O pins in the high impedance state. In this condition the
shift, hold, load and reset operations can still occur. The 3-State
buffers are also disabled by High signals on both S0 and S1 in
preparation for a parallel load operation.

PIN CONFIGURATION

VCC

DS7

I/O7

I/O5

I/O3

I/O1

DS0

I/O6

I/O4

I/O2

I/O0

OE0

OE1

GND

SF00865

TYPE

TYPICAL f

MAX

TYPICAL

SUPPLY CURRENT

(TOTAL)

74F299

115MHz

58mA

ORDERING INFORMATION

ORDER CODE

DESCRIPTION

COMMERCIAL

RANGE

= 5V

10%,

amb

= 0

C to +70

PKG DWG #

20-pin plastic DIP

N74F299N

SOT146-1

20-pin plastic SOL

N74F299D

SOT163-1

20-pin plastic SSOP II

N74F299DB

SOT339-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74F(U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

DS0

Serial data input for right shift

1.0/1.0

A/0.6mA

DS7

Serial data input for left shift

1.0/1.0

A/0.6mA

S0, S1

Mode select inputs

1.0/2.0

A/1.2mA

Clock pulse input (Active rising edge)

1.0/1.0

A/0.6mA

Asynchronous Master Reset input (Active Low)

1.0/1.0

A/0.6mA

OE0, OE1

Output Enable input (Active Low)

1.0/1.0

A/0.6mA

Q0, Q7

Serial outputs

50/33

1.0mA/20mA

I/On

Multiplexed parallel data inputs or

3.5/1.0

A/0.6mA

I/On

3-State parallel outputs

150/40

3.0mA/24mA

NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20

A in the High State and 0.6mA in the Low state.

Philips Semiconductors

Product specification

74F299

8-bit universal shift/storage register (3-State)

1990 Mar 01

LOGIC SYMBOL

DS0

DS7

I/00

I/O2

I/O4

I/O6

I/O1

I/O3

I/O5

I/O7

OE0

OE1

VCC = Pin 20

GND = Pin 10

SF00866

LOGIC SYMBOL (IEEE/IEC)

SF00890

3EN13

C4/1

SRG8

1, 4D

0
3

3, 4D

5, 13

3, 4D

6, 13

3, 4D

12, 13

2, 4D

Z12

FUNCTION TABLE

INPUTS

OPERATING MODE

OEn

OPERATING MODE

Asynchronous Reset; Q0 - Q7 = Low

Parallel load; I/On

Qn (I/On outputs disabled)

Shift right; DS0

Q0, Q0

Q1, etc.

Shift left; DS7

Q7, Q7

Q6, etc.

Hold

Outputs in High Z

H = High voltage level
L = Low voltage level
X = Don't care

= Low-to-High clock transition

Philips Semiconductors

Product specification

74F299

8-bit universal shift/storage register (3-State)

1990 Mar 01

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.)

SYMBOL

PARAMETER

RATING

UNIT

Supply voltage

0.5 to +7.0

Input voltage

0.5 to +7.0

Input current

30 to +5

OUT

Voltage applied to output in High output state

0.5 to +V

Current applied to output in Low output state

Q0, Q7

OUT

Current applied to output in Low output state

I/On

amb

Operating free-air temperature range

0 to +70

stg

Storage temperature

65 to +150

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

LIMITS

UNIT

MIN

NOM

MAX

Supply voltage

4.5

5.0

5.5

High-level input voltage

2.0

Low-level input voltage

0.8

Input clamp current

High level output current

Q0, Q7

High-level output current

I/On

Low level output current

Q0, Q7

Low-level output current

I/On

amb

Operating free-air temperature range

Philips Semiconductors

Product specification

74F299

8-bit universal shift/storage register (3-State)

1990 Mar 01

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)

NO TAG

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

NO TAG

MIN

TYP

NO TAG

MAX

UNIT

Q0 Q7

= 1mA

10%V

2.5

High level output voltage

Q0, Q7

= MIN,

MAX

= 1mA

5%V

2.7

3.4

High-level output voltage

I/On

= MAX,

= MIN

= 3mA

10%V

2.4

I/On

= 3mA

5%V

2.7

3.3

Low level output voltage

= MIN,

MAX

= MAX

10%V

0.35

0.50

Low-level output voltage

= MAX,

= MIN

= MAX

5%V

0.35

0.50

Input clamp voltage

= MIN, I

= I

0.73

1.2

Input current at

others

= MAX, V

= 7.0V

100

In ut current at
maximum input voltage

I/On

= 5.5V, V

= 5.5V

High-level input current

except
I/On

= MAX, V

= 2.7V

Low level input current

S0, S1

= MAX V = 0 5V

1.2

Low-level input current

others

= MAX, V

= 0.5V

0.6

IH +

OZH

Off-state output current,
High-level voltage
applied

I/On
only

= MAX, V

= 2.7V

IL +

OZL

Off-state output current
Low-level voltage applied

only

= MAX, V

= 0.5V

0.6

Short-circuit output current

NO TAG

= MAX

150

CCH

Supply current (total)

CCL

= MAX

CCZ

NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V

= 5V, T

amb

= 25

3. Not more than one output should be shorted at a time. For testing I

, the use of high-speed test apparatus and/or sample-and-hold

techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I

tests should be performed last.

Philips Semiconductors

Product specification

74F299

8-bit universal shift/storage register (3-State)

1990 Mar 01

AC ELECTRICAL CHARACTERISTICS

LIMITS

amb

= +25

amb

= 0

C to +70

SYMBOL

PARAMETER

TEST CONDITIONS

= +5.0V

10%

UNIT

= 50pF, R

= 500

= 50pF, R

= 500

MIN

TYP

MAX

MIN

MAX

Maximum clock frequency

I/O

Waveform 1

100

MHz

MAX

Maximum clock frequency

Waveform 1

115

MHz

PLH

PHL

Propagation delay
CP to Q0 or Q7

Waveform 1

4.0
4.5

5.0
6.0

7.5
8.0

3.5
4.5

8.5
8.5

ns
ns

PLH

PHL

Propagation delay
CP to I/On

Waveform 1

4.0
4.0

6.0
6.5

9.0
9.0

4.0
4.0

10.0
10.0

ns
ns

PHL

Propagation delay
MR to Q0 or Q7

Waveform 2

5.5

7.5

9.5

5.5

10.5

PHL

Propagation delay
MR to I/On

Waveform 2

5.5

7.5

10.0

5.5

10.5

PZH

PZL

Output Enable time
Sn, OE to I/On

Waveform 4
Waveform 5

3.5
4.0

6.0
7.5

8.0

10.0

3.5
4.0

9.0

11.0

ns
ns

PHZ

PLZ

Output Disable time
Sn, OE to I/On

Waveform 4
Waveform 5

2.5
1.5

4.5
2.5

7.0
5.5

2.5
1.5

8.0
6.5

ns
ns

AC SETUP REQUIREMENTS

LIMITS

amb

= +25

amb

= 0

C to +70

SYMBOL

PARAMETER

TEST CONDITIONS

= +5.0V

10%

UNIT

= 50pF, R

= 500

= 50pF, R

= 500

MIN

TYP

MAX

MIN

MAX

(H)

(L)

Setup time, High or Low
S0 or S1 to CP

Waveform 3

6.5
6.5

7.5
7.5

ns
ns

(H)

(L)

Hold time, High or Low
S0 or S1 to CP

Waveform 3

0
0

ns
ns

(H)

(L)

Set-up time, High or Low
I/On, DS

or DS

to CP

Waveform 3

3.5
3.5

4.0
4.0

ns
ns

(H)

(L)

Hold time, High or Low
I/On, DS

or DS

to CP

Waveform 3

0
0

ns
ns

(H)

(L)

CP Pulse width, High or Low

Waveform 1

5.0
4.5

(L)

MR Pulse width, Low

Waveform 2

4.5

rec

Recovery time, MR to CP

Waveform 2

4.0

Philips Semiconductors

Product specification

74F299

8-bit universal shift/storage register (3-State)

1990 Mar 01

AC WAVEFORMS

For all waveforms, V

= 1.5V

The shaded areas indicate when the input is permitted to change for predictable output performance.

tPLH

tPHL

1/fMAX

tW(L)

Q0, Q7, I/On

tW(H)

SF00869

Waveform 1. Propagation Delay, Clock Input to Output,

Clock Width, and Maximum Clock Frequency

tPHL

tW(L)

tREC

Q0, Q7, I/On

SF00870

Waveform 2. Master Reset Pulse Width, Master Reset to Output

Delay, and Master Reset to Clock Recovery Time

S0, S1,

I/On

SF00871

ts(H)

th(H)

th(L)

ts(L)

Waveform 3. Setup and Hold Times

tPHZ

tPZH

Sn, OEn

I/On

VOH -0.3V

SF00872

Waveform 4. 3-State Output Enable Time to High Level

and Output Disable Time from High Level

tPLZ

tPZL

Sn, OEn

I/On

VOL +0.3V

SF00873

Waveform 5. 3-State Output Enable Time to Low Level and

Output Disable Time from Low Level

Philips Semiconductors

Product specification

74F299

8-bit universal shift/storage register (3-State)

1990 Mar 01

TEST CIRCUIT AND WAVEFORM

90%

10%

90%

10%

90%

10%

90%

10%

NEGATIVE
PULSE

POSITIVE
PULSE

AMP (V)

tTHL (tf

)

INPUT PULSE REQUIREMENTS

rep. rate

TLH

THL

1MHz

500ns

2.5ns

Input Pulse Definition

VCC

family

74F

D.U.T.

PULSE

GENERATOR

VIN

VOUT

Test Circuit for 3-State Outputs

DEFINITIONS:
R

= Load resistor;

see AC electrical characteristics for value.

= Load capacitance includes jig and probe capacitance;

see AC electrical characteristics for value.

= Termination resistance should be equal to Z

OUT

pulse generators.

tTHL (tf

)

tTLH (tr

)

tTLH (tr

)

AMP (V)

amplitude

3.0V

1.5V

7.0V

SF00777

TEST

SWITCH

PLZ

closed

PZL

closed

All other

open

SWITCH POSITION

Philips Semiconductors

Product specification

74F299

8-bit universal shift/storage register (3-State)

yyyy mmm dd

Definitions

Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.

Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381

print code

Date of release: 10-98

Document order number:

9397-750-05117

Philips

Semiconductors

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

[1]

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

Data sheet status

[1]

Please consult the most recently issued datasheet before initiating or completing a design.

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