Philips Semiconductors

Product specification

74F533,* 74F534

Latch/flip-flop

74F533 Octal Transparent Latch, Inverting (3-State)
74F534 Octal D Flip-Flop, Inverting (3-State)

1999 Jan 08

853-0374 20616

* Discontinued part. Please see the Discontinued Products List.

FEATURES

8-bit positive edge-triggered register 74F534

3-State inverting output buffers

Common 3-State Output register

Independent register and 3-State buffer operation

DESCRIPTION

The 74F533 is an octal transparent latch coupled to eight 3-State
output buffers. The two sections of the device are controlled
independently by Enable (E) and Output Enable (OE) control gates.

The data on the D inputs is transferred to the latch outputs when the
Enable (E) input is High. The latch remains transparent to the data
input while E is High and stores the data that is present one setup
time before the High-to-Low enable transition.

The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active Low Output Enable (OE) controls all eight 3-State buffers
independent of the latch operation. When OE is Low, the latched or
transparent data appears at the outputs. When OE is High, the
outputs are in high impedance "off" state, which means they will
neither drive nor load the bus.

The 74F534 is an 8-bit edge-triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the Clock (CP) and Output Enable (OE) control
gates.

The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition is transferred to
the corresponding flip-flop's Q output.

TYPE

TYPICAL

PROPAGATION DELAY

TYPICAL SUPPLY

CURRENT

(TOTAL)

74F533

5.5ns

41mA

TYPE

TYPICAL f

MAX

TYPICAL SUPPLY

CURRENT

(TOTAL)

74F534

165MHz

51mA

ORDERING INFORMATION

DESCRIPTION

COMMERCIAL

RANGE

= 5V

10%,

amb

= 0

C to +70

PKG DWG #

20-Pin Plastic DIP

N74F534N

SOT146-1

20-Pin Plastic SOL

N74F534D

SOT163-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74F (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

D0 - D7

Data inputs

1.0/1.0

A/0.6mA

E (74F533)

Enable input (active High)

1.0/1.0

A/0.6mA

Output Enable input (active Low)

1.0/1.0

A/0.6mA

CP (74F534)

Clock Pulse input (active rising edge)

1.0/1.0

A/0.6mA

Q0 - Q7

Data outputs

150/40

3.0mA/24mA

Philips Semiconductors

Product specification

74F533,* 74F534

Latch/flip-flop

1999 Jan 08

* Discontinued part. Please see the Discontinued Products List.

NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20

A in the High state and 0.6mA in the Low state.

PIN CONFIGURATION 74F533

GND

VCC

SF00981

PIN CONFIGURATION 74F534

GND

VCC

SF00982

LOGIC SYMBOL 74F533

SF00983

=Pin 20

GND=Pin 10

LOGIC SYMBOL (IEEE/IEC) 74F533

EN1

EN2

SF00985

LOGIC SYMBOL 74F534

SF00984

=Pin 20

GND=Pin 10

LOGIC SYMBOL (IEEE/IEC) 74F534

EN1

SF00986

Philips Semiconductors

Product specification

74F533,* 74F534

Latch/flip-flop

1999 Jan 08

* Discontinued part. Please see the Discontinued Products List.

LOGIC DIAGRAM 74F533

=Pin 20

GND=Pin 10

SF00987

LOGIC DIAGRAM 74F534

=Pin 20

GND=Pin 10

SF00988

FUNCTION TABLE 74F533

INPUTS

INTERNAL

OUTPUTS

OPERATING MODES

REGISTER

Q0 Q7

OPERATING MODES

Load and read register

Enable and read register

Hold

Disable outputs

H = High voltage level
h = High voltage level one setup time prior to the High-to-Low E transition
L = Low voltage level
l

= Low voltage level one setup time prior to the High-to-Low E transition

NC= No change
X = Don't care
Z = High impedance "off" state

= High-to-Low E transition

Philips Semiconductors

Product specification

74F533,* 74F534

Latch/flip-flop

1999 Jan 08

* Discontinued part. Please see the Discontinued Products List.

FUNCTION TABLE 74F534

INPUTS

INTERNAL

OUTPUTS

OPERATING MODES

REGISTER

Q0 Q7

OPERATING MODES

Load and read register

Hold

Disable outputs

H = High voltage level
h = High voltage level one setup time prior to the Low-to-High clock transition
L = Low voltage level
l

= Low voltage level one setup time prior to the Low-to-High clock transition

NC= No change
X = Don't care
Z = High impedance "off" state

= Low-to-High clock transition

= Not a Low-to-High clock transition

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)

SYMBOL

PARAMETER

RATING

UNIT

Supply voltage

0.5 to +7.0

Input voltage

0.5 to +7.0

Input current

30 to +5.0

OUT

Voltage applied to output in High output state

0.5 to +V

OUT

Current applied to output in Low output state

amb

Operating free-air temperature range

0 to +70

stg

Storage temperature

65 to +125

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

LIMITS

UNIT

SYMBOL

PARAMETER

MIN

NOM

MAX

UNIT

Supply voltage

4.5

5.0

5.5

High-level input voltage

2.0

Low-level input voltage

0.8

Input clamp current

High-level output current

Low-level output current

amb

Operating free-air temperature range

Philips Semiconductors

Product specification

74F533,* 74F534

Latch/flip-flop

1999 Jan 08

* Discontinued part. Please see the Discontinued Products List.

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNIT

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

High level output voltage

= MIN, V

= MAX,

10%V

2.4

High-level output voltage

MIN, V

MAX,

= MIN, I

= MAX

5%V

2.7

3.3

Low level output voltage

= MIN, V

= MAX,

10%V

0.35

0.50

Low-level output voltage

MIN, V

MAX,

= MIN, I

= MAX

5%V

0.35

0.50

Input clamp voltage

= MIN, I

= I

0.73

1.2

Input current at
maximum input voltage

= MAX, V

= 7.0V

100

High-level input current

= MAX, V

= 2.7V

Low-level input current

= MAX, V

= 0.5V

0.6

OZH

Off-state output current,
High-level voltage applied

= MAX, V

= 2.7V

OZL

Off-state output current,
Low-level voltage applied

= MAX, V

= 0.5V

Short-circuit output current

= MAX

150

Supply current (total)

74F533

= MAX

OE=4.5V, Dn=E=GND

Supply current (total)

74F534

= MAX

OE=4.5V, Dn=GND

NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V

= 5V, T

amb

= 25

3. Not more than one output should be shorted at a time. For testing I

, the use of high-speed test apparatus and/or sample-and-hold

techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I

tests should be performed last.

AC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL

PARAMETER

TEST

CONDITIONS

amb

= +25

= +5V

= 50pF, R

= 500

amb

= 0

C to +70

= +5V

10%

= 50pF, R

= 500

UNIT

MIN

TYP

MAX

MIN

MAX

PLH

PHL

Propagation delay
Dn to Qn

Waveform 2

4.0
3.0

6.0
4.5

8.5
7.0

4.0
3.0

9.5
8.0

PLH

PHL

Propagation delay
E to Qn

74F533

Waveform 3

5.0
3.0

6.5
4.5

9.5
7.0

5.0
3.0

10.0

8.0

PZH

PZL

Output Enable time
to High or Low level

74F533

Waveform 6
Waveform 7

2.0
2.0

4.5
5.0

7.0
7.0

2.0
2.0

8.0
8.0

PHZ

PLZ

Output Disable time
from High or Low level

Waveform 6
Waveform 7

2.0
2.0

3.5
3.0

6.0
5.5

2.0
2.0

7.0
6.5

MAX

Maximum Clock frequency

Waveform 1

150

165

135

MHz

PLH

PHL

Propagation delay
CP to Qn

Waveform 1

3.0
3.0

4.5
4.5

7.0
7.0

2.5
2.5

7.5
7.5

PZH

PZL

Output Enable time
to High or Low level

74F534

Waveform 6
Waveform 7

2.0
2.0

4.5
5.0

7.5
7.5

2.0
2.0

8.5
8.5

PHZ

PLZ

Output Disable time
from High or Low level

Waveform 6
Waveform 7

2.0
2.0

3.5
3.5

6.5
5.5

2.0
2.0

7.5
6.5

Philips Semiconductors

Product specification

74F533,* 74F534

Latch/flip-flop

1999 Jan 08

* Discontinued part. Please see the Discontinued Products List.

AC SETUP REQUIREMENTS

LIMITS

SYMBOL

PARAMETER

TEST

CONDITIONS

amb

= +25

= +5V

= 50pF, R

= 500

amb

= 0

C to +70

= +5.0V

10%

= 50pF, R

= 500

UNIT

MIN

TYP

MAX

MIN

MAX

(H)

(L)

Setup time,
Dn to E

Waveform 4

1.5

(H)

(L)

Hold time,
Dn to E

74F533

Waveform 4

2.5
2.5

(H)

E Pulse width,
High

Waveform 3

3.0

(H)

(L)

Setup time,
Dn to CP

Waveform 5

2.0
2.0

2.5
2.5

(H)

(L)

Hold time,
Dn to CP

74F534

Waveform 5

0
0

(H)

(L)

CP pulse width,
High or Low

Waveform 1

3.0
3.5

3.5
4.0

AC WAVEFORMS

For all waveforms, V

= 1.5V

The shaded areas indicate when the input is permitted to change for predictable output performance.

tW(H)

1/fMAX

tW(L)

tPLH

tPHL

SF00989

Waveform 1. Propagation Delay, Clock and Enable Inputs

to Output, Enable, Clock Pulse Widths,

and Maximum Clock Frequency

tPHL

tPLH

SF00990

Waveform 2. Propagation Delay for Data to Output

tW(H)

tW(L)

tPLH

tPHL

SF00991

Waveform 3. Propagation Delay, Enable Input to Output,

and Enable Pulse Width

Philips Semiconductors

Product specification

74F533,* 74F534

Latch/flip-flop

1999 Jan 08

* Discontinued part. Please see the Discontinued Products List.

AC WAVEFORMS (Continued)

For all waveforms, V

= 1.5V

The shaded areas indicate when the input is permitted to change for predictable output performance.

ts(L)

ts(H)

th(L)

th(H)

SF00992

Waveform 4. Data Setup and Hold Times

th(H)

ts(H)

SF00191

th(L)

ts(L)

Waveform 5. Data Setup and Hold Times

tPHZ

tPZH

VOH -0.3V

SF00994

Waveform 6. 3-State Output Enable Time to High Level

and Output Disable Time from High Level

tPLZ

tPZL

VOL +0.3V

SF00995

Waveform 7. 3-State Output Enable Time to Low Level

and Output Disable Time from Low Level

TEST CIRCUIT AND WAVEFORM

90%

10%

90%

10%

90%

10%

90%

10%

NEGATIVE
PULSE

POSITIVE
PULSE

AMP (V)

tTHL (tf

)

INPUT PULSE REQUIREMENTS

rep. rate

TLH

THL

1MHz

500ns

2.5ns

Input Pulse Definition

VCC

family

74F

D.U.T.

PULSE

GENERATOR

VIN

VOUT

Test Circuit for 3-State Outputs

DEFINITIONS:
R

= Load resistor;

see AC electrical characteristics for value.

= Load capacitance includes jig and probe capacitance;

see AC electrical characteristics for value.

= Termination resistance should be equal to Z

OUT

pulse generators.

tTHL (tf

)

tTLH (tr

)

tTLH (tr

)

AMP (V)

amplitude

3.0V

1.5V

7.0V

SF00777

TEST

SWITCH

PLZ

closed

PZL

closed

All other

open

SWITCH POSITION

Philips Semiconductors

Product specification

74F533*, 74F534

Latch/flip-flop

yyyy mmm dd

Definitions

Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.

Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381

print code

Date of release: 10-98

Document order number:

9397-750-05132

Philips

Semiconductors

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

[1]

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

Data sheet status

[1]

Please consult the most recently issued datasheet before initiating or completing a design.

* Discontinued part. Please see the Discontinued Product List.

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