ChipFind - документация

Электронный компонент: N74F539N

Скачать:  PDF   ZIP

Document Outline

Philips Semiconductors
Product specification
74F539
Dual 1-of-4 decoder (3-State)
1
1990 Feb 23
8531274 98905
DESCRIPTION
The 74F539 contains two independent decoders. Each accepts two
address (A0 - A1) input signals and decodes them to select one of
four mutually exclusive outputs. A Polarity control (P) input
determines whether the outputs are active Low (P=H) or active High
(P=L). An active-Low Enable (E) is available for data demultiplexing.
Data is routed to the selected output in non-inverted or inverted form
in the active-Low mode or inverted form in the active-High mode. A
High signal on the Output Enable (OEn) input forces the 3-State
outputs to the high impedance state.
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F539
7.5ns
40mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
10%, T
amb
= 0
C to +70
C
20-Pin Plastic DIP
N74F539N
20-Pin Plastic SOL
N74F539D
PIN CONFIGURATION
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
V
CC
Q3b
A1b
A0b
OEa
Pa
Q0a
Q1a
Q2b
Q1b
Q0b
A0a
A1a
Q3a
Q2a
GND
Eb
Ea
OEb
Pb
SF01013
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0a - A1a
Decoder A Address inputs
1.0/1.0
20
A/0.6mA
A0b - A1b
Decoder B Address inputs
1.0/1.0
20
A/0.6mA
Ea, Eb
Enable inputs (active Low)
1.0/1.0
20
A/0.6mA
OEa, OEb
Output Enable inputs (active Low)
1.0/1.0
20
A/0.6mA
Pa, Pb
Polarity control inputs
1.0/1.0
20
A/0.6mA
Q0aQ3a
Decoder A Data outputs
150/40
3.0mA/24mA
Q0bQ3b
Decoder A Data outputs
150/40
3.0mA/24mA
NOTE: One (1.0) FAST Unit Load is defined as: 20
A in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
6
7
17
V
CC
= Pin 20
GND = Pin 10
12
11
9
8
3
2
1
19
Q0a
Q1a
Q2a
Q3a
Q0b Q1b
Q2b
Q3b
Pa
Ea
OEa
Pb
Eb
OEb
13
15
14
4
16
5
A0a
A1a
A0b
SF01014
18
A1b
LOGIC SYMBOL (IEEE/IEC)
17
18
16
14
19
DMUX
1
2
3
5
0,4
0
1
G
0
3
SF01015
8
9
11
12
1,4
2,4
3,4
6
7
15
4
N4
EN
13
Philips Semiconductors
Product specification
74F539
Dual 1-of-4 decoder (3-State)
1990 Feb 23
2
LOGIC DIAGRAM
A1n
A0n
Pn
Q0n
Q1n
Q2n
Q3n
OEn
VCC =
Pin 20
GND =
Pin 10
12, 3
11, 2
9, 1
8, 19
7, 18
6, 17
13, 4
14, 5
SF01016
En
15, 16
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING MODE
OE
n
En
A1n
A0n
Q0n
Q1n
Q2n
Q3n
OPERATING MODE
H
X
X
X
Z
Z
Z
Z
High Impedance
L
H
X
X
Qn=P
Disable
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
H
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
Active High output
(P = L)
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
Active Low output
(P = H)
H = High voltage level
L = Low voltage level
X = Don't care
Z = High impedance "off" state
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Supply voltage
0.5 to +7.0
V
V
IN
Input voltage
0.5 to +7.0
V
I
IN
Input current
30 to +5
mA
V
OUT
Voltage applied to output in High output state
0.5 to +V
CC
V
I
OUT
Current applied to output in Low output state
48
mA
T
amb
Operating free-air temperature range
0 to +70
C
T
stg
Storage temperature
65 to +150
C
Philips Semiconductors
Product specification
74F539
Dual 1-of-4 decoder (3-State)
1990 Feb 23
3
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
NOM
MAX
UNIT
V
CC
Supply voltage
4.5
5.0
5.5
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
IK
Input clamp current
18
mA
I
OH
High-level output current
3
mA
I
OL
Low-level output current
24
mA
T
amb
Operating free-air temperature range
0
70
C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
TYP
2
MAX
UNIT
V
O
High level output voltage
V
CC
= MIN, V
IL
= MAX,
10%V
CC
2.4
V
V
OH
High-level output voltage
V
CC
= MIN, V
IL
= MAX,
V
IH
= MIN, I
OH
= MAX
5%V
CC
2.7
3.4
V
V
OL
Low-level output voltage
V
CC
= MIN, V
IL
= MAX,
10%V
CC
0.35
0.50
V
V
OL
Low-level output voltage
V
CC
= MIN, V
IL
= MAX,
V
IH
= MIN, I
OL
= MAX
5%V
CC
0.35
0.50
V
V
IK
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
0.73
1.2
V
I
I
Input current at maximum input
voltage
V
CC
= MAX, V
I
= 7.0V
100
A
I
IH
High-level input current
V
CC
= MAX, V
I
= 2.7V
20
A
I
IL
Low-level input current
V
CC
= MAX, V
I
= 0.5V
0.6
mA
I
OZH
Off-state output current
High-level voltage applied
V
CC
= MAX, V
O
= 2.7V
50
A
I
OZL
Off-state output current
Low-level voltage applied
V
CC
= MAX, V
O
= 0.5V
50
A
I
OS
Short-circuit output current
3
V
CC
= MAX
60
150
mA
I
CCH
35
50
mA
I
CC
Supply current
I
CCL
V
CC
= MAX
40
55
mA
I
CCZ
40
60
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25
C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
should be performed last.
Philips Semiconductors
Product specification
74F539
Dual 1-of-4 decoder (3-State)
1990 Feb 23
4
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
C
T
amb
= 0
C to +70
C
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
= +5.0V
V
CC
= +5.0V
10%
UNIT
C
L
= 50pF, R
L
= 500
C
L
= 50pF, R
L
= 500
MIN
TYP
MAX
MIN
MAX
t
PLH
t
PHL
Propagation delay
An to Qn
Waveform 1
4.5
3.0
8.5
8.0
12.5
12.5
4.0
3.0
13.5
13.0
ns
ns
t
PLH
t
PHL
Propagation delay
En to Qn
Waveform 2
5.0
3.0
7.5
7.0
11.0
11.0
4.5
3.0
12.0
11.5
ns
ns
t
PLH
t
PHL
Propagation delay
Pn to Qn
Waveform 1
4.0
3.5
6.5
5.5
9.5
9.0
3.5
3.0
10.5
9.5
ns
ns
t
PLH
t
PHL
Propagation delay
Pn to Qn (INV)
Waveform 2
6.0
4.0
11.5
6.0
14.5
9.0
5.0
4.0
15.5
9.5
ns
ns
t
PZH
t
PZL
Output Enable time
OEn to Qn
Waveform 3
Waveform 4
2.5
5.5
4.0
7.0
7.5
10.5
2.0
5.0
8.5
11.5
ns
ns
t
PHZ
t
PLZ
Output Disable time
OEn to Qn
Waveform 3
Waveform 4
1.5
2.0
3.0
4.0
6.0
8.0
1.0
1.5
6.5
8.5
ns
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
V
M
V
M
V
M
V
M
t
PHL
t
PLH
An, Pn
Qn
SF01017
Waveform 1. Propagation Delay for
Non-Inverting Outputs
V
M
V
M
V
M
V
M
t
PLH
t
PHL
En, Pn
Qn
SF01018
Waveform 2. Propagation Delay for
Inverting Outputs
V
M
V
M
V
M
t
PHZ
t
PZH
OEn
Qn
V
OH
-0.3V
0V
SF01019
Waveform 3. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
V
M
V
M
V
M
t
PLZ
t
PZL
OEn
Qn
V
OL
+0.3V
SF01020
Waveform 4. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
Philips Semiconductors
Product specification
74F539
Dual 1-of-4 decoder (3-State)
1990 Feb 23
5
TEST CIRCUIT AND WAVEFORM
tw
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
0V
tTHL (tf
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
t
THL
1MHz
500ns
2.5ns
2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN
VOUT
Test Circuit for 3-State Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
tTHL (tf
)
tTLH (tr
)
tTLH (tr
)
AMP (V)
amplitude
3.0V
1.5V
V
M
RL
7.0V
SF00777
TEST
SWITCH
t
PLZ
closed
t
PZL
closed
All other
open
SWITCH POSITION