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Электронный компонент: N74F544D

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Philips Semiconductors
74F543
Octal registered transceiver,
non-inverting (3-State)
74F544
Octal registered transceiver,
inverting (3-State)
Product specification
1994 Dec 5
INTEGRATED CIRCUITS
IC15 Data Handbook
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
74F543
Octal registered transceiver, non-inverting (3-State)
74F544
Octal registered transceiver, inverting 93-State)
2
1994 Dec 5
853-0874 14379
FEATURES
Combines74F245 and 74F373 type functions in one chip
8-bit octal transceiver with D-type latch
74F543 Non-inverting
74F544 Inverting
Back-to-back registers for storage
Separate controls for data flow in each direction
A outputs sink 20mA and source 3mA
B outputs sink 64mA and source 15mA
3-State outputs for bus-oriented applications
74F543 available in SSOP Type II package
DESCRIPTION
The 74F543 and 74F544 Octal Registered Transceivers contain two
sets of D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB, LEBA) and Output Enable
(OEAB, OEBA) inputs are provided for each register to permit
independent control of inputting and outputting in either direction of
data flow. While the 74F543 has non-inverting data path, the 74F544
inverts data in both directions. The A outputs are guaranteed to sink
24mA, while the B outputs are rated for 64mA.
FUNCTIONAL DESCRIPTION
The 74F543 and 74F544 contain two sets of eight D-type latches,
with separate input and controls for each set. For data flow from A to
B, for example, the A-to-B Enable (EAB) input must be Low in order
to enter data from A0 - A7 or take data from B0 - B7, as indicated in
the Function Table. With EAB Low, a Low signal on the A-to-B Latch
Enable (LEAB) input makes the A-to-B latches transparent; a
subsequent Low-to-High transition for the LEAB signal puts the
A latches in the storage mode and their outputs no longer change
with the A inputs. With EAB and OEAB both Low, the 3-State
B output buffers are active and display the data present at the
outputs of the A latches. Control of data flow from B to A is similar,
but using the EBA, LEBA, and OEBA inputs.
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F543
6.0ns
80mA
74F544
6.5ns
95mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
10%,
T
A
= 0
C to +70
C
DRAWING
NUMBER
24-pin plastic skinny DIP (300mil)
N74F543N,
N74F544N
SOT2221
24-pin plastic SOL
N74F543D,
N74F544D
SOT137-1
24-pin plastic SSOP Type II
74F543DB
SOT340-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0 - A7
Port A, 3-State inputs
3.5/1.0
70
A/0.6mA
B0 - B7
Port B, 3-State inputs
3.5/1.0
70
A/0.6mA
OEAB
A-to-B Output Enable input (Active Low)
1.0/1.0
20
A/0.6mA
74F543
OEBA
B-to-A Output Enable input (Active Low)
1.0/1.0
20
A/0.6mA
74F543
74F544
EAB
A-to-B Enable input (Active Low)
1.0/2.0
20
A/1.2mA
EBA
B-to-A Enable input (Active Low)
1.0/2.0
20
A/1.2mA
LEAB
A-to-B Latch Enable input (Active Low)
1.0/1.0
20
A/0.6mA
LEBA
B-to-A Latch Enable input (Active Low)
1.0/1.0
20
A/0.6mA
74F543
A0 - A7
Port A, 3-State outputs
150/40
3.0mA/24mA
74F543
B0 - B7
Port B, 3-State outputs
750/106.7
15mA/64mA
74F544
A0 - A7
Port A, 3-State outputs
150/40
3.0mA/24mA
74F544
B0 - B7
Port B, 3-State outputs
750/106.7
15mA/64mA
NOTE: One (1.0) FAST Unit Load is defined as: 20
A in the High State and 0.6mA in the Low state.
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
3
PIN CONFIGURATION 74F543
24
23
22
21
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
VCC
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
LEBA
OEBA
EAB
LEAB
OEAB
EBA
GND
SF00237
LOGIC SYMBOL (IEEE/IEC) 74F543
13
2
11
1
23
14
IEN3
G1
1C5
2EN4
G2
2C6
3
5D
4
6D
3
4
5
6
7
8
9
10
22
21
20
19
18
17
16
15
SF00239
LOGIC SYMBOL 74F543
11
23
14
1
EAB
EBA
LEAB
LEBA
VCC = Pin 24
A0 A1 A2 A3 A4 A5 A6 A7
B0 B1 B2 B3 B4 B5 B6 B7
13
2
22 21 20 19 18 17 16 15
3
4
5
6
7
8
9
10
SF00238
GND = Pin 12
OEAB
OEBA
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
4
PIN CONFIGURATION 74F544
24
23
22
21
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
VCC
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
LEBA
OEBA
EAB
LEAB
OEAB
EBA
GND
SF00240
LOGIC SYMBOL (IEEE/IEC) 74F544
13
2
11
1
23
14
IEN3
G1
1C5
2EN4
G2
2C6
3
5D
4
6D
3
4
5
6
7
8
9
10
22
21
20
19
18
17
16
15
SF00241
LOGIC SYMBOL 74F544
11
23
14
1
EAB
EBA
LEAB
LEBA
VCC = Pin 24
A0 A1 A2 A3 A4 A5 A6 A7
B0 B1 B2 B3 B4 B5 B6 B7
13
2
22 21 20 19 18 17 16 15
3
4
5
6
7
8
9
10
SF00242
GND = Pin 12
OEAB
OEBA
FUNCTION TABLE for 74F543 and 74F544
INPUTS
OUTPUTS
STATUS
OEXX
EXX
LEXX
DATA
74F543
74F544
H
X
X
X
Z
Z
Disabled
X
H
X
X
Z
Z
Disabled
L
L
h
Z
Z
Disable +
L
L
l
Z
Z
Disable +
Latch
L
L
h
H
L
Latch +
L
L
l
L
H
Latch +
Display
L
L
L
H
H
L
Transparent
L
L
L
L
L
H
Transparent
L
L
H
X
NC
NC
Hold
H
= High voltage level
L
= Low voltage level
h
= High state must be present one setup time before the
Low-to-High transition of LEXX or EXX (XX=AB or BA)
l
= Low state must be present one setup time before the
Low-to-High transition of LEXX or EXX (XX=AB or BA)
= Low-to-High transition of LEXX or EXX XX = AB or BA
X
= Don't care
NC = No change
Z
= High impedance "off" state
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
5
LOGIC DIAGRAM FOR 74F543
Q
D
LE
Q
D
LE
DETAIL A
DETAIL A X 7
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
OEAB
EAB
LEAB
OEBA
EBA
LEBA
22
3
4
5
6
7
8
9
10
2
23
1
21
20
19
18
17
16
15
13
11
14
SF00243
V
CC
= Pin 24
GND = Pin 12
LOGIC DIAGRAM FOR 74F544
Q
D
LE
Q
D
LE
DETAIL A
DETAIL A X 7
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
OEAB
EAB
LEAB
OEBA
EBA
LEBA
3
4
5
6
7
8
9
10
2
23
1
22
21
20
19
18
17
16
15
13
11
14
SF00244
V
CC
= Pin 24
GND = Pin 12
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
6
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Supply voltage
-0.5 to +7.0
V
V
IN
Input voltage
-0.5 to +7.0
V
I
IN
Input current
-30 to +5
mA
V
OUT
Voltage applied to output in High output state
-0.5 to +5.5
V
I
O
Current applied to output in Low output state
A0 - A7, A0 - A7
48
mA
I
OUT
Current applied to output in Low output state
B0 - B7, B0 - B7
128
mA
T
amb
Operating free-air temperature range
0 to +70
C
T
STG
Storage temperature
-65 to +150
C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
NOM
MAX
UNIT
V
CC
Supply voltage
4.5
5.0
5.5
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
IK
Input clamp current
-18
mA
I
O
High level output current
A0 - A7, A0 - A7
-3
mA
I
OH
High-level output current
B0 - B7, B0 - B7
-15
mA
I
O
Low level output current
A0 - A7, A0 - A7
24
mA
I
OL
Low-level output current
B0 - B7, B0 - B7
64
mA
T
amb
Operating free-air temperature range
-0
+70
C
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
7
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
TYP
2
MAX
UNIT
A0 - A7,
V
CC
= MIN
I
OH
= -3mA
"
10%V
CC
2.4
V
V
OH
High-level output voltage
A0 - A7
V
CC
= MIN
V
IL
= MAX
I
OH
= -3mA
"
5%V
CC
2.7
3.4
V
V
OH
High-level out ut voltage
B0 - B7,
V
IL
= MAX
V
IH
= MIN
I
OH
= -15mA
"
10%V
CC
2.0
V
B0 - B7
V
IH
MIN
I
OH
= -15mA
"
5%V
CC
2.0
V
A0 - A7,
V
CC
= MIN
I
OL
= 24mA
"
10%V
CC
0.35
0.50
V
V
OL
Low-level output voltage
A0 - A7
V
CC
= MIN
V
IL
= MAX
I
OL
= 24mA
"
5%V
CC
0.35
0.50
V
V
OL
Low-level out ut voltage
B0 - B7,
V
IL
= MAX
V
IH
= MIN
I
OL
= 64mA
"
10%V
CC
0.55
V
B0 - B7
V
IH
MIN
I
OL
= 64mA
"
5%V
CC
0.42
0.55
V
V
IK
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
0.73
1.2
V
I
I
Input current at maximum
OEAB, OEBA, EAB
V
CC
= MAX, V
I
= 7.0 V
100
A
I
I
input voltage
Others
V
CC
= 5.5, V
I
= 5.5V
1
mA
I
IH
High-level input current
V
CC
= MAX, V
I
= 2.7V
20
A
Others
0.6
mA
I
IL
Low-level input current
EAB,
EBA
V
CC
= MAX, V
I
= 0.5V
1.2
mA
I
OZH
+ I
IH
Off-state output current, high-level voltage applied
V
CC
= MAX, V
O
= 2.7V
70
A
I
OZH
+ I
IL
Off-state output current, Low-level voltage applied
V
CC
= MAX, V
O
= 0. 5V
600
A
I
OS
Short-circuit output current
3
A0 - A7,
A0 - A7
V
CC
= MAX
60
150
mA
I
OS
Short-circuit out ut current
3
B0 - B7,
B0 - B7
V
CC
= MAX
100
225
mA
I
CCH
70
105
mA
74F543
I
CCL
V
CC
= MAX
95
135
mA
I
CC
Supply current (total)
I
CCZ
95
135
mA
I
CC
Su
ly current (total)
I
CCH
80
110
mA
74F544
I
CCL
V
CC
= MAX
105
140
mA
I
CCZ
100
135
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under the recommended operating conditions for the applicable
type.
2. All typical values are at V
CC
= 5V, T
amb
= 25
C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
8
AC ELECTRICAL CHARACTERISTICS FOR 74F543
74F543 LIMITS
T
amb
= +25
C
T
amb
= 0
C to +70
C
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
= 5.0V
V
CC
= 5.0V
10%
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
C
L
= 50pF
R
L
= 500
C
L
= 50pF
R
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
t
PLH
t
PHL
Propagation delay
A
n
to B
n
Waveform 2
3.5
3.0
5.5
5.0
8.5
8.0
3.0
2.5
9.0
8.5
ns
t
PLH
t
PHL
Propagation delay
B
n
to A
n
Waveform 2
2.5
2.5
4.0
4.5
7.0
7.5
2.5
2.5
7.5
8.0
ns
t
PLH
t
PHL
Propagation delay
LEBA to A
n
Waveform NO TAG, 2
5.0
4.0
7.0
6.0
10.0
9.0
4.5
4.0
11.0
9.5
ns
t
PLH
t
PHL
Propagation delay
LEAB to B
n
Waveform NO TAG, 2
6.0
4.5
8.5
6.5
11.5
9.5
5.5
4.0
12.5
10.0
ns
t
PZH
t
PZL
Output Enable time
OEBA to A
n
or OEAB to B
n
Waveform 4
Waveform 5
2.0
3.5
4.0
5.0
7.5
8.5
1.5
3.0
8.0
9.0
ns
t
PHZ
t
PLZ
Output Disable time
OEBA to A
n
or OEAB to B
n
Waveform 4
Waveform 5
1.0
1.5
3.0
4.0
6.5
7.5
1.0
1.0
7.5
8.5
ns
t
PZH
t
PZL
Output Enable time
EBA to A
n
or EAB to B
n
Waveform 4
Waveform 5
4.5
5.0
7.0
7.0
10.5
10.5
4.0
4.5
11.5
11.0
ns
t
PHZ
t
PLZ
Output Disable time
EBA to A
n
or EAB to B
n
Waveform 4
Waveform 5
2.5
4.5
5.0
7.0
8.5
11.0
2.0
3.0
9.5
12.0
ns
AC SETUP REQUIREMENTS FOR 74F543
74F543 LIMITS
T
amb
= +25
C
T
amb
= 0
C to +70
C
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
= 5.0V
V
CC
= 5.0V
10%
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
C
L
= 50pF
R
L
= 500
C
L
= 50pF
R
L
= 500
UNIT
MIN
TYP
MIN
MAX
t
s
(H)
t
s
(L)
Setup time, High or Low
A
n
to LEAB or B
n
to LEBA
Waveform 3
0.0
2.5
0.0
3.0
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
A
n
to LEAB or B
n
to LEBA
Waveform 3
0.0
1.5
0.0
2.0
ns
t
s
(H)
t
s
(L)
Setup time, High or Low
A
n
to EAB or B
n
to EBA
Waveform 3
1.0
2.5
1.5
3.0
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
A
n
to EAB or B
n
to
EBA
Waveform 3
0.0
1.5
0.0
2.0
ns
t
w
(L)
Latch enable pulse width, Low
Waveform 3
4.0
4.5
ns
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
9
AC ELECTRICAL CHARACTERISTICS FOR 74F544
74F544 LIMITS
T
amb
= +25
C
T
amb
= 0
C to +70
C
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
= 5.0V
V
CC
= 5.0V
10%
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
C
L
= 50pF
R
L
= 500
C
L
= 50pF
R
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
t
PLH
t
PHL
Propagation delay
A
n
to B
n
or B
n
to A
n
Waveform NO TAG
3.0
3.0
6.5
5.0
9.5
8.0
3.0
3.0
10.5
8.5
ns
t
PLH
t
PHL
Propagation delay
LEBA to A
n
Waveform NO TAG, 2
4.0
4.0
7.0
7.0
9.5
9.5
4.0
4.0
10.5
10.5
ns
t
PLH
t
PHL
Propagation delay
LEAB to B
n
Waveform NO TAG, 2
5.0
4.0
8.0
7.5
11.5
9.5
4.0
4.0
12.5
10.5
ns
t
PZH
t
PZL
Output Enable time
OEBA to A
n
or OEAB to B
n
Waveform 4
Waveform 5
2.0
3.5
4.0
5.5
7.0
8.5
1.5
3.0
7.5
9.0
ns
t
PHZ
t
PLZ
Output Disable time
OEBA to A
n
or OEAB to B
n
Waveform 4
Waveform 5
1.0
1.5
4.0
4.0
6.5
6.5
1.0
1.5
7.0
7.5
ns
t
PZH
t
PZL
Output Enable time
EBA to A
n
or EAB to B
n
Waveform 4
Waveform 5
4.0
4.5
7.0
8.0
9.5
11.0
3.5
4.5
10.0
12.0
ns
t
PHZ
t
PLZ
Output Disable time
EBA to A
n
or EAB to B
n
Waveform 4
Waveform 5
2.5
4.5
5.0
8.5
8.0
11.5
2.5
4.0
9.0
11.5
ns
AC SETUP REQUIREMENTS FOR 74F544
74F544 LIMITS
T
amb
= +25
C
T
amb
= 0
C to +70
C
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
= 5.0V
V
CC
= 5.0V
10%
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
C
L
= 50pF
R
L
= 500
C
L
= 50pF
R
L
= 500
UNIT
MIN
TYP
MIN
MAX
t
s
(H)
t
s
(L)
Setup time, High or Low
A
n
to LEAB or B
n
to LEBA
Waveform 3
1.5
1.5
2.0
2.5
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
A
n
to LEAB or B
n
to LEBA
Waveform 3
1.5
2.0
2.5
2.5
ns
t
s
(H)
t
s
(L)
Setup time, High or Low
A
n
to EAB or B
n
to EBA
Waveform 3
1.5
1.5
2.5
2.5
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
A
n
to EAB or B
n
to EBA
Waveform 3
1.5
2.0
2.0
2.0
ns
t
w
(L)
Latch enable pulse width, Low
Waveform 3
4.0
4.5
ns
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
10
AC WAVEFORMS
V
M
= 1.5V
The shaded areas indicate when the input is permitted to change for predictable output performance.
VM
VM
VM
VM
tPLH
tPHL
VIN
VOUT
SF00245
Waveform 1. Propagation Delay for Inverting Outputs
VM
VM
VM
VM
tPHL
tPLH
VIN
VOUT
SF00246
Waveform 2. Propagation Delay for Non-Inverting Outputs
VM
VM
VM
VM
th(L)
th(H)
tw(L)
VM
VM
ts(H)
ts(L)
A
n
B
n
A
n
B
n
LEAB, LEBA
EAB, EBA
SF00247
Waveform 3. Data Setup Time and Hold Times, and Latch
Enable Pulse Width
VM
VM
VM
tPHZ
tPZH
VOH -0.3V
0V
A
n,
B
n
A
n,
B
n
OEAB, OEBA
EAB, EBA
SF00248
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
VM
VM
VM
tPLZ
tPZL
VOL +0.3V
A
n,
B
n
A
n,
B
n
OEAB, OEBA
EAB, EBA
SF00249
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
1994 Dec 5
11
TEST CIRCUIT AND WAVEFORMS
tw
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
0V
tTHL (tf
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
t
THL
1MHz
500ns
2.5ns
2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN
VOUT
Test Circuit for Open Collector Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
tTHL (tf
)
tTLH (tr
)
tTLH (tr
)
AMP (V)
amplitude
3.0V
1.5V
V
M
RL
7.0V
SF00128
TEST
SWITCH
t
PLZ
closed
t
PZL
closed
All other
open
SWITCH POSITION
Philips Semiconductors
Product specification
74F543, 74F544
Bus transceivers
1994 Dec 05
12
DIP24:
plastic dual in-line package; 24 leads (300 mil)
SOT222-1
Philips Semiconductors
Product specification
74F543, 74F544
Bus transceivers
1994 Dec 05
13
SO24:
plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
Philips Semiconductors
Product specification
74F543, 74F544
Bus transceivers
1994 Dec 05
14
SSOP24:
plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
Philips Semiconductors
Product specification
74F543, 74F544
Bus transceivers
1994 Dec 05
15
NOTES
Philips Semiconductors
Product specification
74F543, 74F544
Octal registered transceivers
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1994
All rights reserved. Printed in U.S.A.
(print code)
Date of release: July 1994
Document order number:
9397-750-05135