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Электронный компонент: N74F595N

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Philips
Semiconductors
74F595
8-bit shift register with output laches
(3-State)
Product specification
IC15 Data Handbook
1990 Apr 18
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
2
1990 Apr 18
8531096 99392
FEATURES
Low noise, now switching feedthrough current
Controlled output edge rates
High impedance PNP base inputs for reduced loading
(20
A in High and Low states)
8-bit serial-in, parallel-out shift register with storage
3-state outputs
Shift register has direct clear
Guaranteed shift frequency-DC to 100MHz
DESCRIPTION
The 74F595 contains an 8-bit serial-in, parallel-out shift register that
feeds an 8-bit D-type storage register. The storage register has
parallel 3-State outputs. Separate clocks are provided for both the
shift register and the storage register. The shift register has a direct
overriding clear, serial input and serial output pins for cascading.
Both the shift register and storage register clocks are positive
edge-triggered. If the user wishes to connect both clocks together,
the shift register state will always be one clock pulse ahead of the
storage register.
This device uses patented circuitry to control system noise and
internal ground bounce. This is done by eliminating switching
feedthrough current and controlling both Low-to-High and
High-to-Low slew rates.
PIN CONFIGURATION
16
15
14
13
12
11
10
7
6
5
4
3
2
1
Q7
V
CC
STCP
SHCP
SHR
OE
Q0
DS
Q1
Q2
Q6
Q3
Q4
Q5
SF01096
9
8
GND
QS
TYPE
TYPICAL f
MAX
TYPICAL SUPPLY CURRENT
(TOTAL)
74F595
130MHz
65mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
10%,
T
amb
= 0
C to +70
C
PKG DWG #
16-pin plastic DIP
N74F595N
SOT38-4
16-pin plastic SO
N74F595D
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Ds
Serial data input
1.0/0.033
20
A/20
A
SHCP
Shift register clock pulse input (active rising edge)
1.0/0.033
20
A/20
A
STCP
Storage register clock pulse input (active rising edge)
1.0/0.033
20
A/20
A
SHR
Shift register reset input (active Low)
1.0/0.033
20
A/20
A
OE
Output Enable input (active Low)
1.0/0.033
20
A/20
A
Qs
Serial expansion output
50/33
1.0mA/20mA
Q0Q7
Data outputs
150/40
3.0mA/24mA
NOTE:
One (1.0) FAST unit load is defined as: 20
A in the High state and 0.6mA in the Low state.
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
3
LOGIC SYMBOL
12
13
OE
STCP
15
1
2
3
Q0
Q1
Q2
Q3
10
11
SHCP
SHR
SF01097
VCC = Pin 16
GND = Pin 8
14
Ds
9
Qs
4
5
6
Q4
Q5
Q6
7
Q7
IEC/IEEE SYMBOL (IEEE/IEC)
SF01098
14
1D
EN3
C1/
!
13
12
10
11
2
3
4
C2
3
15
1
R
SRG8
2D
6
7
9
5
3
2D
MODE SELECT FUNCTION TABLE
INPUTS
INTERNAL SHIFT
REGISTERS
INTERNAL STORAGE
REGISTER
OUTPUTS
OPERATING
MODES
OE
SHR
SHCP
STCP
Dn
O0
O1O7
Q0Q7
Q0Q7
QS
MODES
H
H
X
O0
O1O7
Q0Q7
Z
Q7
No Change
H
L
X
X
L0
L
Q0Q7
Z
L
Clear shift
L
L
X
X
L0
L
Q0Q7
Q0Q7
L
register, hold latch
H
H
ds
Ds
o0o6
Q0Q7
Z
o6
Shift
L
H
ds
Ds
o0o6
Q0Q7
Q0Q7
o6
Shift
H
H
X
O0
O1O7
o0o7
Z
Q7
Store
L
H
X
O0
O1O7
o0o7
o0o7
Q7
Store
H
H
ds
Ds
o0o6
o0o7*
Z
o6
Store then Shift
L
H
ds
Ds
o0o6
o0o7*
o0o*
o6
Store, then Shift
H = High voltage level
L
= Low voltage level
X = Don't care
Z = High impedance
dn (on)=Lower case letters indicate the state of the referenced input (or output) one setup time prior to the Low-to-High clock transition
= Low-to-High clock transition
= Not a Low-to-High clock transition
*
= When clocking both SHCP and STCP simultaneously the Shift Register state will always be one clock pulse ahead of the Storage
Register
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
4
LOGIC DIAGRAM
VCC = Pin 16
GND = Pin 8
SF01099
15
Q0
OE
STCP
SHCP
SHR
Ds
13
12
11
10
14
R
Q
CP
S
D
Q
CP
CLR
Q
1
Q1
R
Q
CP
S
R
Q
CP
CLR
S
Q
2
Q2
R
Q
CP
S
R
Q
CP
CLR
S
Q
3
Q3
R
Q
CP
S
R
Q
CP
CLR
S
Q
4
Q4
R
Q
CP
S
R
Q
CP
CLR
S
Q
5
Q5
R
Q
CP
S
R
Q
CP
CLR
S
Q
6
Q6
R
Q
CP
S
R
Q
CP
CLR
S
Q
7
Q7
R
Q
CP
S
R
Q
CP
CLR
S
Q
9
Qs
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
5
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Supply voltage
0.5 to +7.0
V
V
IN
Input voltage
0.5 to +7.0
V
I
IN
Input current
30 to +5
mA
V
OUT
Voltage applied to output in High output state
0.5 to +V
CC
V
I
O
Current applied to output in Low output state
Qs
40
mA
I
OUT
Current applied to output in Low output state
Q0Q7
48
mA
T
amb
Operating free-air temperature range
0 to +70
C
T
stg
Storage temperature range
65 to +150
C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
NOM
MAX
UNIT
V
CC
Supply voltage
4.5
5.0
5.5
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
IK
Input clamp current
18
mA
I
O
High level output current
Qs
1
mA
I
OH
High-level output current
Q0Q7
3
mA
I
O
Low level output current
Qs
20
mA
I
OL
Low-level output current
Q0Q7
24
mA
T
amb
Operating free-air temperature range
0
70
C
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
6
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
NO TAG
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
NO TAG
MIN
TYP
NO TAG
MAX
UNIT
Qs
I
O
= 1mA
10%V
CC
2.5
V
V
O
High level output voltage
Qs
V
CC
= MIN,
V
IL
= MAX
I
OH
=1mA
5%V
CC
2.7
3.4
V
V
OH
High-level output voltage
Q0 Q7
V
IL
= MAX,
V
IH
=MIN
I
O
= 3mA
10%V
CC
2.4
V
Q0Q7
I
OH
=3mA
5%V
CC
2.7
3.3
V
Qs
I
O
= 20mA
10%V
CC
0.30
0.50
V
V
O
Low level output voltage
Qs
V
CC
= MIN,
V
IL
= MAX
I
OL
= 20mA
5%V
CC
0.30
0.50
V
V
OL
Low-level output voltage
Q0 Q7
V
IL
= MAX,
V
IH
= MIN,
I
O
= 24mA
10%V
CC
0.35
0.50
V
Q0Q7
I
OL
= 24mA
5%V
CC
0.35
0.50
V
V
IK
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
0.73
1.2
V
I
I
Input current at maximum input voltage
V
CC
= MAX, V
I
= 7.0V
100
A
I
IH
High-level input current
V
CC
= MAX, V
I
= 2.7V
20
A
I
IL
Low-level input current
V
CC
= MAX, V
I
= 0.5V
20
mA
I
OZH
Off-state output current,
High level of voltage applied
Q0Q7
only
V
CC
= MAX, V
O
= 2.7V
50
A
I
OZL
Off-state output current,
Low level of voltage applied
Q0Q7
only
V
CC
= MAX, V
O
= 0.5V
50
A
I
OS
Short-circuit output current
NO TAG
V
CC
= MAX
60
150
mA
I
CCH
55
80
mA
I
CC
Supply current (total)
I
CCL
V
CC
= MAX
70
100
mA
I
CCZ
65
95
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25
C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
7
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
amb
= +25
C
C
L
= 50pF, R
L
= 500
V
CC
= +5V
10%
T
amb
= 0
C to +70
C
C
L
= 50pF, R
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
f
MAX
Maximum clock frequencySHCP to Qs
Waveform
NO TAG
115
135
90
MHz
t
PLH
t
PHL
Propagation delay
SHCP to Qs
Waveform
NO TAG
6.0
2.5
8.0
4.5
10.5
7.5
5.0
2.5
12.5
7.5
ns
t
PLH
t
PHL
Propagation delay
STCP to Q0Q7
Waveform
NO TAG
5.5
3.0
8.0
5.0
10.0
8.0
4.5
3.0
13.0
8.5
ns
t
PHL
Propagation delay
SHR to Qs
Waveform
NO TAG
3.5
5.5
8.0
3.0
8.5
ns
t
PZH
t
PZL
Output Enable time
OE to Q0Q7
Waveform 5
Waveform 6
3.5
3.0
5.5
5.5
9.0
8.5
2.5
2.5
10.5
10.5
ns
t
PHZ
t
PLZ
Output Disable time
OE to Q0Q7
Waveform 5
Waveform 6
2.0
4.0
4.0
6.0
7.0
9.0
1.5
3.0
8.5
10.5
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
amb
= +25
C
C
L
= 50pF, R
L
= 500
V
CC
= +5V
10%
T
amb
= 0
C to +70
C
C
L
= 50pF, R
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
t
s
(H)
t
s
(L)
Setup time, High or Low
Ds to SHCP
Waveform 3
2.0
2.0
2.5
2.5
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
Ds to SHCP
Waveform 3
0
0
0
0
ns
t
s
(L)
Setup time, Low
SHR to STCP
Waveform 3
4.5
5.0
ns
t
s
(H)
Setup time, High
SHCP to STCP
Waveform 4
4.5
5.0
ns
t
W
(H)
t
W
(L)
SHCP Pulse width,
High or Low
Waveform
NO TAG
3.5
4.0
4.0
4.0
ns
t
W
(H)
t
W
(L)
STCP Pulse width,
High or Low
Waveform
NO TAG
4.0
3.0
4.0
3.5
ns
t
W
(L)
SHR Pulse width, Low
Waveform
NO TAG
3.0
3.0
ns
t
REC
Recovery time,
SHR to SHCP
Waveform
NO TAG
3.0
3.0
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
8
V
M
V
M
V
M
1/f
MAX
t
PHL
t
w
(H)
QS, Q0Q7
t
w
(L)
V
M
SHCP,
STCP
t
PLH
SF01100
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Widths, and Maximum Clock Frequency
VM
VM
VM
tREC
tPHL
SHR
SHCP
Qs
VM
tw(L)
SF01101
Waveform 2. Master Reset Pulse Width, Master Reset to
Output Delay, and Master Reset to Clock Recovery Time
SF01102
V
M
V
M
V
M
V
M
Ds
SHCP
t
s
(H)
t
s
(L)
V
M
V
M
t
h
(H)=0
t
h
(L)=0
Waveform 3. Data Setup and Hold Times
SF01103
V
M
V
M
V
M
V
M
SHR
SHCP
STCP
t
s
(H)
t
s
(L)
Waveform 4. Setup and Hold Times
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
9
AC WAVEFORMS (Continued)
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VM
VM
VM
tPHZ
tPZH
VOH -0.3V
0V
OE
Q0Q7
SF01104
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
VM
VM
VM
tPLZ
tPZL
VOL +0.3V
Q0Q7
OE
SF01105
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
tw
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
0V
tTHL (tf
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
t
THL
1MHz
500ns
2.5ns
2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN
VOUT
Test Circuit for 3-State Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
tTHL (tf
)
tTLH (tr
)
tTLH (tr
)
AMP (V)
amplitude
3.0V
1.5V
V
M
RL
7.0V
SF00777
TEST
SWITCH
t
PLZ
closed
t
PZL
closed
All other
open
SWITCH POSITION
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
10
DIP16:
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
11
SO16:
plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
12
NOTES
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
yyyy mmm dd
13
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Date of release: 10-98
Document order number:
9397-750-05143
Philips
Semiconductors
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1]
Please consult the most recently issued datasheet before initiating or completing a design.