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Электронный компонент: N74F649D

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Philips
Semiconductors
74F647
Octal transceiver/register, non-inverting
(open-collector)
74F649
Octal transceiver/register, inverting
(open-collector)
Product specification
IC15 Data Handbook
1992 Feb 28
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74F647/74F649
Octal transceivers/registers (open-collector)
74F647 Octal Transceiver/Register, Non-inverting (Open Collector)
74F649 Octal Transceiver/Register, Inverting (Open Collector)
2
1992 Feb 28
853-0876 05853
FEATURES
High impedance NPN base inputs for reduced loading
(20
A in High and Low states)
Independent registers for A and B buses
Multiplexed real-time and stored data
Choice of non-inverting and inverting data paths
Open Collector outputs
300 mil wide 24-pin Slim Dip package
DESCRIPTION
The 74F647 and 74F649 Transceivers/Registers consist of bus
transceiver circuits with open-collector outputs, D-type flip-flops, and
control circuitry arranged for multiplexed transmission of data
directly from the input bus or from the internal registers. Data on the
A or B bus will be clocked into the registers as the appropriate clock
pin goes to a High logic level. Output Enable (OE) and DIR pins are
provided to control the transceiver function. In the transceiver mode,
data present at the high impedance port may be stored in either the
A or B register or both.
The select (SAB, SBA) controls can multiplex stored and real-time
(transparent mode) data. The DIR determines which bus will receive
data when the Output Enable, OE is active Low. In the isolation
mode (Output Enable, OE = High), data from Bus A may be stored
in the B register and/or data from Bus B may be stored in the A
register.
When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of
the two buses, A or B, may be driven at a time. The following
examples demonstrate the four fundamental bus-management
functions that can be performed with the 74F647 and 74F649.
TYPE
TYPICAL
f
max
TYPICAL SUPPLY CURRENT
(TOTAL)
74F647
65MHz
125mA
74F649
65MHz
125mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
10%,
T
amb
= 0
C to +70
C
PKG DWG #
24-pin plastic Slim
DIP (300mil)
N74F647N, N74F649N
SOT222-1
24-pin plastic SOL
N74F647D, N74F649D
SOT137-1
PIN CONFIGURATION 74F647
24
23
22
21
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
CPBA
SBA
OE
VCC
GND
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
CPAB
SAB
DIR
SF01196
PIN CONFIGURATION 74F649
24
23
22
21
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
CPBA
SBA
OE
VCC
GND
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
CPAB
SAB
DIR
SF01196
Philips Semiconductors
Product specification
74F647/74F649
Octal transceivers/registers (open-collector)
1992 Feb 28
3
LOGIC SYMBOL 74F647
4
5
6
7
8
9
10
11
A0
A1
A2
A3
A4
A5
A6
A7
20
19
18
17
16
15
14
13
B0
B1
B2
B3
B4
B5
B6
B7
CPAB
SAB
DIR
CPBA
SBA
OE
1
2
3
23
22
21
V
CC
=Pin 24
GND=Pin 12
SF01197
LOGIC SYMBOL 74F649
4
5
6
7
8
9
10
11
A0
A1
A2
A3
A4
A5
A6
A7
20
19
18
17
16
15
14
13
B0
B1
B2
B3
B4
B5
B6
B7
CPAB
SAB
DIR
CPBA
SBA
OE
1
2
3
23
22
21
V
CC
=Pin 24
GND=Pin 12
SF01198
LOGIC SYMBOL 74F647
SF01199
21
20
G3
3EN1(BA)
3EN2(AB)
C4
G5
C6
G7
1
19
18
17
16
15
14
13
4
5
6
7
8
9
10
11
2
3
23
22
1
2
6D
1
7
1
7
1
5
5
4D
1
LOGIC SYMBOL 74F648
SF01200
21
G3
3EN1(BA)
3EN2(AB)
C4
G5
C6
G7
1
4
5
6
7
8
9
10
11
2
3
23
22
1
2
6D
1
7
1
7
1
5
5
4D
1
20
19
18
17
16
15
14
13
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A OR B
OE
L
DIR
L
CPAB
X
CPBA
X
SAB
X
SBA
L
OE
L
DIR
H
CPAB
X
CPBA
X
SAB
L
SBA
X
OE
X
X
H
DIR
X
X
X
CPAB
X
CPBA
X
SAB
X
X
X
SBA
X
X
X
OE
L
L
DIR
L
H
CPAB
X
H or L
CPBA
H or L
X
SAB
X
H
SBA
H
X
SF01201
Philips Semiconductors
Product specification
74F647/74F649
Octal transceivers/registers (open-collector)
1992 Feb 28
4
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0 - A7
A inputs
1.0/0.033
20
A/20
A
B0 - B7
B inputs
1.0/0.033
20
A/20
A
CPAB
A-to-B clock input
1.0/0.033
20
A/20
A
CPBA
B-to-A clock input
1.0/0.033
20
A/20
A
SAB
A-to-B select input
1.0/0.033
20
A/20
A
SBA
B-to-A select input
1.0/0.033
20
A/20
A
DIR
Data flow Directional control enable input
1.0/0.066
20
A/20
A
OE
Output Enable input
1.0/0.066
20
A/20
A
A0 - A7
A outputs
OC/106.7
OC/64mA
B0 - B7
B outputs
OC/106.7
OC/64mA
NOTE:
One (1.0) FAST Unit Load is defined as: 20
A in the High state and 0.6mA in the Low state. OC = Open Collector
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
OE
DIR
CPAB
CPBA
SAB
SBA
A0-A7
B0-B7
X
X
X
X
X
Input
Unspecified*
Store A, B unspecified*
Store A, B unspecified*
X
X
X
X
X
Unspecified*
Input
Store B, A unspecified*
Store B, A unspecified*
H
H
X
X
H or L
H or L
X
X
X
X
Input
Input
Store A and B data
Isolation, hold storage
Store A and B data
Isolation, hold storage
L
L
L
L
X
X
X
H or L
X
X
L
H
Output
Input
Real time B data to A bus
Stored B data to A bus
Real time B data to A bus
Stored B data to A bus
L
L
H
H
H or L
X
X
X
L
H
X
X
Input
Output
Real time A data to B bus
Stored A data to B bus
Real time A data to B bus
Stored A data to B bus
H = High voltage level
L
= Low voltage level
X = Don't care
= Low-to-High clock transition
*
= The data output function may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
LOGIC DIAGRAM 74F647
C1
1 of 8 Channels
1D
C1
1D
21
3
23
22
1
2
OE
DIR
CPBA
SBA
CPAB
SAB
To 7 other channels
A0
B0
4
20
SF01202
LOGIC DIAGRAM 74F649
C1
1 of 8 Channels
1D
C1
1D
21
3
23
22
1
2
OE
DIR
CPBA
SBA
CPAB
SAB
To 7 other channels
A0
B0
4
20
SF01203
Philips Semiconductors
Product specification
74F647/74F649
Octal transceivers/registers (open-collector)
1992 Feb 28
5
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Supply voltage
0.5 to +7.0
V
V
IN
Input voltage
0.5 to +7.0
V
I
IN
Input current
30 to +5
mA
V
OUT
Voltage applied to output in High output state
0.5 to +V
CC
V
I
OUT
Current applied to output in Low output state
128
mA
T
amb
Operating free-air temperature range
0 to +70
C
T
stg
Storage temperature
65 to +150
C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
NOM
MAX
UNIT
V
CC
Supply voltage
4.5
5.0
5.5
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
IK
Input clamp current
18
mA
V
OH
High-level output voltage
4.5
V
I
OL
Low-level output current
64
mA
T
amb
Operating free-air temperature range
0
70
C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
TYP
2
MAX
I
OH
High-level output current
V
CC
= MIN, V
IL
= MAX,
V
IH
= MIN, V
OH
= MAX
250
A
V
O
Low level output voltage
V
CC
= MIN,
V
MAX
I
OL
= 48mA
10%V
CC
0.38
0.55
V
V
OL
Low-level output voltage
V
IL
= MAX
V
IH
= MIN,
I
OL
= 64mA
5%V
CC
0.42
0.55
V
V
I
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
0.73
1.2
V
I
Input current at
Others
V
CC
= 0.0, V
I
= 7.0V
100
A
I
I
In ut current at
maximum input voltage
An, Bn
V
CC
= 5.5V, V
I
= 5.5V
1
mA
I
IH
High-level input current
V
CC
= MAX, V
I
= 2.7V
20
A
I
IL
Low-level input current
V
CC
= MAX, V
I
= 0.5V
20
A
I
CC
Supply current (total)
I
CCH
V
CC
= MAX
105
145
mA
I
CC
Supply current (total)
I
CCL
V
CC
= MAX
145
200
mA
NOTES:
1. For conditions shown as MIN or Max, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25
C.