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Электронный компонент: N74F711AN

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Philips
Semiconductors
74F711A, 74F711-1, 74F712A, 74F712-1
Multiplexers
Product specification
IC15 Data Handbook
1990 Dec 13
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74F711A/74F7111/
74F712A/74F7121
Multiplexers
74F711A Quint 2-to-1 Data Selector Multiplexer (3-State)
74F711-1 Quint 2-to-1 Data Selector Multiplexer with 30
W
Equivalent Output Termination Impedance (3-State)
74F712A Quint 3-to-1 Data Selector Multiplexer
74F712-1 Quint 3-to-1 Data Selector Multiplexer with 30
W
Equivalent Output Termination Impedance
2
1990 Dec 13
853-1368 01258
FEATURES for 74F711A/74F711-1
Consists of five 2-to-1 Multiplexers
High impedance PNP base inputs for reduced loading
(20
A in High and Low states)
Designed for address multiplexing of dynamic RAM and other
applications
Output inverting/non-inverting option
30
W
termination impedance on each output 74F711-1
Outputs sink 64mA (74F711A only)
FEATURES for 74F712A/74F712-1
Consists of five 3-to-1 Multiplexers
High impedance PNP base inputs for reduced loading
(20
A in High and Low states)
Designed for address multiplexing of dynamic RAM and other
applications
30
W
termination impedance on each output 74F712-1
Outputs sink 64mA (74F712A only)
DESCRIPTION
The 74F711A/74F711-1 consist of five 2-to-1 multiplexers designed
for address multiplexing of dynamic RAMs and other multiplexing
applications. The 74F711A has a common select (S) input, an
Output Enable (OE) input and an Output Inverting (INV) input to
control the 3-State outputs. The outputs source 15mA and sink
64mA. The 74F711-1 is the same as the 74F711A except that is has
a 30
W
termination impedance on each output to reduce line noise
and the 3-State outputs sink 5mA.
When the inverting input (INV) is Low, the input data path is
inverted.
To improve speed and noise immunity, V
CC
and GND side pins are
used.
The 74F712A/74F712-1 consist of five 3-to1 multiplexers designed
for address multiplexing of dynamic RAMs and other multiplexing
applications. The 74F712A has two select (S0, S1) inputs to
determine which set of five inputs will be propagated to the five
outputs. The outputs source 15mA and sink 64mA. The 74F712-1 is
the same as the 74F712A except that it has a 30
W
termination
impedance on each output to reduce line noise and the outputs sink
5mA.
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F711A
6.0ns
30mA
74F711-1
6.5ns
29mA
74F712A
6.5ns
25mA
74F712-1
6.5ns
25mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
10%
T
amb
= 0
C to +70
C
PKG DWG #
20-Pin Plastic DIP
N74F711AN, N74F711-1N
SOT146-1
24-Pin Plastic Slim
DIP (300 mil)
N74F712AN, N74F712-1N
SOT222-1
20-Pin Plastic SOL
N74F711AD, N74F711-1D
SOT163-1
24-Pin Plastic SOL
N74F712AD, N74F712-1D
SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Dna, Dnb
Data inputs
1.0/0.066
20
A/40
A
S
Select input
1.0/0.033
20
A/20
A
74F711A/
OE
Output Enable input (active Low)
1.0/0.033
20
A/20
A
74F711-1
INV
Output inverting input (active Low)
1.0/0.033
20
A/20
A
Q0 - Q4
Data outputs for 74F711A
750/106.7
15mA/64mA
Q0 - Q4
Data outputs for 74F711-1
750/8.33
15mA/5mA
Dna, Dnb, Dnc
Data inputs
1.0/0.066
20
A/40
A
74F712A/
S0, S1
Select inputs
1.0/0.033
20
A/20
A
74F712-1
Q0 - Q4
Data outputs for 74F712A
750/106.7
15mA/64mA
Q0 - Q4
Data outputs for 74F712-1
750/8.33
15mA/5mA
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20
A in the High state and 0.6mA in the Low state.
Philips Semiconductors
Product specification
74F711A/74F7111/
74F712A/74F7121
Multiplexers
1990 Dec 13
3
PIN CONFIGURATION 74F711A/74F711-1
D1a
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
D1b
D2a
D2b
V
CC
D3a
D3b
D4a
D4b
OE
D0a
D0b
Q0
Q1
GND
Q2
Q3
Q4
S
INV
SF01215
PIN CONFIGURATION 74F712A/74F712-1
24
23
22
21
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
D0a
D1a
D2a
D3a
V
CC
D1b
D2b
D3b
D4b
D4c
S0
S1
Q0
Q1
GND
Q3
Q4
D0c
D1c
Q2
D2c
D3c
D4a
D0b
SF01216
LOGIC SYMBOL 74F711A/74F711-1
10
S
OE
D0a D0b D1a D1b D2a D2b D3a
Q1
Q0
1
2
20
19
18
17
15
14
13
12
3
6
Q2
Q3
4
7
D3b
INV
9
11
VCC = Pin 16
GND = Pin 5
D4a D4b
Q4
8
SF01217
LOGIC SYMBOL 74F712A/74F712-1
VCC = Pin 19
GND = Pin 6
2
S0
S1
D0a D0b
D1a D1b
D2a D2b
D3a
Q1
Q0
24
18
9
23
17
10
22
16
11
21
3
5
Q2
Q3
4
7
D3b
1
D4a D4b
Q4
8
D0c
D1c
D2c
D3c
15
12
20
14
13
D4c
SF01218
LOGIC SYMBOL (IEEE/IEC) 74F711A/74F711-1
SF01219
MUX
G
EN1
1
11
10
2
20
19
17
15
14
1
12
13
M
3
4
6
8
7
18
1
LOGIC SYMBOL (IEEE/IEC) 74F712A/74F712-1
SF01220
MUX
G1
G2
1
2
18
9
23
17
10
22
24
11
16
3
4
5
8
7
15
12
20
14
13
21
Philips Semiconductors
Product specification
74F711A/74F7111/
74F712A/74F7121
Multiplexers
1990 Dec 13
4
LOGIC DIAGRAM 74F711A/74F711-1
11
10
9
1
2
20
19
18
17
15
14
OE
INV
S
D0a
D0b
D1a
D1b
D2a
D2b
D3a
D3b
Q3
Q2
Q1
Q0
3
4
6
7
VCC = Pin 16
GND = Pin 5
13
12
D4a
D4b
Q4
8
SF01221
FUNCTION TABLE 74F711A/74F711-1
INPUTS
OUTPUT
S
INV
OE
Dna
Dnb
Qn
L
L
L
Data a
Data b
Data a
H
L
L
Data a
Data b
Data b
L
H
L
Data a
Data b
Data a
H
H
L
Data a
Data b
Data b
X
X
H
X
X
Z
H = High voltage level
L
= Low voltage level
X = Don't care
Z = High impedance "off" state
Philips Semiconductors
Product specification
74F711A/74F7111/
74F712A/74F7121
Multiplexers
1990 Dec 13
5
LOGIC DIAGRAM 74F712A/74F712-1
1
2
24
18
9
23
17
10
22
16
11
21
15
12
S0
S1
D0a
D0b
D0c
D1a
D1b
D1c
D2a
D2b
D2c
D3a
D3b
D3c
VCC = Pin 19
GND = Pin 6
20
14
13
D4a
D4b
D4c
Q0
Q1
Q2
Q3
Q4
3
4
5
7
8
SF01222
FUNCTION TABLE 74F712A/74F712-1
INPUTS
OUTPUT
S0
S1
Dna
Dnb
Dnc
Qn
L
L
Data a
Data b
Data c
Data a
H
L
Data a
Data b
Data c
Data b
X
H
Data a
Data b
Data c
Data c
H = High voltage level
L
= Low voltage level
X = Don't care