Document Outline
- DESCRIPTION
- FEATURES
- APPLICATIONS
- PIN CONFIGURATION
- BLOCK DIAGRAM
- ORDERING INFORMATION
- ABSOLUTE MAXIMUM RATINGS
- DC ELECTRICAL CHARACTERISTICS
- CIRCUIT DESCRIPTION
- OUTPUT VOLTAGE COMPLIANCE
- ACCURACY
- MONOTONICITY
- SETTLING TIME
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
767
August 31, 1994
853-0945 13721
DESCRIPTION
The NE5410/SE5410 are 10-bit Multiplying Digital-to-Analog
Converters pin- and function-compatible with the industry-standard
MC3410, but with improved performance. These are capable of
high-speed performance, and are used as general-purpose building
blocks in cost effective D/A systems.
The NE/SE5410 provides complete 10-bit accuracy and differential
non-linearity over temperature, and a wide compliance voltage
range. Segmented current sources, in conjunction with an R/2R
DAC, provide the binary weighted currents. The output buffer
amplifier and voltage reference have been omitted to allow greater
speed, lower cost, and maximum user flexibility.
FEATURES
Pin- and function-compatible with MC3410
10-bit resolution and accuracy (
0.05%)
Guaranteed differential non-linearity over temperature
Wide compliance voltage range---2.5 to +2.5V
Fast settling time--250ns typical
Digital inputs are TTL- and CMOS-compatible
High-speed multiplying input slew rate--20mA/
s
Reference amplifier internally-compensated
Standard supply voltages +5V and -15V
APPLICATIONS
Successive approximation A/D converters
High-speed, automatic test equipment
High-speed modems
Waveform generators
CRT displays
Strip CHART and X-Y plotters
Programmable power supplies
Programmable gain and attenuation
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
F Package
TOP VIEW
VEE
GND
OUTPUT
D1 (MSB)
D2
D3
D4
D5
VREF+
D10 (LSB)
D9
D8
D7
D6
VREF
VCC
BLOCK DIAGRAM
MSB
LSB
4
5
6
7
8
9 10 11 12 13
3
CURRENT SWITCHES
LADDER TERMINATORS
R-2R LADDER
BIAS
CIRCUITRY
REFERENCE
CURRENT
AMPLIFIER
GND
1
2
14
16
15
D1 D2 D3 D4 D5 D6 D7 D8 D9 D10
VREF(+)
VREF()
VCC
IO
VEE
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
ORDER CODE
DWG #
16-Pin Ceramic Dual In-Line Package (CERDIP)
0 to +70
C
NE5410F
0582B
16-Pin Ceramic Dual In-Line Package (CERDIP)
-55 to +125
C
SE5410F
0582B
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
August 31, 1994
768
ABSOLUTE MAXIMUM RATINGS
T
A
=+25
C, unless otherwise specified.
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Power supply
+7.0
V
DC
V
EE
-18
V
DC
V
I
Digital input voltage
+15
V
DC
V
O
Applied output voltage
+4, -5.0
V
DC
I
REF(16)
Reference current
2.5
mA
V
REF
Reference amplifier inputs
V
CC
, V
EE
V
DC
V
REF(D)
Reference amplifier differential inputs
0.7
V
DC
T
A
Operating temperature range
SE5410
-55 to +125
C
NE5410
0 to +70
C
T
J
Junction temperature
Ceramic package
+150
C
T
STG
Storage temperature
-65 to +150
C
P
D
Maximum power dissipation
T
A
=25
C (still-air)
1
1190
mW
NOTES:
1. Derate above 25
C at the following rate:
F package at 9.5mW/
C
DC ELECTRICAL CHARACTERISTICS
(Continued)
V
CC
=+5.0V
DC
, V
EE
=-15V
DC
, I
REF
=2.0mA, all digital inputs at high logic level. SE5410: T
A
=-55
C to +125
C, NE5410 Series: T
A
=0
C to +70
C,
unless otherwise noted.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
Min
Typ
Max
UNIT
R
Relative accuracy
Over Temperature
0.025
0.05
%
R
(Error relative to full scale I
O
)
1/4
1/2
LSB
Differential non-linearity
Over temperature
0.025
0.05
%
1/4
1/2
LSB
t
S
Settling time to within
1/2 LSB
(all bits low to high)
T
A
= 25
C
250
ns
t
PLH
t
PHL
Propagation delay time
T
A
= 25
C
35
20
ns
TCI
O
Output full-scale current drift
20
40
ppm/
C
V
IH
Digital input logic levels (all bits)
High level, Logic "1"
Low level, Logic "0"
2.0
0.8
V
DC
I
IH
I
IL
Digital input current (all bits)
High level, V
IH
= 5.5V
Low level, V
IL
= 0.8V
20
20
A
I
REF(15)
Reference input bias current (Pin 15)
1.0
5.0
A
I
OH
Output current (all bits high)
V
REF
= 2.000V, R16 = 1000
3.937
3.996
4.054
mA
I
OL
Output currents (all bits low)
T
A
= 25
C
0
0.4
A
V
O
Output voltage compliance
T
A
= 25
C
R
< 0.050%
relative to full-scale
2.5
+2.5
V
DC
SR I
REF
Reference amplifier slew rate
20
mA/
s
ST I
REF
Reference amplifier settling time
0 to 4.0mA,
0.1%
2.0
s
PSRR()
Output current power supply sensitivity
0.003
0.01
%/%
C
O
Output capacitance
V
O
= 0
25
pF
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
August 31, 1994
769
DC ELECTRICAL CHARACTERISTICS
V
CC
=+5.0V
DC
, V
EE
=-15V
DC
, I
REF
=2.0mA, all digital inputs at high logic level. SE5410: T
A
=-55
C to +125
C, NE5410 Series: T
A
=0
C to +70
C,
unless otherwise noted.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
Min
Typ
Max
UNIT
C
I
Digital input capacitance (all bits high)
4.0
pF
I
CC
I
EE
Power supply current (all bits low)
+2
12
+4
18
mA
V
CC
V
EE
Power supply voltage range
T
A
= 25
C
V
O
= 0
+4.75
14.25
+5.0
15
+5.25
15.75
V
DC
Power consumption
190
300
mW
COMPLIANCE VOLTAGE (VOLT)
Figure 1. Output Current vs Output Compliance Voltage
OUTPUT CURRENT (mA)
4.0
3.0
2.0
1.0
0
1.0
5
3
1
0
1
3
5
+VCC = +5V
VEE = 15V
IREF = 2mA
TA = 25
C
OUTPUT COMPLIANCE VOL
T
AGE (VOL
TS)
Figure 2. Maximum Output Compliance Voltage
vs Temperature
4.0
3.0
2.0
1.0
0
1.0
2.0
3.0
4.0
75 50 25
0
25
50
75 100 125
TA (
C)
+VCC = +5V
VEE = 15V
IREF = 2mA
CIRCUIT DESCRIPTION
The NE5410 consists of four segment current sources which
generate the 2 Most Significant Bits (MSBs), and an R/2R DAC
implemented with ion-implanted resistors for scaling the remaining 8
Least Significant Bits (LSBs) (see Figure 5). This approach provides
complete 10-bit accuracy without trimming.
The individual bit currents are switched ON or OFF by
fully-differential current switches. The switches use current steering
for speed.
Figure 3. Power Supply Currents vs Temperature
POWER SUPPL
Y
CURRENT (mA)
13
12
11
10
4
3
2
1
0
75 50 25
0
25
50
75 100 125
TA (
C)
+VCC = +5V
VEE = 15V
IREF = 2mA
IEE
+ICC
I
I CC
EE
Figure 4. Reference Amplifier Frequency Response
An on-chip high slew reference current amplifier drives the R/2R
ladder and segment decoder. The currents are scaled in such a way
that, with all bits on, the maximum output current is two times
1023/1024 of the reference amplifier current, or nominally 3.996mA
for a 2.000mA reference input current. The reference amplifier
allows the user to provide a voltage input: out-board resistor R16
(see Figure 6) converts this voltage to a usable current. A current
mirror doubles this reference current and feeds it to the segment
decoder and resistor ladder. Thus, for a reference voltage of 2.0V
and a 1k
resistor tied to Pin 16, the full-scale current is
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
August 31, 1994
770
approximately 4.0mA. This relationship will remain regardless of the
reference voltage polarity.
Connections for a positive reference voltage are shown in Figure 6a.
For negative reference voltage inputs, or for bipolar reference
voltage inputs in the multiplying mode, R15 can be tied to a negative
voltage corresponding to the minimum input level. For a negative
reference input, R16 should be grounded (Figure 6b). In addition,
the negative voltage reference must be at least 3V above the V
EE
supply voltage for best operation. Bipolar input signals may be
handled by connecting R16 to a positive voltage equal to the peak
positive input level at Pin 15.
When a DC reference voltage is used, capacitive bypass to ground
is recommended. The 5V logic supply is not recommended as a
reference voltage. If a well regulated 5.0V supply, which drives logic,
is to be used as the reference, R16 should be decoupled by
connecting it to the +5.0V logic supply through another resistor and
bypassing the junction of the two resistors with a 0.1
F capacitor to
ground.
The reference amplifier is internally-compensated with a 10pF
feed-forward capacitor, which gives it its high slew rate and fast
settling time. Proper phase margin is maintained with all possible
values of R16 and reference voltages which supply 2.0mA reference
current into Pin 16. The reference current can also be supplied by a
high impedance current source of 2.0mA. As R16 increases, the
bandwidth of the amplifier decreases slightly and settling time
increases. For a current source with a dynamic output impedance of
1.0M
, the bandwidth of the reference amplifier is approximately
half what it is in the case of R16=1.0k
, and settling time is
10
s.
The reference amplifier phase margin decreases as the current
source value decreases in the case of a current source reference,
so that the minimum reference current supplied from a current
source is 0.5mA for stability.
CODE SELECTED 0111110011
Figure 5. NE5410 Equivalent Circuit
R
MSB
LSB
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
GND
(2)
(3)
(INTERNAL)
2R
SEGMENT
DECODER
(15)
(16)
+
R
2R
R
2R
R
2R
R
2R
R
2R
2R
2R
2R1
R1
R1
R1
R1
VEE (1)
VREF
+
VBIAS
IOUT
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
August 31, 1994
771
Figure 6. Basic Connections
a. Positive Reference Voltage
b. Negative Reference Voltage
NOTES:
R16 + RT = R15 = RREF
RT < <R16
IO F.S. = 2 IR = VREF/RREF
NOTES:
R15 + RT = R16
RT < <R15
IVREF
RVEE + 3V
14
16
15
3
2
1
5410
D1 THROUGH D10
VR (+)
VCC
VEE
RT
R15
R16
IO
15
13
2
1
5410
D1 THROUGH D10
VR ()
VCC
VEE
RT
R15
R16
IO
OUTPUT VOLTAGE COMPLIANCE
The output voltage compliance ranges from -2.5 to +2.5V. As shown
in Figure 2, this compliance range is nearly constant over
temperature. At the temperature extremes, however, the compliance
voltage may be reduced if V
EE
>-15V.
ACCURACY
Absolute accuracy is a measure of each output current level with
respect to its intended value. It is dependent upon relative accuracy
and full-scale current drift. Relative accuracy, or linearity, is the
measure of each output current with respect to its intended fraction
of the full-scale current. The relative accuracy of the NE5410 is fairly
constant over temperature due to the excellent temperature tracking,
of the implanted resistors. The full-scale current from the reference
amplifier may drift with temperature causing a change in the
absolute accuracy. However, the NE5410 has a low full-scale
current drift with temperature.
The SE5410 and the NE5410 are accurate to within
LSB at 25
C
with a reference current of 2.0mA on Pin 16.
MONOTONICITY
The NE5410 and SE5410 are guaranteed monotonic over
temperature. This means that for every increase in the input digital
code, the output current either remains the same or increases but
never decreases. In the multiplying mode, where reference input
current will vary, monotonicity can be assured if the reference input
current remains above 0.5mA.
SETTLING TIME
The worst-case switching condition occurs when all bits are
switched "on," which corresponds to a LOW-to-HIGH transition for
all bits. This time is typically 250ns for the output to settle to within
1/2LSB for 10-bit accuracy, and 200ns for 8-bit accuracy. The
turn-off time is typically 120ns. These times apply when the output
swing is limited to a small (<0.7V) swing and the external output
capacitance is under 25pF.
The major carry (MSB off-to-on, all others on-to-off) settles in
approximately the same time as when all bits are switched off-to-on.
If a load resistor of 625
is connected to ground, allowing the output
to swing to -2.5V, the settling time increases to 1.5
s.
Extra care must be taken in board layout as this is usually the
dominant factor in satisfactory test results when measuring settling
time. Short leads, 100
F supply bypassing, and minimum scope
lead length are all necessary.
A typical test setup for measuring settling time is shown in Figure 7.
The same setup for the most part can be used to measure the slew
rate of the reference amplifier (Figure 9) by tying all data bits high,
pulsing the voltage reference input between 0 and 2V, and using a
500
load resistor R
L
.
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
August 31, 1994
772
Figure 7. Settling Time
4
5
6
7
8
9
10
11
12
13
14
1
16
15
3
2
1k
1k
50
+2VDC
500
VCC
VEE
RL
VO
CO
25pF
NE5410
VI
0.1
F
0.1
F
0.1
F
2.4V
0.4V
0.5V
0
tS -- 250ns TYPICAL
TO
1/2 LSB
RISE AND FALL TIMES
10ns
VO
VI
Figure 8. Propagation Delay Time
4
5
6
7
8
9
10
11
12
13
14
1
16
15
3
2
1k
1k
50
+2VDC
20
VCC
VEE
RL
VO
NE5410
VI
0.1
F
0.1
F
0.1
F
2.4V
0.4V
80mV
0V
tPLH
TO
1/2 LSB
RISE AND FALL TIMES
10ns
VO
VI
tPHL
FOR PROPAGATION
DELAY TIME
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
August 31, 1994
773
TO
0.1%
Figure 9. Reference Amplifier Settling Time and Slew Rate
4
5
6
7
8
9
10
11
12
13
14
1
16
15
3
2
1k
1k
500
VCC
VEE
RL
VO
25pF
NE5410
0.1
F
0.1
F
0.1
F
VREF (+)
2V
0
2.0V
0
0
0.5V
VO
VREF (+)
SLEW RATE
tS = 2
s TYPICAL
NOTE:
Use RL = 20
to GND for slew rate measurement.
Figure 10. Bipolar Voltage Output Circuits (-10V to +10V)
2.5k
5410
RT
0.1
F
VEE
VCC
16
2.5k
RREF
15
0
ADJ
15V
10k
VOUT
+15V
F.S. ADJ
RF
5V
REF
2.5k
0.1
F
1/2 NE5535
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
August 31, 1994
774
Figure 11. Successive Approximation A/D Converter
NOTES:
10-bit conversion time = 3.3
s with 3MHz clock.
This converter uses a 2504 12-bit successive approximation register in the short cycle operating mode where the end of conversion signal is taken from the first unused bit of the
SAR (Q10).
2.4k
F.S.
ADJ
16
2.5k 15
15VDC
CLOCK
CP
2504 SAR
NE5410
+5VDC
2.5k
3
D
+5VDC
ANALOG
INPUT
(0-10V)
V
20k
ZERO
ADJ
500k
2.5k
3
4
+V
+5VDC
1
14
IN B
OUT A
6
10
10VDC
200
DOUT
V1+
V2+
Q9
Q0
Q10
E
S
NE529
START
EOC
5V
REF
IN A
Figure 12. 8-Bit
P Bus Interface
NOTES:
With this double latch technique, valid data will be latched to the DAC until updated with the E2 pulse. Timing will depend on the processor used.
NE5410
7
6
5
4
3
2
1
0
BUS
19
16
15
12
9
6
5
2
11
13
1
7
2
6
1/2 LS375
4
CONTROL
SIGNALS
TIMING SEQUENCE
DATA
LS373
1
FROM
P
P
E2
E1
D0
D1
Q0
Q1
E0,1
E2,3
Q2
Q3
E1
E2
DB0,1
DB2-9
OE
1/2LS375
Philips Semiconductors Linear Products
Product specification
NE/SE5410
10-Bit high-speed multiplying D/A converter
August 31, 1994
775
Figure 13. Staircase A/D
NOTE:
V
IN
FULL SCALE
+
4mA (R
1
)
R
T
)
1023
1024
15
13
RST
NE5410
3
TTL
15
MSB
DOUT
Q0
Q9
CP
START
5V
REF
LSB
12 11 10 9
8
7
6
5
4
CLOCK
ZERO
ADJ
3k
3k
+5V
14
1
16
2.5k
2.5k
COMP
+
RT
RI
VIN
10-BIT COUNTER
2
VCC
VEE
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