1997 Feb 12
2
Philips Semiconductors
Product specification
Digital Servo Integrated Circuit Silent
(DSICS)
OQ8868
FEATURES
The DSICS realizes the following servo functions:
Focus servo loop
Radial servo loop
Built-in access procedure
Sledge motor servo loop
Three line (TDA1301T-like; same on hardware level,
coefficients differ) or I
2
C-bus serial interface with system
controller.
Other features are:
Single supply voltage (5 V)
Flexible system oscillator
Usable for single/double Foucault and astigmatic focus
Wide range of adjustable servo characteristics possible
Automatic focus start-up procedure and in-lock
indication
Fast focus restart procedure
Sophisticated track loss detection mechanism
Extended radial error signal
Automatic initialization and jump procedure for radial
servo
Automatic radial error gain and offset control
Sophisticated defect detector
Shock detector
Fast serial communication
Low noise servo loops
Automatic gain control for the complete focus and radial
loop
Fast track counting signal input
Steered sledge jump
Radial actuator damping.
Features that improve on its predecessor, the TDA1301T:
Low noise in the focus loop
Faster serial communication
Improved jump performance.
Added features are:
High level watchdogs
Decoder (LO9585, LO9588 or HD60) communication
support
Application debugging support
Pulsed sledge mode
Auto gain control on radial and focus loop
I
2
C-bus serial communication
Externally available defect detector signals.
GENERAL DESCRIPTION
The Digital Servo Integrated Circuit Silent (DSICS) IC
provides all servo functions except the spindle motor
control in two-stage Compact Disc (CD) systems. It offers
a high degree of integration, combined with the low
additional cost of external components. The servo
characteristics are widely adjustable by means of a
three-wire serial interface, which offers great flexibility for
the application of different CD mechanisms.
The servo chip accepts diode currents and drives various
power stages. Proper functioning of the focus and radial
AGCs requires a digital power stage (SZA1010). It can
drive normal, CDM12-like, mechanisms.
It is the improved version of its predecessor, the DSIC2
(TDA1301).
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
OQ8868
QFP44
plastic quad flat package; 44 leads (lead length 1.3 mm); body
10
10
1.75 mm
SOT307-2
1997 Feb 12
3
Philips Semiconductors
Product specification
Digital Servo Integrated Circuit Silent
(DSICS)
OQ8868
QUICK REFERENCE DATA
Notes
1. Maximum input range varies from 3.8 to 12
A and varies with the reference current through XTLR.
2. Maximum input range varies from 1.9 to 6
A and varies with the reference current through XTLR.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DDD
digital supply voltage
4.5
-
5.5
V
V
DDA
analog supply voltage
4.5
-
5.5
V
I
DDD
digital supply current
-
17
-
mA
I
DD(q)
digital quiescent supply current
-
-
10
A
I
DDA
analog supply current
-
5
-
mA
I
I
input current
for pins D1 to D4
note 1
-
-
12
A
for pins S1 and S2
note 2
-
-
6
A
P
tot
total power dissipation
-
115
-
mW
T
amb
operating ambient temperature
-
40
-
+
85
C
1997 Feb 12
5
Philips Semiconductors
Product specification
Digital Servo Integrated Circuit Silent
(DSICS)
OQ8868
PINNING
SYMBOL
PIN
DESCRIPTION
TEST1
1
test input 1 (LOW for normal operation); internal pull-down
V
refH
2
high reference for A/D converter (input)
D1
3
unipolar current input (central diode signal input)
D2
4
unipolar current input (central diode signal input)
D3
5
unipolar current input (central diode signal input)
V
refL
6
low reference for A/D converter (input)
D4
7
unipolar current input (central diode signal input)
S1
8
unipolar current input (central diode signal input)
S2
9
unipolar current input (central diode signal input)
V
SSA
10
analog ground
V
DDA
11
analog supply voltage
XTLR
12
reference current input
V
SSD5
13
digital ground 5
OTD
14
off track detector (output)
RSTI
15
reset input (active HIGH)
SILD
16
serial host interface load
SICL/SCL
17
serial host interface clock /I
2
C-bus clock (SCL)
SIDA/SDA
18
serial host interface data /I
2
C-bus data (SDA)
ENIIC
19
enable I
2
C-bus serial format (active LOW)
INTREQ
20
interrupt request output (active LOW)
XTALI
21
oscillator input
XTALO
22
oscillator output
V
SSD4
23
digital ground 4
RAB
24
serial decoder interface load (output)
DA
25
serial decoder interface data (input/output)
CDIC
26
serial decoder interface clock (output)
RSTO
27
reset output (active LOW)
CLKO
28
clock buffer output
V
SSD3
29
digital ground 3
V
DDD3
30
digital supply voltage 3
RA
31
radial actuator output
FO
32
focus actuator output
SL
33
sledge output
V
SSD2
34
digital ground 2
RP
35
radial polarity signal
TL
36
track loss signal
FOK
37
focus OK output
FTC
38
fast track counting input (internal pull-down)
V
SSD1
39
digital ground
V
DDD1
40
digital supply voltage 1
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