Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

DO NOT DISTRIBUTE WITHOUT ECN DATED AFTER Sept 16, 1997

1997 Sept 16

853-

DESCRIPTION

The SA900 is a monolithic high performance, multi-function transmit
modulator for use in cellular radio applications, fabricated in QUBiC
BiCMOS technology. The SA900 features both analog (AMPS)
mode and complex, I/Q digital (NADC IS136) mode quadrature
modulation functions, a PLL synthesizer with VCO, crystal oscillator,
programmable prescalers and Gilbert cell multiplier phase detector
with programmable charge pump output. The DUALTX output can
be used in DUAL mode cellular phone applications with the AMPS
and NADC modulation being applied to the I/Q baseband inputs.
The DUALTX output also provides 6-bit power control with 40dB of
gain control in 0.63dB steps. In addition, buffered crystal oscillator
programmable prescaler outputs are provided to support system
clock reference needs. Programming of the SA900 functions are
realized by a high speed 3-wire serial interface. The SA900 can be
programmed into a sleep mode (low current mode providing crystal
oscillator and Master Clock functions), a standby mode (providing
crystal oscillator, Master Clock, System Clock 1 and Transmit LO
buffer functions), and the AMPS mode and the DUAL mode
configurations.

FEATURES

= 4.0V

Tx output frequency = 900MHz

Direct modulation of RF

DUAL mode, on-chip PA control

I/Q modulator

Single sideband quadrature LO generation with no external
adjustments required

On-chip crystal oscillator with 3 buffered outputs

AMPS/TACS compatible

On-chip VCO

PIN CONFIGURATION

BE Package

13 14

15 16 17 18 19

21 22 23 24

GND

TXLO_2

TXLO_1

GND

Vcc

TANK_1

TANK_2

Vcc

PHSOUT

GND

XTAL_1

Vcc

GND

DUALTX

GND

Vcc

AMPSTX

GND

Vcc

GND

Vcc

GND

Vcc

LO_2

LO_1

GND

Vcc

GND

Vcc

GND

AL_2

Vcc

CLK1

GND

CLK2

GND

MCLK

CLKSET

CLOCK

STROBE

TXEN

IPEAK

SR00636

Figure 1. Pin Configuration

Selective power-down

Low power AMPS/TACS mode

Low power dual mode NADC

48-Pin TQFP package

APPLICATIONS

North American Digital Cellular (TDMA IS-136)

ORDERING INFORMATION

DESCRIPTION

TEMPERATURE RANGE

ORDER CODE

DWG #

48-Pin Plastic Low Profile Quad Flat Package (LQFP)

-40 to +85

SA900BE

SOT313-2

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

PIN DESCRIPTIONS

Pin

Description

Non-inverting I Mod Signal

Inverting I Mod Signal

TXLO_1/2

Second LO Input (differential/single-ended input)

DUALTX

RF output (850MHz) digital (DUAL) mode, complex modulated output

Non-inverting Q Mod Signal

Inverting Q Mod Signal

CLK1

Buffered oscillator output (XO

MCLK

Buffered oscillator output (XO

CLK2

Buffered oscillator output (XO

AMPSTX

RF output (850MHz) AMPS mode

+5V

power supply

GND

Ground

Data

Serial data input

Clock

Serial clock input

Strobe

Data strobe input

TXEN

AMPS and Dual Mode transmit enable

CLKSET

Program control pin for MCLK prescaler

XTAL1

Crystal oscillator base input

XTAL2

Crystal oscillator emitter output

PHSOUT

Phase comparator charge pump output

TANK_1

VCO differential tank

TANK_2

VCO differential tank

LO_1/2

Buffered differential TXLO output

PEAK

Phase comparator current programming

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

ABSOLUTE MAXIMUM RATINGS

SYMBOL

PARAMETER

RATING

UNITS

Supply voltage

-0.3 to +6

Voltage applied to any other pin

-0.3 to (V

+ 0.3)

Power dissipation, T

= 25

C (still air)

600

JMAX

Maximum operating junction temperature

150

MAX

Maximum power input/output

+10

dBm

STG

Storage temperature range

65 to +150

NOTE:
1. Maximum dissipation is determined by the operating ambient temperature and the thermal resistance,

48-pin LQFP:

= 67

C/W

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

RATING

UNITS

Supply voltage

3.9 to 5.1

Operating ambient temperature range

-40 to +85

Operating junction temperature

-40 to +105

DC ELECTRICAL CHARACTERISTICS

= +4.0V, T

= 25

C; unless otherwise stated.

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNITS

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Power supply range

3.9

5.1

Sleep mode

3.1

Supply current

Standby mode

8.2

Supply current

AMPS mode

27.5

DUAL mode

I / I

In-phase differential baseband input

0.5V

Q / Q

Quadraphase differential baseband input

0.5V

CLKSET

Divide by 4/5/1

0.5V

Clock, data, strobe, TXEN

Input low

0.3

0.3V

Clock, data, strobe, TXEN

Input high

0.7V

+0.3

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

AC ELECTRICAL CHARACTERISTICS

= +4.0V, T

= 25

C; TANK_1 = 120MHz @ 0 dBm; XO_REF = 30MHz @ 5 dBm; TxLO2 = 13 dBm, unless otherwise stated.

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNITS

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Input power

-13

-10

dBm

TXLO_1/2

Transmit LO input (AC couple) (50

)

VSWR (50

)

2:1

dBm

Frequency range

900

1040

MHz

TANK_1/2

VCO tank differential inputs

Frequency range

120

140

MHz

PHSOUT

Phase detector charge pump output

Output level

0.5

PHSOUT programming

SET

= 24k

, AD=0

200

300

400

PEAK

PHSOUT programming

SET

= 24k

, AD=1

0.9

1.2

1.5

XTAL 1

XO transistor base

XO frequency

MHz

XTAL_1

XO transistor base

External drive

150

350

500

P-P

CLK1

XO divide 3/1, power down SM1=0, 50%
duty cycle

Frequency range

3.33

MHz

3, X=1,

1, X=0

Output level, 5k

|| 7pF

0.7

1.4

P-P

CLK2

XO divide 2/1, power down SM2=0

Frequency range

MHz

CLK2

2, Y=1,

1, Y=0

Output level, 5k

|| 7pF

0.7

1.4

P-P

XO divide 4/5/1, 50% duty cycle

Frequency range

MHz

MCLK

4, CLKSET = V

5, CLKSET = 0.5V

1, CLKSET = 0V

Output level, 5k

|| 7pF

0.7

1.4

P-P

Serial data clock input, 33% duty cycle

Max clock rate

MHz

CLOCK

Serial interface (CMOS levels)

Logic LOW

0.3V

DATA, CLOCK, STROBE, TXEN

Logic HIGH

0.7V

AMPS output, SE=1, AD=0, TXEN=1 (AC
couple)

Frequency range

820

860

MHz

VSWR

2:1

Output level

1.5

dBm

869 to 894MHz

-104

dBm

824 to 849MHz

-47

dBc

AMPSTX

Spurious output

2 to 824MHz

-41

dBc

849 to 869MHz

-41

dBc

894MHz to 8.49GHz

-41

dBc

TXLO and harmonics

-21

dBc

Adjacent channel noise power

@30kHz

-95

dBc/Hz

Alternate channel noise power

@60kHz

-101

dBc/Hz

Broadband noise power

869 to 894MHz

-136

dBm/Hz

DUAL output, SE=1, AD=1, TXEN=1 (with
external matching Figure 9)

Frequency range

820

920

MHz

DUALTX

VSWR

2:1

DUALTX

Output level (avg) (I and Q

quad, 0dB VGA)

dBm

Gain flatness

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

AC ELECTRICAL CHARACTERISTICS

(continued)

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNITS

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

DUALTX

3rd order

-35

-42

dBc

(cont.)

Linearity (0dB VGA, I and Q inphase)

5th order

-55

dBc

7th order

-65

dBc

Carrier suppression (I and Q quadrature)

VGA = 0dB

-35

-45

dBc

Carrier suppression (I and Q quadrature)

VGA = 40dB

-28

-33

dBc

Sideband suppression

I and Q quadrature

-35

-45

dBc

869 to 894MHz

104

dBm

824 to 849MHz

dBc

Spurious output

2 to 824MHz

dBc

849 to 869MHz

dBc

894MHz to 8.49GHz

dBc

TXLO and harmonics

dBc

Broadband noise (0dB VGA)

869 to 894MHz

136

dBm/Hz

Broadband noise (0dB VGA)

935 to 960MHz

136

dBm/Hz

Adjacent channel noise power

@30kHz

dBc/Hz

Alternate channel noise power

@60kHz

101

dBc/Hz

Max frequency

0.8

MHz

Q/Q

Baseband quadrature differential input

Differential modulation level

0.6

0.8

1.0

P-P

Differential input impedance

Max frequency

0.8

MHz

I/I

Baseband inphase differential input

Differential modulation level

0.6

0.8

1.0

P-P

Differential input impedance

Buffered TXLO differential outputs (AC
coupled)

Frequency range

900

1040

MHz

VSWR (single-ended)

2:1

LO_1/2

Output impedance

single-ended

Output impedance

differential

100

Output level

single-ended, 50

P-P

Out ut level

differential, 100

100

180

P-P

NOTES:
1. Guaranteed by design.
2. Needs a different matching component. Max test frequency is 850MHz with test circuit shown in Figure 11.

FUNCTIONAL DESCRIPTION

Dual Mode Operation

The SA900 transmit modulator provides direct single sideband
quadrature modulation of the difference of the TXLO and VCO
frequencies, while providing quadrature LO signals for the I/Q
modulator. The quadrature LO signals are modulated with high
linearity by the baseband inphase (I) and quadrature (Q) signals.
The summed modulator output produces the lower sideband, while
rejecting the upper sideband. The I and Q inputs also provide DC
biasing for the modulator inputs. The summed output of the
modulator goes to a variable gain amplifier (VGA) to control the
output level, it has 40.0dB of attenuation control range, with 0.63dB
steps. The power control function is programmed by means of a
6-bit word (see Table 3). The VGA output drives the power amp
output stage to provide +2dBm average minimum power level (at
0dB power control) into 50

, in conjunction with external matching

components on DUALTX. The AD (AMPS/DUAL) and the SE
(synthesizer enable) bit control the power up/down of the DUAL

mode function. The transition of the TXEN, from low to high turns
on the modulator. The falling edge of the TXEN signal disables the
synthesizer and modulator. The TXLO is a system supplied LO
signal. The SA900 buffers the TXLO signal (LO_1/2) for use with
the system synthesizer (such as the SA7025) to form the system LO
synthesizer loop. The DUAL mode can also be used for AMPS
operation. The AMPS and DUAL mode modulation is generated by
the system DSP IC to provide the required I/Q baseband modulation
for the SA900. The DUAL output provides low broadband noise
output power (so that the receiver sensitivity is not degraded) and
high linearity to meet cellular phone system needs. Table 1 provides
the VGA power control limits.

The SA900 DUALTX output is externally matched with either a shunt
inductor to V

and a series capacitor or a shunt inductor to V

and a series inductor. This matches the DUALTX output to 50

Values of the matching components are dependent on PCB layout,
typical values are shown in Figure 9.

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

Table 1.

VGA Power Control Limits

VGA

Min.

Typ.

Max.

Relative VGA

-1

-.63

-.2

-1

-.63

-.2

-1

-.63

-.2

-1

-.63

-.2

-1

-.63

-.2

-1

-.63

-.2

-1

-.63

-.2

-6.6

-5

-3

-6.6

-5

-3

-6.6

-5

-3

-6.6

-5

-3

-6.6

-5

-3

-6.6

-5

-3

-6.6

-5

-3

-43.2

-40.4

-37.2

1. Guaranteed to be monotonic.

AMPS Mode Operation

The SA900 can be configured to operate in the AMPS mode, where
FM modulation is applied to the SA900's VCO. For the AMPS
mode, the VCO is configured with the proper synthesizer bandwidth
to allow the application of the AMPS modulation to the VCO varactor
tuned tank circuit. The modulated VCO signal is input into an image
reject mixer along with the TXLO signal, where the upper sideband
is rejected. This single sideband modulated signal then drives the
AMPS output power amplifier. The PA provides +2dBm power level
into 50

, with no external matching components required. The AD

(AMPS/DUAL) and the SE (synthesizer enable) bit control the power
up/down of the AMPS mode function. The transition of the TXEN
signal from low to high turns on the modulator. The falling edge of
TXEN signal disables the synthesizer and the modulator.

Synthesizer Operation

The SA900 synthesizer is comprised of the differential VCO circuit,
with external tank components, the Gilbert cell multiplier phase
detector with programmable charge pump current, crystal oscillator
and programmable prescalers. The charge pump output drives an
external second order loop filter. The output of the loop filter is used
to provide the control voltage to the VCO tuning varactor to
complete the PLL synthesizer. The synthesized VCO output
frequency is mixed with the TXLO signal to generate the transmit LO
from the lower sideband (the difference of the VCO and TXLO
frequencies). The output of VCO is fed to a programmable /N
prescaler with user selectable divides of 6, 7, 8 and 9 (all divides
configured to provide 50% duty cycle). The output of the /N divider
drives the A8/1 prescaler. The A8/1 divide is selected by the AD
control bit (AD=1 for /1, and AD=0 for /8). The output of the divide
A8/1 is fed into one input of the phase detector. The reference input
for the phase comparator is generated from the crystal oscillator
(XO) output from the B8/1 prescaler. The B8/1 divide is selected by
the AD control bit (AD=0 for /8, and AD=1 for /1). The phase
detector compares the prescaled XO reference phase to the VCO
prescaled phase, to generate a charge pump output current
proportional to the phase error. The phase detector, a Gilbert cell
multiplier type, having a linear output from 0 to

(

/2). The

charge pump peak output current is programmable from 100

A for

the AMPS mode (AD=0) to a maximum of 6.4mA for the DUAL
mode (AD=1) by way of an external current setting resistor placed
from I

PEAK

to circuit ground. The typical loop filter network is shown

in Figure 5. The charge pump current output is programmed by

OUT

1.25V

SET

OUT

1.25V

SET

where R

SET

is placed between I

PEAK

and GROUND.

The PLL frequency is determined by

VCO

(

)

(

)

where N=6, 7, 8, 9 and A8/1 and B8/1 are controlled by the AD bit
(AD=1 A8/1 and B8/1 are divide by 1, AD=0 A8/1 and B8/1 are
divide 8).

Table 2.

Data Word Format

Mnemonics

Bits

Function

1 (MSB)

Address bit 0 (1)

Address bit 1 (0)

Address bit 2 (1)

Address bit 4 (1)

PC0

Power control bit 0

PC1

Power control bit 1

PC2

Power control bit 2

PC3

Power control bit 3

PC4

Power control bit 4

PC5

Power control bit 5

Divide N bit 0

Divide N bit 1

AMPS/DUAL mode select bit

Synthesizer enable bit

SM1

Sleep mode 1 control bit

SM2

Sleep mode 2 control bit

Divide 3/1 control bit

Divide 2/1 control bit

24 (LSB)

VCO Operation

The VCO is designed to operate from 90MHz to 140MHz. The VCO
tank is configured using a parallel inductor and a dual common
cathode tuning varactor diodes. DC blocking capacitors are used to
isolate the varactor

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

control voltage from the VCO tank DC bias voltages. The VCO
tuning voltage is generated from the output of the PLL loop filter.
The VCO tank configuration is shown in Figure 6.

Crystal Oscillator (XO) Operation

For cellular radio applications, the SA900 will most likely utilize an
external reference TCXO in order to provide the frequency stability
necessary to operate to system requirements. The output of the
system TCXO can be AC coupled to the XTAL_1 input. However,
for applications that do not require such accuracy the XO circuit can
be configured as a Colpitts type oscillator with the addition of two
external capacitors along with the reference crystal and a trim
capacitor as shown in Figure 7.

Programmable Clock Outputs

The SA900 generates three buffered XO outputs used for external
reference signals. The XO feeds three sets of programmable
prescalers, the prescaler outputs are buffered to provide the CLK1,
CLK2 and MCLK signals. The CLK1 signal is a selectable divide 3/1
(X=1 divide 3, X=0 divide 1), 50% duty cycle, of the XO reference
signal. The CLK2 signal is a selectable divide 2/1 (Y=1 divide 2,
Y=0 divide 1), 50% duty cycle, of the XO reference signal. The
MCLK signal is a selectable divide 4/5/1 (CLKSET = V

divide 4,

CLKSET = V

/2 divide 5, and CLKSET = 0V divide 1), 50% duty

cycle, of the XO reference signal. MCLK is externally set by means
of the tri-level CLKSET input to provide a default master system
clock prior to programming the SA900.

Programming Operation

The SA900 is configured by means of a 3-wire input (CLOCK,
STROBE, DATA) to program the AMPS and DUAL modes, in
addition there are two power saving modes of operation, SLEEP and
STANDBY. The control logic section of the SA900 is designed using
low power CMOS logic. During SLEEP mode only the circuitry
required to provide a master clock (MCLK) to the digital portion of
the system is enabled. During the STANDBY mode of operation
MCLK, CLK1 and the TXLO and buffered LO outputs are powered
on, which may be the case when the system is in the receive only
mode. In the AMPS or DUAL operational modes all functions of the
SA900 are powered on to support receive, transmit and system
clock functions. The programming of the SA900 is identical to the
programming format of the SA7025 low-voltage 1GHz fractional-N
synthesizer, that can be used in conjunction with the SA900 to
provide the cellular radio channel selection.

The programming data is structured as a 24 bit long serial data
word; the word includes 4 address bits (dedicated 1 0 1 1) for chip
select. Data bits are shifted in on the leading edge of the clock, with
the least significant bit (LSB) first and the most significant bit (MSB)
last. Table 2 shows data word format, the 15th and last 5 bits are
not used. Figure 8 shows the chip timing diagram.

Address

Divide By N

Divide

AMPS/DUAL Mode

The A/D mode select enables or disables that portion of the circuitry
used for either the AMPS or DUAL mode of operation.

Mode

AMPS

DUAL

Synthesizer Enable

The SE bit turns on and off the synthesizer circuitry.

Operation

Disabled

Enabled

Sleep Mode 1

The SM1 bit is used to power down the TXLO buffer, the divide 3/1
prescaler and the CLK1 output buffer.

SM1

Operation

Power down

Power up (STANDBY)

Sleep Mode 2

The SM2 bit is used to power down the divide 2/1 prescaler and the
CLK2.

SM2

Operation

Power down

Power up (with
SM1=1 normal
operation)

Divide 3

Operation

Divide 1

Divide 3

Divide 2

Operation

Divide 1

Divide 2

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

Table 3.

Power Control

Attenuation (dB)

PC0 (0.6dB)

PC1 (1.3dB)

PC2 (2.5dB)

PC3 (5.0dB)

PC4 (10.0dB)

PC5 (20.0dB)

0.6

1.3

1.9

2.5

3.2

3.8

4.4

5.0

5.7

6.3

23.3

39.7

Component

Value

560

Designator

DUAL Mode

AMPS Mode

2.2nF

No Load

33pF

560

5.6k

2.7

.27

6.8nF

PHSOUT

VCTRL

Typical Filter Network

SET

15k

75k

SR00640

Figure 5. PLL Loop Filter

(AMPS MODULATION)

TANK_1

VCTRL

TANK_2

VCC

VR1

VCO

[

120MHz

L1C

)

CVRI

C1 = C2 = 33pF

C3 = 12pF

L1 = 82nH

VR1 TOKO KV1470

SR00641

Figure 6. VCO Tank Configuration

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

C241

100PF

C305

100pF

C306

.010uF

L304

39nH

C301

100pF

L372

22nH

C242

100pF

ZO=50

DIGTXRF

J10

AMPSTXRF

ZO=50

C312

100pF

C300

.010uF

JP1

JMP

JP2

JMP

JP3

JMP

R349

100k

R350

100k

C245

.010uF

ZO=50

LO2PS1

LO2PS2

Vcc

C246

GND

P1-4,5,6,1

1,12,13

P1-1,2,3

4.7uF

C247

100pF

C313

100pF

C314

100pF

TXLO2

ZO=50

C249

100pF

JP4

JMP

VCO-TUNE

P1-15

PHS-OUT

P1-14

JP5

JMP

C269

33pF

R264

R333

R258

C254

33pF

KV1470

C255

33pF

C253

5.6pF

L252

100nH

R266

560

R268

C267

220pF

C265

J18

VCO-REF

T1-1

KK81

XO-REF

R274

R260

R284

C263

.01uF

C371

100pF

R352

100

100pF

C370

R262

15k

C243

100pF

R279

C299

C283

C282

L280

C281

.010uF

C287

.010uF

R293

C292

C289

L290

CLK1

C288

.010uF

MCLK

L296

C295

C294

R297

Vcc

GND

DUAL

GND

Vcc

AMPSTX

GND

Vcc

GND

Vcc

GND

TXLO2

TXLO1

GND

Vcc

ANK1

ANK2

Vcc

PHS OUT

IPEAK

GND

AL1

D
c

SA900BE

P1-7

P1-8

CLOCK

P1-9

STROBE

P1-10

TXENABLE

NOTE:
VCO-REF circuit is optional

L372 is C307 on the PCB
C246 combines C240 and C244 on the PCB

SR00645

Figure 10. SA900 Application Circuit

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

C241

100PF

C305

100pF

C306

.010uF

L304

39nH

C301

100pF

L372

22nH

C242

100pF

ZO=50

DIGTXRF

C300

.010uF

C245

.010uF

Vcc

C246

GND

1000pF

C247

270pF

TXLO2

ZO=50

C249

100pF

ANK1

T1-1

KK81

XO-REF

R260

C263

.01uF

C371

100pF

C370

C243

100pF

Vcc

GND

DUAL

GND

Vcc

AMPSTX

GND

Vcc

GND

Vcc

GND

TXLO2

TXLO1

GND

Vcc

ANK1

ANK2

Vcc

PHS OUT

IPEAK

GND

AL1

D
c

CLOCK

STROBE

TXENABLE

SA900

R301

C280

1000pF

R300

PHASE OUT

R262

24K

R304

4.7K

C402

7pF

CLOCK2

R303

4.7K

C400

7pF

CLOCK1

R305

4.7K

C401

7pF

MCLK

CLKSET

C312

100pF

ZO=50

AMPSTX

C315

270pF

ZO=50

LO_1

C314

270pF

ZO=50

LO_2

SR00646

Figure 11. SA900 Test Circuit

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

PERFORMANCE CHARACTERISTICS

900

970

1040

16.00

FREQUENCY (MHz)

POWER (dBm)

LO Buffer vs. Frequency (27

C, TXLO = 10dBm)

16.50

17.00

17.50

18.00

18.50

19.00

900

970

1040

16.00

FREQUENCY (MHz)

POWER (dBm)

LO Buffer vs. Frequency (V

= 4.0V, TXLO = 10dBm)

16.50

17.00

17.50

18.00

18.50

19.00

19.50

20.00

T = +85

T = +27

T = 45

VCC = 3.9V

VCC = 4.0V

VCC = 4.5V

820

836

860

3.00

FREQUENCY (MHz)

POWER (dBm)

AMPTX vs. Frequency (27

C, TXLO = 10dBm)

2.80

2.60

2.40

2.20

2.00

1.80

1.60

1.40

1.20

1.00

VCC = 3.9V

VCC = 4.0V

VCC = 4.5V

820

836

860

4.00

FREQUENCY (MHz)

POWER (dBm)

AMPTX vs. Frequency (V

= 4.0V, TXLO = 10dBm)

3.50

3.00

2.50

2.00

1.50

1.00

0.50

0.00

0.50

1.00

820

836

850

2.60

2.40

2.20

FREQUENCY (MHz)

POWER (dBm)

DUALTX vs. Frequency (TEMP 27

C, TXLO = 10dBm)

820

836

850

3.50

3.00

2.50

2.00

1.50

1.00

0.50

0.00

FREQUENCY (MHz)

POWER (dBm)

DUALTX vs. Frequency (V

= 4.0V, TXLO = 10dBm)

CURRENT

(AMPERES)

DUAL I

vs. Temperature

TEMPERATURE (

T = +85

T = +27

T = 45

SR00647

2.80

2.00

VCC = 4.5V

VCC = 3.9V

VCC = 4.0V

VCC = 4.5V

VCC = 4.0V

VCC = 3.9V

VCC = 40

VCC = 27

VCC = 85

Figure 12. Performance Characteristics

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

PERFORMANCE CHARACTERISTICS

820

836

850

43.00

44.00

44.50

45.00

45.50

46.00

46.50

SUPPRESSION (dBc)

DUALTX Carrier Suppression vs. Frequency

= 4.0, TXLO = 10dBm Single Sideband Mode,

With Respect to Lower Sideband)

FREQUENCY (MHz)

47.50

47.00

820

836

850

44.50

45.00

45.50

46.00

47.00

47.50

SUPPRESSION (dBc)

DUALTX Sideband Suppression vs. Frequency

(Temperature = 27

C, TXLO = 10dBm Single

Sideband Mode, With Respect to Lower Sideband)

FREQUENCY (MHz)

820

836

850

34.00

FREQUENCY (MHz)

SUPPRESSION (dBc)

DUALTX Sideband Suppression vs Frequency

= 4.0V, TXLO = 10dBm Single Sideband

Mode, With Respect to Lower Sideband)

dBc

DUALTX 3rd Order Products vs Temperature

(TXLO = 10dBm, f = 836MHz, 0dB VGA I/Q Inphase)

TEMPERATURE (

30.00

TTENUA

TION (dB)

DUALTX Carrier Suppression vs VGA Range

(27

C, f = 836MHz, TXLO = 10dBm)

VGA 6-BIT WORD VALUE (LSBs)

35.00

40.00

45.00

50.00

55.00

10 13 15 18 20 23 25 26 29 33 37 40 44 48 51 55 59 63

30.00

TTENUA

TION (dB)

DUALTX Carrier Suppression vs VGA Range

= 4.0V, f = 836MHz, TXLO = 10dBm)

VGA 6-BIT WORD VALUE (LSBs)

35.00

40.00

45.00

50.00

55.00

10 13 15 18 20 23 25 26 29 33 37 40 44 48 51 55 59 63

60.00

VCC = 3.9V

VCC = 4.0V

VCC = 4.5V

36.00

38.00

40.00

42.00

44.00

46.00

48.00

T = +85

T = +27

T = 45

SR00648

43.50

46.50

VCC = 40

VCC = 85

VCC = 27

VCC = 4.5V

VCC = 4.0V

VCC = 3.9V

VCC = 85

VCC = 40

VCC = 27

VCC = 3.9V

VCC = 4.0V

VCC = 4.5V

Figure 13. Performance Characteristics

Philips Semiconductors

Preliminary specification

SA900

I/Q transmit modulator

1997 Sept 16

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.

LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381

DEFINITIONS

Data Sheet Identification

Product Status

Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.

Philips Semiconductors and Philips Electronics North America Corporation

Philips

Semiconductors

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SA900

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SA900