DATA SHEET
Product specification
File under Integrated Circuits, IC02
1998 Apr 21
INTEGRATED CIRCUITS
SAA4974H
Besic without ADC
1998 Apr 21
2
Philips Semiconductors
Product specification
Besic without ADC
SAA4974H
CONTENTS
1
FEATURES
2
GENERAL DESCRIPTION
3
QUICK REFERENCE DATA
4
ORDERING INFORMATION
5
BLOCK DIAGRAM
6
PINNING INFORMATION
6.1
Pinning
6.2
Pin description
7
FUNCTIONAL DESCRIPTION
7.1
Digital processing at 2f
H
level
7.1.1
4 : 1 : 1 to 4 : 2 : 2 up-conversion
7.1.2
DCTI
7.1.3
Y-peaking
7.1.4
Y-delay
7.1.5
Sidepanels and blanking
7.2
Digital-to-analog conversion
7.3
Microprocessor
7.3.1
I
2
C-bus
7.3.2
SNERT-bus
7.3.3
I/O-ports
7.3.4
Watchdog timer
7.4
Memory controller
7.4.1
WE
7.4.2
RSTW
7.4.3
RE
7.4.4
IE2
7.4.5
HDFL
7.4.6
VDFL
7.4.7
BLND
7.5
Clock and sync interfacing
7.6
4 : 1 : 1 digital input interfacing
7.7
Test mode operation
7.8
I
2
C-bus control registers
8
LIMITING VALUES
9
THERMAL CHARACTERISTICS
10
CHARACTERISTICS
11
APPLICATION
12
PACKAGE OUTLINE
13
SOLDERING
13.1
Introduction
13.2
Reflow soldering
13.3
Wave soldering
13.4
Repairing soldered joints
14
DEFINITIONS
15
LIFE SUPPORT APPLICATIONS
16
PURCHASE OF PHILIPS I
2
C COMPONENTS
1998 Apr 21
3
Philips Semiconductors
Product specification
Besic without ADC
SAA4974H
1
FEATURES
Field rate up-conversion (50 to 100 Hz or 60 to 120 Hz)
4 : 1 : 1 digital input
Digital Colour Transient Improvement (DCTI)
Digital luminance peaking
Triple 10-bit Digital-to-Analog Converter (DAC)
Memory controller
Embedded microprocessor
16 kbyte ROM
256 byte RAM
I
2
C-bus interface
Synchronous No parity Eight bit Reception and
Transmission (SNERT) interface.
2
GENERAL DESCRIPTION
The SAA4974H is a video processing IC providing a digital
YUV 4 : 1 : 1 input interface, analog YUV output, video
enhancing features, memory controlling and an embedded
80C51 microprocessor core. It is applicable especially for
field rate up-conversion (50 to 100 Hz or 60 to 120 Hz) in
cooperation with a 2.9 Mbit field memory. It is designed for
applications together with:
SAA7111A, VPC3200 (video decoder)
SAA4955/56TJ, TMS4C2972/73 (serial field memories)
SAA4990H (PROZONIC)
SAA4991WP (MELZONIC).
3
QUICK REFERENCE DATA
4
ORDERING INFORMATION
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
V
DDA(1,2)
analog supply voltage
3.15
3.3
3.45
V
V
DDD(1,2,3)
digital supply voltage
3.0
3.3
3.6
V
V
DDIO(1,2,3)
I/O supply voltage
4.5
5.0
5.5
V
I
DDA(1,2)
analog supply current
-
25
40
mA
I
DDD(1,2,3)
digital supply current
-
50
70
mA
I
DDIO(1,2,3)
I/O supply current
-
10
20
mA
P
tot
total power dissipation
-
-
0.5
W
T
amb
operating ambient temperature
-
20
-
+70
C
TYPE NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
SAA4974H
QFP80
plastic quad flat package; 80 leads (lead length 1.95 mm);
body 14
20
2.8 mm
SOT318-2
1998
Apr
21
4
Philips Semiconductors
Product specification
Besic without ADC
SAA4974H
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5
BLOCK DIAGRAM
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ok, full pagewidth
MGM687
SAA4974H
VARIABLE
Y-DELAY
REFORMATTER
UP-CONVERSION
4 : 1 : 1
TO
4 : 2 : 2
Y-PEAKING
DCTI
UP-CONVERSION
4 : 2 : 2
TO
4 : 4 : 4
BLANKING
SIDEPANELS
OVERLAY
RAM
MICROPROCESSOR
I
2
C-
BUS
SNERT-
BUS
I/O
PORT
ROM
YOUT
79
UOUT
76
VOUT
74
4
8
CONTROL
INTERFACE
MEMORY CONTROL
(DISPLAY)
3 to 7
5
10
2
P1.5
to
P1.1
SNRST
13
SNCL
12
SNDA
68
9
HRD
71
HDFL
72
VDFL
66
BLND
63
RE
64
IE2
70
LLD
CONTROL
INTERFACE
MEMORY CONTROL
(ACQUISITION)
24
RSTW
32
WE
47
SWC
33
LLA
22
HA
20
VA
TEST
CONTROL
BLOCK
15
30
TMS
49
TRST
ANATEST
59 to 62
UVI7 to UVI4
51 to 58
YI7 to YI0
SCL
1
SDA
RST
TRIPLE
10-BIT DAC
Fig.1 Block diagram.
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