2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

FEATURES

The following features apply to both SAA5264 and
SAA5265:

Complete 625 line teletext decoder in one chip reduces
printed circuit board area and cost

Automatic detection of transmitted fastext links or
service information (packet 8/30)

On-Screen Display (OSD) for user interface menus
using teletext and dedicated menu icons

Video Programming System (VPS) decoding

Wide Screen Signalling (WSS) decoding

Pan-European, Cyrillic, Greek/Turkish and
French/Arabic character sets in each chip

High-level command interface via I

C-bus gives easy

control with a low software overhead

High-level command interface is backward compatible
to Stand-Alone Fastext And Remote Interface (SAFARI)

625 and 525 line display

RGB interface to standard colour decoder ICs, current
source

Versatile 8-bit open-drain Input/Output (I/O) expander,
5 V tolerant

Single 12 MHz crystal oscillator

3.3 V supply voltage.

SAA5264 features

Automatic detection of transmitted pages to be selected
by page up and page down

8 Page fastext decoder

Table Of Pages (TOP) decoder with Basic Top Table
(BTT) and Additional Information Tables (AITs)

4 Page user-defined list mode.

GENERAL DESCRIPTION

The SAA5264 is a single-chip ten page 625-line World
System Teletext decoder with a high-level command
interface, and is SAFARI compatible.

The SAA5265 is a single-chip one page version of the
SAA5264.

Both devices are designed to minimize the overall system
cost, due to the high-level command interface offering the
benefit of a low software overhead in the TV
microcontroller.

The SAA5264 has the following functionality:

10 page teletext decoder with OSD, Fastext, TOP,
default and list acquisition modes

Automatic channel installation support

Closed caption acquisition and display

Violence Chip (VChip) support.

The SAA5265 has the following functionality:

1 Page teletext decoder with OSD, fastext and default
acquisition modes

Automatic channel installation support

Closed caption acquisition and display

VChip support

No EEPROM fitted (there is no list mode feature).

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

ORDERING INFORMATION

Note

1. `nnnn' is a unique four digit number denoting the software version.

QUICK REFERENCE DATA

Note

1. Periphery supply current is dependent on external components and I/O voltage levels.

TYPE NUMBER

(1)

PACKAGE

NAME

DESCRIPTION

VERSION

SAA5264PS/M3/nnnn

SDIP52

plastic shrink dual-in-line package; 52 leads (600 mil)

SOT247-1

SAA5265PS/M4/nnnn

SDIP52

plastic shrink dual-in-line package; 52 leads (600 mil)

SOT247-1

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

DDX

all supply voltages

referenced to V

3.0

3.3

3.6

DDP

periphery supply current

note 1

DDC

core supply current

normal mode

idle mode

4.6

DDA

analog supply current

normal mode

idle mode

0.87

xtal(nom)

nominal crystal frequency

fundamental mode

MHz

amb

ambient temperature

+70

stg

storage temperature

+125

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

PINNING

SYMBOL

PIN

TYPE

DESCRIPTION

Port 2: 8-bit programmable bidirectional port with alternative functions

P2.0/PWM

I/O

output for 14-bit high precision Pulse Width Modulator (PWM)

P2.1/PWM0

I/O

outputs for 6-bit PWMs 0 to 6

P2.2/PWM1

I/O

P2.3/PWM2

I/O

P2.4/PWM3

I/O

P2.5/PWM4

I/O

P2.6/PWM5

I/O

P2.7/PWM6

I/O

Port 3: 8-bit programmable bidirectional port with alternative functions

P3.0/ADC0

I/O

inputs for the software Analog-to-Digital-Converter (ADC) facility

P3.1/ADC1

I/O

P3.2/ADC2

I/O

P3.3/ADC3

I/O

P3.4/PWM7

I/O

output for 6-bit PWM7

SSC

core ground

Port 0: 8-bit programmable bidirectional port

SCL(NVRAM)

C-bus Serial Clock input to Non-Volatile RAM

SDA(NVRAM)

I/O

C-bus Serial Data input/output (Non-Volatile RAM)

P0.2

I/O

input/output for general use

P0.3

I/O

input/output for general use

P0.4

I/O

input/output for general use

P0.5

I/O

8 mA current sinking capability for direct drive of Light Emitting Diodes (LEDs)

P0.6

I/O

P0.7

I/O

input/output for general use

SSA

analog ground

CVBS0

Composite Video Baseband Signal (CVBS) input; a positive-going 1 V
(peak-to-peak) input is required; connected via a 100 nF capacitor

CVBS1

SYNC_FILTER

sync-pulse-filter input for CVBS; this pin should be connected to V

SSA

via a

100 nF capacitor

IREF

reference current input for analog circuits; for correct operation a 24 k

resistor

should be connected to V

SSA

FRAME

Frame de-interlace output synchronized with the VSYNC pulse to produce a
non-interlaced display by adjustment of the vertical deflection circuits

TEST

not available; connect this pin to V

SSA

COR

contrast reduction: open-drain, active LOW output which allows selective contrast
reduction of the TV picture to enhance a mixed mode display

I/O

P3.4/PWM7 (described above)

DDA

analog supply voltage (3.3 V)

Blue colour information pixel rate output

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

Green colour information pixel rate output

Red colour information pixel rate output

VDS

video/data switch push-pull output for pixel rate fast blanking

HSYNC

horizontal sync pulse input: Schmitt triggered for a Transistor Transistor Level (TTL)
version; the polarity of this pulse is programmable by register bit
TXT1.H POLARITY

VSYNC

vertical sync pulse input; Schmitt triggered for a TTL version; the polarity of this
pulse is programmable by register bit TXT1.V POLARITY

SSP

periphery ground

DDC

core supply voltage (+3.3 V)

OSCGND

crystal oscillator ground

XTALIN

12 MHz crystal oscillator input

XTALOUT

12 MHz crystal oscillator output

RESET

reset input; if this pin is HIGH for at least 2 machine cycles (24 oscillator periods)
while the oscillator is running, the device resets; this pin should be connected to
V

DDP

via a capacitor

DDP

periphery supply voltage (+3.3 V)

Port 1: 8-bit programmable bidirectional port

P1.0

I/O

input/output for general use

P1.1

I/O

input/output for general use

P1.2

I/O

input/output for general use

P1.3

I/O

input/output for general use

SCL

C-bus Serial Clock input from application

SDA

I/O

C-bus Serial Data input/output (application)

P1.4

I/O

input/output for general use

P1.5

I/O

input/output for general use

SYMBOL

PIN

TYPE

DESCRIPTION

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

HIGH LEVEL COMMAND INTERFACE

The I

C-bus interface is used to pass control commands and data between the SAA5264/SAA5265 and the television

microcontroller. The interface uses high-level commands, which are backward compatible with the SAFARI.

The I

C-bus transmission formats are:

Table 1

User command

Table 2

System command

Table 3

User read

CHARACTER SETS

The following standard character sets are included in the SAA5264 and in the SAA5265:

Set 0 = Pan-European

Set 1 = Cyrillic

Set 2 = Greek/Turkish

Set 3 = French/Arabic

If you require any other character sets, please discuss them with your local Regional Sales Office first.

LIMITING VALUES
In accordance with Absolute Maximum Rating System (IEC 60134).

Note

1. This maximum value refers to 5 V tolerant I/Os and may be 6 V maximum but only when V

is present.

START

C-BUS ADDRESS

WRITE

ACK

COMMAND

ACK

STOP

START

C-BUS ADDRESS

WRITE

ACK

COMMAND

ACK

PARAMETER

ACK

STOP

START

C-BUS ADDRESS

READ

ACK

DATA

ACK

STOP

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

DDX

all supply voltages

0.5

+4.0

input voltage (any input)

note 1

0.5

+ 0.5 or +4.1

output voltage (any output)

note 1

0.5

+ 0.5

output current (each output)

IO(d)

diode DC input or output current

amb

ambient temperature

+70

stg

storage temperature

+125

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

CHARACTERISTICS
V

= 3.3 V

10%; V

= 0 V; T

amb

20 to +70

C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

DDX

all supply voltages

referenced to V

3.0

3.3

3.6

DDP

periphery supply
current

note 1

DDC

core supply current

normal mode

DDC(idle)

idle mode core supply
current

4.6

DDA

analog supply current

DDA(idle)

idle mode analog
supply current

normal mode

0.87

Digital inputs

RESET (

43)

LOW-level input
voltage

1.00

HIGH-level input
voltage

1.85

hys

Schmitt trigger input
hysteresis voltage

0.44

0.58

input leakage current

= 0

0.17

pd(eq)

equivalent pull-down
resistance

= V

55.73 70.71

92.45

HSYNC, VSYNC (

PINS

AND

37)

LOW-level input
voltage

0.96

HIGH-level input
voltage

1.80

hys

Schmitt trigger input
hysteresis voltage

0.40

0.56

Input leakage current

= 0 to V

0.00

Digital outputs

FRAME, VDS (

PINS

AND

35)

LOW-level output
voltage

= 3 mA

0.13

HIGH-level output
voltage

= 3 mA

2.84

o(r)

output rise time

between 10% and
90%; C

= 70 pF

7.50

8.85

10.90

o(f)

output fall time

between 10% and
90%; C

= 70 pF

6.70

7.97

10.00

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

COR (

OPEN

DRAIN OUTPUT

29)

LOW-level output
voltage

= 3 mA

0.14

OH(pu)

HIGH-level pull-up
output voltage

3 mA;

push-pull

2.84

LOW-level input
voltage

0.00

HIGH-level input
voltage

0.00

5.50

input leakage current

= 0 to V

0.12

o(r)

output rise time

between 10% and
90%; C

= 70 pF

7.20

8.64

11.10

o(f)

output fall time

between 10% and
90%; C

= 70 pF

4.90

7.34

9.40

Digital input/outputs

SCL(NVRAM), SDA(NVRAM), P0.4, P0.7, P1.0, P1.1, P2.1

P2.7, P3.0

P3.4

(

PINS

14, 15, 18, 21, 45, 46, 2

12, 30)

LOW-level input
voltage

0.98

HIGH-level input
voltage

1.78

hys

Schmitt trigger input
hysteresis voltage

0.41

0.55

input leakage current

= 0 to V

0.01

LOW-level output
voltage

= 4 mA

0.18

HIGH-level output
voltage

4 mA

push-pull

2.81

o(r)

output rise time

between 10% and
90%; C

= 70 pF

push-pull

6.50

8.47

10.70

o(f)

output fall time

between 10% and
90%; C

= 70 pF

5.70

7.56

10.00

P1.2, P1.3, P2.0 (

PINS

47, 48, 1)

LOW-level input
voltage

0.99

HIGH-level input
voltage

1.80

hys

Schmitt trigger input
hysteresis voltage

0.42

0.56

input leakage current

= 0 to V

0.02

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

LOW-level output
voltage

= 4 mA

0.17

HIGH-level output
voltage

4 mA

push-pull

2.81

o(r)

output rise time

between 10% and
90%; C

= 70 pF

push-pull

7.00

8.47

10.50

o(f)

output fall time

between 10% and
90%; C

= 70 pF

5.40

7.36

9.30

P0.5, P0.6 (

PINS

19, 20)

LOW-level input
voltage

0.98

HIGH-level input
voltage

1.82

input leakage current

= 0 to V

0.11

hys

Schmitt trigger input
hysteresis voltage

0.42

0.58

LOW-level output
voltage

= 8 mA

0.20

HIGH-level output
voltage

8 mA

push-pull

2.76

o(r)

output rise time

between 10% and
90%; C

= 70 pF

push-pull

7.40

8.22

8.80

o(f)

output fall time

between 10% and
90%; C

= 70 pF

4.20

4.57

5.20

P1.4, P1.5 (

OPEN

DRAIN

) (

PINS

51, 52)

LOW-level input
voltage

1.08

HIGH-level input
voltage

1.99

hys

Schmitt trigger input
hysteresis voltage

0.49

0.60

input leakage current

= 0 to V

0.13

LOW-level output
voltage

= 8 mA

0.35

o(f)

output fall time

between 10% and
90%; C

= 70 pF

69.70 83.67

103.30

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

Analog inputs

CVBS0

AND

CVBS1(

PINS

AND

24)

sync

sync voltage
amplitude

0.1

0.3

0.6

i(v)(p-p)

video input voltage
(peak-to-peak value)

0.7

1.0

1.4

source

source impedance

250

HIGH-level input
voltage

3.0

DDA

+0.3

input capacitance

IREF (

26)

IREF

resistance from IREF
to V

SSA

resistor
tolerance = 2%

ADC0

ADC3 (

PINS

12)

HIGH-level input
voltage

DDA

input capacitance

Analog outputs

B, G

AND

R (

PINS

34)

o(bl)

output current
(black level)

DDA

= 3.3 V

+10

o(max)

output current
(maximum intensity)

DDA

= 3.3 V

intensity level
code = 15 (Dec)

6.0

6.67

7.3

o(70%max)

output current
(70% of maximum
intensity)

DDA

= 3.3 V

intensity level
code = 0 (Dec)

4.2

4.7

5.1

load resistance (to
V

SSA

)

resistor
tolerance = 5%

150

load capacitance

Analog input/output

SYNC_FILTER (

25)

stg

storage capacitor
(to V

SSA

)

100

sync(nom)

sync filter level
voltage with nominal
sync amplitude

0.35

0.55

0.75

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

Notes

1. Periphery supply current is dependent on I/O external components and voltage levels.

2. Crystal order number 4322 143 05561. If crystal 4322 143 05561 is not used, then the formulae in the crystal

specification should be used.

3. C

osc

may need to be reduced from the initially selected value. C

chip

= 7 pF, the mean of the capacitances due to the

chip at XTALIN and at XTALOUT. C

stray

is a value for the mean of the stray capacitances due to the external circuit

at XTALIN and XTALOUT. The maximum value for C

xtal(hold)

is to ensure start-up.

Crystal oscillator

XTALIN (

41)

LOW-level input
voltage

SSA

HIGH-level input
voltage

DDA

input capacitance

XTALOUT (

42)

output capacitance

Crystal specification; notes 2 and 3

xtal(nom)

nominal frequency

fundamental
mode

MHz

load capacitance

mot

motional capacitance

amb

= 25

xtal

crystal resonance
resistance

amb

= 25

osc

capacitance at
XTALIN, XTALOUT

amb

= 25

xtal(hold)

crystal holder
capacitance

amb

= 25

xtal

crystal temperature
range

+25

+85

adjustment tolerance

amb

= 25

drift

100

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

chip

stray

osc

------------

chip

-------------

stray

---------------

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

C-BUS CHARACTERISTICS

Notes

1. A device must internally provide a hold time of at least 300 ns for the SDA signal (referenced to the V

IHmin

of the

SCL signal) in order to bridge the undefined region of the falling edge of SCL.

2. The maximum t

HD;DAT

has only to be met if the device does not stretch the LOW period of the SCL signal (t

LOW(SCL)

3. A fast-mode I

C-bus device can be used in a standard-mode I

C-bus system, but the requirement t

SU;DAT

250 ns

must then be met. This will automatically be the case if the device does not stretch t

LOW(SCL)

. If such a device does

stretch t

LOW(SCL)

, it must output the next data bit to the SDA line t

r(max)

+ t

SU;DAT

= 1000 + 250 = 1250 ns (according

to the standard-mode I

C-bus specification) before the SCL line is released.

4. C

= total capacitance of one bus line in pF.

SYMBOL

PARAMETER

FAST-MODE I

C-bus

UNIT

MIN.

MAX.

SCL

SCL clock frequency

400

kHz

BUF

bus free time between a STOP and START condition

1.3

HD;STA

hold time START condition; after this period, the first clock
pulse is generated

0.6

LOW

SCL LOW time

1.3

HIGH

SCL HIGH time

0.6

SU;STA

set-up time repeated START

0.6

HD;DAT

data hold time; notes 1 and 2

0.9

SU;DAT

data set-up time; note 3

100

rise time SDA and SCL; note 4

300

fall time SDA and SCL; note 4

300

SU;STO

set-up time STOP condition

0.6

capacitive load of each bus line

400

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

EMC GUIDELINES

Optimization of circuit return paths and minimization of
common mode emission will be assisted by using a double
sided Printed Circuit Board (PCB) with low inductance
ground plane.

On a single-sided PCB a local ground plane under the
whole IC should be present as shown in Fig.3. This should
have the widest possible connection between the PCB
ground and bulk electrolytic decoupling capacitor.
Preferably, the PCB local ground plane connection should
not be connected to other grounds on route to the PCB
ground. Do not use wire links. Wire links cause ground
inductance which increases ground bounce.

The supply pins can be decoupled at the ground pin plane
below the IC. This is easily achieved by using surface
mount capacitors, which, at high frequency, are more
effective than components with leads.

Using a device socket would increase the area and
therefore increase the inductance of the external bypass
loop.

To provide a high-impedance to any high frequency
signals on the V

supplies to the IC, a ferrite bead or

inductor can be connected in series with the supply line
close to the decoupling capacitor. To prevent signal
radiation, pull-up resistors of signal outputs should not be
connected to the V

supply on the IC side of the ferrite

bead or inductor.

OSCGND should only be connected to the crystal load
capacitors and not to any other ground connection.

Distances to physical connections of associated active
devices should be as short as possible.

PCB output tracks should have close proximity, mutually
coupled, ground return paths.

handbook, full pagewidth

electrolytic decoupling capacitor (2

ferrite beads

SM decoupling capacitors (10 to 100 nF)

under-IC GND plane

MBK979

VSSC

VSSA

DDP

SSP

DDC

DDA

GND

3.3 V

other
GND
connections

under-IC GND plane
GND connection
note: no wire links

Fig.3 Power supply connections for EMC.

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

QUALITY AND RELIABILITY

This device will meet Philips Semiconductors general quality specification for business group

"Consumer Integrated

Circuits SNW-FQ-611-Part E". The principal requirements are shown in Tables 4 to 7.

Group A

Table 4

Acceptance tests per lot; note 1

Note

1. ppm = fraction of defective devices, in parts per million.

Group B

Table 5

Processability tests (by package family)

Group C

Table 6

Reliability tests (by package family); note 1

Note

1. FPM = fraction of devices failing at test condition, in Failures Per Million.

Table 7

Reliability tests (by device type)

TEST

REQUIREMENTS

Mechanical

cumulative target: <80 ppm

Electrical

cumulative target: <100 ppm

TEST

REQUIREMENTS

Solderability

0/16 on all lots

Mechanical

0/15 on all lots

Solder heat resistance

0/15 on all lots

TEST

CONDITIONS

REQUIREMENTS

Operational life

168 hours at T

= 150

<1000 FPM at T

= 150

Humidity life

temperature, humidity, bias 1000 hours;
T

amb

= 85

C, 85% RH (or equivalent test)

<2000 FPM

Temperature cycling performance T

stg(min)

to T

stg(max)

<2000 FPM

TEST

CONDITIONS

REQUIREMENTS

ESD and latch-up

ESD Human body model 100 pF, 1.5 k

2000 V

ESD Machine model 200 pF, 0

200 V

latch-up

100 mA, 1.5

(absolute maximum)

2000

Jan

Philips Semiconductors

Preliminar

y specification

10 and 1 page intelligent telete

xt decoders

SAA5264; SAA5265

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APPLICA

TION INFORMA

TION

handbook, full pagewidth

GSA035

24 k

150

1 k

100 nF

SAA5264
SAA5265

EEPROM

PCF8582E

P2.0/PWM

user ports

P2.1/PWM0

P2.2/PWM1

P2.3/PWM2

P2.4/PWM3

P2.5/PWM4

P2.6/PWM5

P2.7/PWM6

P3.0/ADC0

P3.1/ADC1

P3.2/ADC2

P3.3/ADC3

VSSC

SCL(NVRAM)

SDA(NVRAM)

SCL

SDA

P0.2

P0.3

P0.4

P0.5

P0.6

P0.7

CVBS0

CVBS

100 nF

CVBS

CVBS1

SYNC_FILTER

12 MHz

IREF

VDD

VSS

VDD

VSSA

P1.5

P1.4

SDA

SCL

SDA

SCL

P1.3

P1.2

P1.1

P1.0

VDDP

VDD

RESET

XTALOUT

XTALIN

OSCGND

VDDC
VSSP

VSYNC

HSYNC

field flyback

line flyback

VDS

VDDA

VDD

P3.4/PWM7

TEST

FRAME

COR

56 pF

100

Fig.4 Application diagram.

Bi-directional ports have been configured as open-drain. Output ports have been configured as push-pull.

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

SOLDERING

Introduction to soldering through-hole mount
packages

This text gives a brief insight to wave, dip and manual
soldering. A more in-depth account of soldering ICs can be
found in our

"Data Handbook IC26; Integrated Circuit

Packages" (document order number 9398 652 90011).

Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit
board.

Soldering by dipping or by solder wave

The maximum permissible temperature of the solder is
260

C; solder at this temperature must not be in contact

with the joints for more than 5 seconds.

The total contact time of successive solder waves must not
exceed 5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T

stg(max)

). If the

printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

Manual soldering

Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300

C it may remain in contact for up to

10 seconds. If the bit temperature is between
300 and 400

C, contact may be up to 5 seconds.

Suitability of through-hole mount IC packages for dipping and wave soldering methods

Note

1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.

PACKAGE

SOLDERING METHOD

DIPPING

WAVE

DBS, DIP, HDIP, SDIP, SIL

suitable

(1)

2000 Jan 27

Philips Semiconductors

Preliminary specification

10 and 1 page intelligent teletext decoders

SAA5264; SAA5265

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

C COMPONENTS

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Purchase of Philips I

C components conveys a license under the Philips' I

C patent to use the

components in the I

C system provided the system conforms to the I

C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

SCA

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

2000

Philips Semiconductors a worldwide company

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

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Colombia: see South America

Czech Republic: see Austria

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Finland: Sinikalliontie 3, FIN-02630 ESPOO,
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Hungary: see Austria

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Middle East: see Italy

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Pakistan: see Singapore

Philippines: Philips Semiconductors Philippines Inc.,
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Tel. +381 11 3341 299, Fax.+381 11 3342 553

Printed in The Netherlands

753504/02/pp

Date of release:

2000 Jan 27

Document order number:

9397 750 06789

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SAA5265

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SAA5265