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Электронный компонент: SAA5700GP/M4C

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DATA SHEET
Preliminary specification
File under Integrated Circuits, IC02
1997 May 16
INTEGRATED CIRCUITS
SAA5700
Chinese Character System Teletext
(CCST) decoder
1997 May 16
2
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
FEATURES
Acquisition and display of the 625-line PAL CCST
Chinese standard for teletext, with Chinese and Latin
character sets
Supports multiple DRAM sizes: 256K
4 bits,
1M
4 bits, 4M
4 bits and 2
1M
4 bits with an
additional decoder/demultiplexer IC
Acquires and stores in background up to (typically)
400 pages with 1M
4 bits external DRAM
CCST Fastext, with capability of displaying Chinese
characters on Fastext prompt row
Meshing for reduced contrast video background in
subtitles and boxes
Full line and screen colour to all edges of screen
Supports 625-line 50/100 Hz display modes
Scan-locked and stand-alone sync modes; supports
video-locked sync modes with external PLL
Easy control via high level I
2
C-bus SAFARI commands
Sync mode switching and picture centring via I
2
C-bus
SAFARI commands
Supports external decryption unit for encrypted data.
GENERAL DESCRIPTION
The SAA5700 is a Chinese teletext decoder suitable for TV
and multimedia applications. It incorporates all the data
slicing, acquisition and display circuitry on-chip, as well as
the logic for memory management. An external DRAM is
used to store the currently displayed page and also the
precaptured teletext pages.
An external ROM is used to store the ideographic Chinese
character set. There is a high level software interface with
easy commands for the control of the decoder. Control is
achieved via the I
2
C-bus.
The device is available in a QFP64 package.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
SAA5700GP
QFP64
plastic quad flat package; 64 leads (lead length 1.95 mm);
body 14
20
2.8 mm
SOT319-2
1997 May 16
3
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
MGG539
SYNC
SEPARATOR
DATA
ACQUISITION
PACKET
BUFFER
MEMORY
INTERFACE
OSCILLATOR
AND CLOCK
GENERATOR
ACQUISITION
TIMING
PROCESSOR
BLOCK
DISPLAY
INTERFACE
DISPLAY
TIMING
FRONT END
DISPLAY SECTION
SAA5700
BUS
35
4
5
10
6
7
27
42
53
44
54, 41, 40,
38 to 36,
32 to 28
55 to 58,
52, 51,
47, 46
25
18
17
24
23
22
21
62
61
60
63
59
64
1
33
48
49
2
19
20
9
8
14,16,
26
12 MHz
RD7 to RD0
RA10 to RA0
WE
CAS
RAS
ROMCS
IREF
REF
+
STN
CVBS
BLACK
VDDD1 VSS1 VDDD2 VSS2 VSS3 VDDX VSSO VDDA VSSA VSS
OSCOUT
OSCIN
RESET
DCL
DDA
SCL
SDA
R
G
B
BLAN
LFB
FFB/STTV
ODD/EVEN
24 MHz
6 MHz
1997 May 16
4
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
PINNING
SYMBOL
PIN
I/O
DESCRIPTION
OSCOUT
1
O
oscillator output to crystal
V
SS3
2
ground
ground for I/O pad buffers connect to V
SS
; internally connected to V
SS1
and V
SS2
n.c.
3
-
not connected
BLACK
4
I/O
black level sample and hold capacitor; 100 nF to V
SSA
CVBS
5
I
video signal input; 100 nF series capacitor, 250
source impedance maximum,
reference to V
SSA
STN
6
I/O
ADC current reference decoupling; 100 nF to V
SSA
I
REF
7
I
current reference input; 10 k
to V
SSA
V
SSA
8
ground
0 V power supply; analog
V
DDA
9
supply
+5 V power supply; analog
REF+
10
I
ADC voltage reference decoupling; 100 nF to V
SSA
i.c.
11
-
internally connected; do not use
i.c.
12
-
internally connected; do not use
i.c.
13
-
internally connected; do not use
V
SS
14
ground
connect to V
SS
for normal use
n.c.
15
-
not connected
V
SS
16
ground
connect to V
SS
for normal use
LFB
17
I
scan line flyback input (HSYNC)
FFB/STTV
18
I/O
scan field flyback input (VSYNC)/sync to TV output
V
DDX
19
supply
+5 V power supply; connect to V
DD
for normal use
V
SSO
20
ground
output stage current return and 0 V
R
21
O
analog Red output
G
22
O
analog Green output
B
23
O
analog Blue output
BLAN
24
O
fast blanking (VDS)
ODD/EVEN
25
O
frame rate signal for hardware de-interlace (FRAME)
V
SS
26
ground
connect to V
SS
for normal use
ROMCS
27
O
chip select (address decode) for ROM
RA0
28
O
bit 0 of address to DRAM, ROM and IC
RA1
29
O
bit 1 of address to DRAM, ROM and IC
RA2
30
O
bit 2 of address to DRAM, ROM and IC
RA3
31
O
bit 3 of address to DRAM, ROM and IC
1997 May 16
5
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
RA4
32
O
bit 4 of address to DRAM, ROM and IC
V
SS1
33
ground
0 V power supply digital; connected internally to V
SS2
and V
SS3
n.c.
34
-
not connected
V
DDD1
35
supply
+5 V power supply digital; connected internally to V
DD2
RA5
36
O
bit 5 of address to DRAM, ROM and IC
RA6
37
O
bit 6 of address to DRAM, ROM and IC
RA7
38
O
bit 7 of address to DRAM, ROM and IC
n.c.
39
-
not connected
RA8
40
O
bit 8 of address to DRAM, ROM and IC
RA9
41
O
bit 9 of address to DRAM, ROM and IC
RAS
42
O
row address strobe to DRAM; active LOW
n.c.
43
-
not connected
WE
44
O
write enable to DRAM and IC; active LOW
i.c.
45
-
internally connected; do not use
RD0
46
I/O
bit 0 of data bus to/from DRAM, ROM and IC
RD1
47
I/O
bit 1 of data bus to/from DRAM, ROM and IC
V
DDD2
48
supply
+5 V power supply digital; connected internally to V
DD1
V
SS2
49
ground
0 V power supply digital; connected internally to V
SS1
and V
SS3
n.c.
50
-
not connected
RD2
51
I/O
bit 2 of data bus to/from DRAM, ROM and IC
RD3
52
I/O
bit 3 of data bus to/from DRAM, ROM and IC
CAS
53
O
column address strobe to DRAM; active LOW
RA10
54
O
bit 10 of address to DRAM, ROM and IC
RD7
55
I/O
bit 7 of data bus to/from DRAM, ROM and IC
RD6
56
I/O
bit 6 of data bus to/from DRAM, ROM and IC
RD5
57
I/O
bit 5 of data bus to/from DRAM, ROM and IC
RD4
58
I/O
bit 4 of data bus to/from DRAM, ROM and IC
RESET
59
I
chip/processor reset input (active HIGH)
DDA
60
I/O
bidirectional serial data to/from optional Decryptor
SCL
61
I
primary I
2
C-bus serial clock input
SDA
62
I/O
primary I
2
C-bus serial data
DCL
63
O
serial clock to optional Decryptor
OSCIN
64
I
oscillator input from crystal/external clock input
SYMBOL
PIN
I/O
DESCRIPTION
1997 May 16
6
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
Fig.2 Pin configuration.
handbook, full pagewidth
SAA5700
MGG538
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
OSCOUT
VSS3
n.c.
BLACK
CVBS
STN
IREF
VSSA
VDDA
REF
+
i.c.
i.c.
i.c.
VSS
n.c.
VSS
LFB
FFB/STTV
VDDX
RD2
n.c.
VSS2
VDDD2
RD1
RD0
i.c.
WE
n.c.
RAS
RA9
RA8
n.c.
RA7
RA6
RA5
VDDD1
n.c.
VSS1
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
OSCIN
DCL
SDA
SCL
DDA
RESET
RD4
RD5
RD6
RD7
RA10
CAS
RD3
V
SSO
R
G
B
BLAN
ODD/EVEN
V
SS
ROMCS
RA0
RA1
RA2
RA3
RA4
1997 May 16
7
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
HIGH LEVEL I
2
C-BUS COMMAND INTERFACE
This device communicates via the I
2
C-bus using the SAFARI protocol. The following section indicates the protocol which
is supported by this decoder.
User commands
Table 1 lists the CCST user command codes in TV mode; Table 2 lists the CCST user command codes in Text mode.
Table 1
TV mode user command codes
FUNCTION ID
(HEX)
FUNCTION
00
-
01
-
02
-
03
PICTURE
04
STATUS
05
-
06
-
07
TIME
08
-
09
-
0A
-
0B
-
0C
-
0D
-
0E
-
0F
-
10
TV PROGRAMME 0
11
TV PROGRAMME 1
12
TV PROGRAMME 2
13
TV PROGRAMME 3
14
TV PROGRAMME 4
15
TV PROGRAMME 5
16
TV PROGRAMME 6
17
TV PROGRAMME 7
18
TV PROGRAMME 8
19
TV PROGRAMME 9
1A
TV PROGRAMME 10
1B
TV PROGRAMME 11
1C
TV PROGRAMME 12
1D
TV PROGRAMME 13
1E
TV PROGRAMME 14
1F
TV PROGRAMME 15
Table 2
Text mode user command codes
FUNCTION ID
(HEX)
FUNCTION
20
RED
21
GREEN
22
YELLOW
23
SUBTITLE
24
STATUS
25
HOLD TOGGLE
26
REVEAL
27
CANCEL TOGGLE
28
INDEX
29
-
2A
BROWSE
2B
REVEAL SET TOGGLE
2C
-
2D
PREVIOUS
2E
DISPLAY CHINESE PROMPT
2F
SUBCODE TOGGLE
30
1
31
2
32
3
33
4
34
5
35
6
36
7
27
8
28
9
29
0
3A
SIZE
3B
UP
3C
DOWN
3D
CYAN
3E
MIX
3F
TEXT
1997 May 16
8
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
Extended commands
The extended commands for the decoder are listed in Table 3.
Table 3
Extended commands
OBJECT
FUNCTION
PARAMETER LENGTH
(BYTES)
PARAMETERS
NAME
ID
(HEX)
NAME
ID
(HEX)
INPUT
OUTPUT
INPUT
OUTPUT
Display
48
set sync mode
04
1
-
sync mode
none
set display
position
08
4
-
row start, line start none
Processor
52
restart software
06
3
-
FFFFFCH
none
Memory and OSD
53
read packet
03
1
[+1]
40
packet number,
[Designation
code]
packet data
write packet
06
1
+40
-
packet number,
packet data
none
OSD mode on
08
0
-
none
none
OSD mode off
0A
0
-
none
none
OSD display
0E
0
-
none
none
clear display page
10
0
-
none
none
1997 May 16
9
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
CHARACTERISTICS
T
amb
=
-
20 to +70
C and V
DDn
= 4.5 to 5.5 V; unless otherwise indicated.
SYMBOL
PARAMETER
MIN.
MAX.
UNITS
V
DDD1
digital supply voltage 1
-
0.3
+6.5
V
V
DDD2
digital supply voltage 2
-
0.3
+6.5
V
V
DDA
analog supply voltage
-
0.3
+6.5
V
V
DDX
supply voltage X
-
0.3
+6.5
V
V
I(max)
maximum input voltage (any input)
-
0.3
V
DD
+ 0.5
V
V
O(max)
maximum output voltage (any output)
-
0.3
V
DD
+ 0.5
V
V
DDX-DDn
supply voltage difference
between V
DDX
, V
DDD1
, V
DDD2
and V
DDA
-
0.25
V
I
I(d)
diode input current (DC)
-
20
mA
I
O(d)
diode output current (DC)
-
20
mA
I
O(max)
maximum output current (any output)
-
10
mA
T
stg
storage temperature
-
55
+125
C
T
amb
operating ambient temperature
-
20
+70
C
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Power supplies
V
DDD1
digital supply voltage 1
4.5
5.0
5.5
V
I
DDD1
digital supply current 1
-
95
140
mA
V
DDD2
digital supply voltage 2
4.5
5.0
5.5
V
I
DDD2
digital supply current 2
-
2.4
6.5
mA
V
DDA
analog supply voltage
4.5
5.0
5.5
V
I
DDA
analog supply current
-
40
53
mA
V
DDX
supply voltage X
4.5
5.0
5.5
V
I
DDX
supply current X
-
32
40
mA
I
DD(tot)
total supply current
-
170
240
mA
Inputs
CVBS
V
sync
sync amplitude
0.1
0.3
0.6
V
V
bur(p-p)
colour burst amplitude
(peak-to-peak value)
0
0.3
4
V
V
I(video)(p-p)
video input amplitude (peak-to-peak
value)
0.7
1.0
1.4
V
V
I(data)
teletext data amplitude
0.29
0.46
0.71
V
Z
source
source impedance
-
-
250
V
SW(I)
input switching level of sync
separator
1.6
1.9
2.2
V
C
i
input capacitance
-
-
10
pF
1997 May 16
10
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
I
R
EF
R
IREF
resistor to V
SSA
-
10
-
k
V
IREF
voltage on I
REF
pin
V
DD
= 5 V
-
2.3
-
V
R
ESET
V
IL
LOW-level input voltage
-
0.3
-
+0.8
V
V
IH
HIGH-level input voltage
2.0
-
V
DD
+ 0.5
V
I
LI
input leakage current
V
I
= 0 to V
DD
-
10
-
+10
A
LFB (HSYNC)
V
IL
LOW-level input voltage
-
0.3
-
+0.6
V
V
IH
HIGH-level input voltage
2.4
-
V
DD
+ 0.5
V
V
hys
input hysteresis voltage
-
0.7
-
V
I
LI
input leakage current
V
I
= 0 to V
DD
-
10
-
+10
mA
I
I(max)
maximum input current
note 1
-
1
-
+1
A
t
W(LFB)
LFB input pulse width
200
-
-
ns
t
i(r)
input rise time
-
-
100
ns
t
i(f)
input fall time
-
-
100
ns
FFB (VSYNC)
V
IL
LOW-level input voltage
-
0.3
0.3V
DD
-
V
V
IH
HIGH-level input voltage
0.7V
DD
V
DD
+ 0.5
-
V
I
LI
input leakage current
V
I
= 0 to V
DD
-
10
+10
-
A
I
I(max)
maximum input current
-
1
+1
-
mA
t
W(FFB)
FFB input pulse width
1
-
-
display
lines
t
i(r)
input rise time
-
-
500
ns
t
i(f)
input fall time
-
-
500
ns
Input/outputs
REF+
C
REF+
decoupling capacitor to V
SSA
-
100
-
nF
V
REF+
DC voltage on REF+
2.3
2.5
2.7
V
OSCIN
AND
OSCOUT
V
osc(p-p)
oscillation amplitude
(peak-to-peak value)
-
V
DD
-
V
C
i
input capacitance
-
-
10
pF
f
osc
oscillator frequency
-
6.0
-
MHz
f
osc
oscillator frequency tolerance
-
500
-
ppm
BLACK
C
BLACK
storage capacitor to V
SSA
-
100
-
nF
V
BLACK
black level for nominal sync
amplitude
1.75
2.0
2.25
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1997 May 16
11
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
I
LI
input leakage current
V
I
= 0 to V
DD
-
10
-
+10
A
STN
C
STN
decoupling capacitor to V
SSA
-
100
-
nF
V
STN
DC voltage on STN
0.95
1.1
1.25
V
SCL (
OPEN
-
DRAIN
)
f
SCL
SCL clock frequency
0
-
400
kHz
V
IL
LOW-level input voltage
-
0.5
-
+1.5
V
V
IH
HIGH-level input voltage
3.0
-
V
DD
+ 0.5
V
V
OL
LOW-level output voltage
I
OL
= 3 mA
0
-
0.4
V
I
OL
= 6 mA
0
-
0.6
V
I
LI
input leakage current
V
I
= 0 to V
DD
-
10
-
+10
A
C
i
input capacitance
-
-
10
pF
C
L
load capacitance
-
-
400
pF
t
i(r)
input rise time
f
SCL
= 100 kHz;
note 2
50
-
1000
ns
f
SCL
= 400 kHz;
note 2
50
-
300
ns
t
i(f)
input fall time
f
SCL
= 100 kHz;
note 3
50
-
300
ns
f
SCL
= 400 kHz;
note 3
50
-
300
ns
t
o(f)
output fall time
3 to 1.5 V;
I
OL
= 3 mA
50
-
250
ns
SDA (
OPEN
-
DRAIN
)
V
IL
LOW-level input voltage
-
0.5
-
+1.5
V
V
IH
HIGH-level input voltage
3.0
-
V
DD
+ 0.5
V
V
OL
LOW-level output voltage
I
OL
= 3 mA
0
-
0.4
V
I
OL
= 6 mA
0
-
0.6
V
I
LI
input leakage current
V
I
= 0 to V
DD
-
10
-
+10
A
C
i
input capacitance
-
-
10
pF
C
L
load capacitance
-
-
400
pF
t
i(r)
input rise time
f
SCL
= 100 kHz;
note 2
50
-
1000
ns
f
SCL
= 400 kHz;
note 2
50
-
300
ns
t
i(f)
input fall time
f
SCL
= 100 kHz;
note 3
50
-
300
ns
f
SCL
= 400 kHz;
note 3
50
-
300
ns
t
o(f)
output fall time
3 to 1.5 V;
I
OL
= 3 mA
50
-
250
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1997 May 16
12
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
DCL
AND
DDA (
INTERNAL PULL
-
DOWN RESISTOR
)
V
IL
LOW-level input voltage
-
0.3
-
+0.8
V
V
IH
HIGH-level input voltage
2.0
-
V
DD
+ 0.5
V
V
OL
LOW-level output voltage
I
OL
= 1.6 mA
0
-
0.4
V
I
LI
input leakage current
V
I
= 0 to V
DD
-
10
-
+10
A
C
i
input capacitance
-
-
10
pF
C
L
load capacitance
-
-
50
pF
t
o(f)
output fall time
2.2 to 0.6 V;
I
OL
= 1.6 mA
-
-
10
ns
RD7
TO
RD0
V
IL
LOW-level input voltage
-
0.3
-
+0.8
V
V
IH
HIGH-level input voltage
2.0
-
V
DD
+ 0.5
V
V
OL
LOW-level output voltage
I
OL
= 1.6 mA
0
-
0.4
V
V
OH
HIGH-level output voltage
I
OH
=
-
0.2 mA
2.4
-
V
DD
V
I
LI
input leakage current
V
I
= 0 to V
DD
-
10
-
+10
A
C
i
input capacitance
-
-
10
pF
C
L
load capacitance
-
-
30
pF
t
o(r)
output rise time into C
L
0.6 to 2.2 V
-
-
10
ns
t
o(f)
output fall time into C
L
2.2 to 0.6 V
-
-
10
ns
Outputs
CAS
V
OL
LOW-level output voltage
I
OL
= 1.6 mA
0
-
0.4
V
V
OH
HIGH-level output voltage
I
OH
=
-
0.2 mA
2.4
-
V
DD
V
C
L
load capacitance
-
-
50
pF
t
o(r)
output rise time into C
L
0.6 to 2.2 V
-
-
5
ns
t
o(f)
output fall time into C
L
2.2 to 0.6 V
-
-
5
ns
RAS, WE, ROMCS, RA10
TO
RA0
V
OL
LOW-level output voltage
I
OL
= 1.6 mA
0
-
0.4
V
V
OH
HIGH-level output voltage
I
OH
=
-
0.2 mA
2.4
-
V
DD
V
C
L
load capacitance
-
-
50
pF
t
o(r)
output rise time into C
L
0.6 to 2.2 V
-
-
10
ns
t
o(f)
output fall time into C
L
2.2 to 0.6 V
-
-
10
ns
ODD/EVEN (FRAME)
V
OL
LOW-level output voltage
I
OL
= 1.6 mA
0
-
0.4
V
V
OH
HIGH-level output voltage
I
OH
=
-
0.2 mA
2.4
-
V
DD
V
C
L
load capacitance
-
-
200
pF
t
o(r)
output rise time into C
L
0.6 to 2.2 V
-
-
200
ns
t
o(f)
output fall time into C
L
2.2 to 0.6 V
-
-
200
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1997 May 16
13
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
Notes
1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs.
An external series resistor must be used to limit the input currents to 1 mA.
2. Measured from V
IL(max)
to V
IH(min)
.
3. Measured from V
IH(min)
to V
IL(max)
.
STTV
V
STTV
VCS, TCS amplitude
0.2
0.3
0.4
V
V
STTV(DC)
nominal DC voltage
1.85
2.0
2.15
V
I
O(drive)
output drive
-
-
3
mA
R, G
AND
B
I
OL
LOW-level output current (black
level)
-
10
-
+10
A
I
OH
HIGH-level output current
(full intensity)
V
DDX
= 5 V
5.1
6.0
6.9
mA
R
L
load resistance to V
SSO
for nominal
1 V
(p-p)
output
-
160
-
C
L
load capacitance
-
-
20
pF
t
o(r)
output rise time
10% to 90%
-
-
15
ns
t
o(f)
output fall time
90% to 10%
-
-
15
ns
BLAN (VDS)
V
OH
HIGH-level output voltage
I
OH
=
-
2 mA
V
DD
-
0.25
-
V
DD
V
V
OL
LOW-level output voltage
I
OL
= 2 mA
0
-
0.2
V
C
L
load capacitance
-
-
50
pF
t
o(r)
output rise time
10% to 90%
-
-
15
ns
t
o(f)
output fall time
90% to 10%
-
-
15
ns
t
SK
skew delay between outputs R,G,B
and BLAN
-
-
15
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1997 May 16
14
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
Table 4
I
2
C-bus Timing (see note 1 and Fig.3)
Note
1. The I
2
C-bus interface pins SDA and SCL may pull the data and clock lines below 3 V while the power supply V
DD
is
in the range 0.4 to 0.8 V. Outside this range, the SDA and SCL pins behave correctly.
SYMBOL
PARAMETER
100 kHz
400 kHz
UNIT
MIN.
MAX.
MIN.
MAX.
f
SCL
SCL clock frequency
0
100
0
400
kHz
t
LOW
LOW period of the SCL clock
4.7
-
1.3
-
s
t
HIGH
HIGH period of the SCL clock
4.0
-
0.6
-
s
t
SU;DAT
data set-up time
250
-
100
-
s
t
HD;DAT
date hold time
0
-
0
-
s
t
SU;STO
set-up time clock HIGH to STOP
4.7
-
0.6
-
s
t
BUF
set-up time STOP to START
4.7
-
1.3
-
s
t
HD;STA
START hold time
4.0
-
0.6
-
s
t
SU;STA
set-up time clock rising edge to START
4.7
-
0.6
-
s
t
r
rise time of both SDA and SCL signals
-
1000
-
300
ns
t
f
fall time of both SDA and SCL signals
-
300
-
300
ns
Fig.3 Primary I
2
C-bus timing.
handbook, full pagewidth
MGG541
tHIGH
tLOW
tr
tf
tSU;STA
tHD;STA
tSU;DAT
tHD;DAT
tSU;STO
tBUF
SCL
SDA
1997 May 16
15
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
DRAM Interface timing (see note 1 and Fig.4)
Note
1. Based on a display clock frequency of 24 MHz, maximum 24 MHz + 500 ppm.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
T
cy(RAS)
RAS cycle time
-
375
-
ns
t
pch(RAS)
RAS precharge time
60
-
-
ns
t
h(CAS)
CAS hold time
80
-
-
ns
t
d(RAS-CAS)
RAS to CAS delay time
20
-
-
ns
t
WL(CAS)
CAS pulse width LOW
20
-
-
ns
T
cy(CAS)
CAS page mode cycle time
50
-
-
ns
t
pch(CAS)
CAS precharge time
10
-
-
ns
t
h(CAS-RAS)
RAS hold time after CAS
20
-
-
ns
t
pch(CAS-RAS)
CAS to RAS precharge time
10
-
-
ns
t
su(RA)
row address set-up time
0
-
-
ns
t
h(RA)
row address hold time
10
-
-
ns
t
su(CA)
column address set-up time
0
-
-
ns
t
h(CA)
column address hold time
15
-
-
ns
t
su(R)
read command set-up time
0
-
-
ns
t
h(R)(CAS)
read command hold time from (CAS)
0
-
-
ns
t
h(R)(RAS)
read command hold time from (RAS)
10
-
-
ns
t
su(W)
write command set-up time
0
-
-
ns
t
h(W)
write command hold time
15
-
-
ns
t
su(i)(D)
data input set-up time
0
-
-
ns
t
h(i)(D)
data input hold time
15
-
-
ns
t
ACC(R)(CAS)
read access time from (CAS)
-
-
20
ns
t
ACC(R)(RAS)
read access time from (RAS)
-
-
80
ns
1997 May 16
16
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
Fig.4 DRAM interface timing.
handbook, full pagewidth
MGG542
tRP
tRSH
tCSH
tPC
tCAS
tCAH
tCP
tRRH
tRCH
tRCS
READ
CYCLE
WRITE
CYCLE
RD IN
RD OUT
RAS
CAS
ADDRESS
WE
tCYC
tRCD
tASR
tRAH
tASC
tCAC
tRAC
tWCS
tWCH
tDS
tDH
WE
1997 May 16
17
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
APPLICATION INFORMATION
Fig.5 Application Diagram.
D7 to D4
D3 to D0
handbook, full pagewidth
MGG540
OSCIN
OSCOUT
10 k
100 k
75
100 nF
100 nF
100 nF
100 nF
100 nF
100 nF
100 nF
100 nF
22 pF
22 pF
6 MHz
VSS3
VSSA
IREF
CVBS
STN
REF
+
BLACK
VDDA
9
4
10
6
7
8
5
2
1
64
CVBS
front
end
LFB
HSYNC
VSYNC
RGB ground
FFB
R/G/B/BLAN
R/G/B/BLAN
VSSO
ODD/EVEN
ODD/EVEN
25
20
21 to 24
18
17
TV
display
SDA
SCL
61
62
I
2
C-bus to
microcontroller
RESET
RESET
VSS
VSS
VSS
14
59
16
26
27
35
33
19
VDDD1
VSS1
VDDX
+5 V
+
5 V
0 V
+
5 V
DCL
DDA
63
60
VDDD2
VSS2
WE
CAS
RAS
RD3 to RD0
RA0 to RA10
VDD
VSS
WE
CAS
RAS
D3 to D0
A10 to A0
48
49
44
53
42
52, 51, 47, 46
28 to 32,
36 to 38,
40,41,54
DRAM
OE
0 V
74LS573
DI
RD7
to
RD4
55 to 58
OE
OE
CE
EN
VDD
VSS
+
5 V
+
5 V
+
5 V
ROM
0 V
0 V
0 V
0 V
SAA5700
crystal
oscillator
ROMCS
DO
A18 to A0
1997 May 16
18
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
PACKAGE OUTLINE
UNIT
A
1
A
2
A
3
b
p
c
E
(1)
e
H
E
L
L
p
Q
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
0.25
0.05
2.90
2.65
0.25
0.50
0.35
0.25
0.14
14.1
13.9
1
18.2
17.6
1.4
1.2
1.2
0.8
7
0
o
o
0.2
0.1
0.2
1.95
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
1.0
0.6
SOT319-2
92-11-17
95-02-04
D
(1)
(1)
(1)
20.1
19.9
H
D
24.2
23.6
E
Z
1.2
0.8
D
e
E
A
1
A
L
p
Q
detail X
L
(A )
3
B
19
y
c
E
H
A
2
D
Z D
A
Z E
e
v
M
A
1
64
52
51
33
32
20
X
pin 1 index
b
p
D
H
b
p
v
M
B
w
M
w
M
0
5
10 mm
scale
QFP64: plastic quad flat package; 64 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm
SOT319-2
A
max.
3.20
1997 May 16
19
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
"IC Package Databook" (order code 9398 652 90011).
Reflow soldering
Reflow soldering techniques are suitable for all QFP
packages.
The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our
"Quality
Reference Handbook" (order code 9397 750 00192).
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250
C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45
C.
Wave soldering
Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
If wave soldering cannot be avoided, the following
conditions must be observed:
A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
The footprint must be at an angle of 45
to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
QFP100 (SOT382-1) or QFP160 (SOT322-1).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260
C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150
C within
6 seconds. Typical dwell time is 4 seconds at 250
C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300
C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320
C.
1997 May 16
20
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I
2
C COMPONENTS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Purchase of Philips I
2
C components conveys a license under the Philips' I
2
C patent to use the
components in the I
2
C system provided the system conforms to the I
2
C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1997 May 16
21
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
NOTES
1997 May 16
22
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
NOTES
1997 May 16
23
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
NOTES
Internet: http://www.semiconductors.philips.com
Philips Semiconductors a worldwide company
Philips Electronics N.V. 1997
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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Printed in The Netherlands
547047/50/01/pp24
Date of release: 1997 May 16
Document order number:
9397 750 01008