1997 Sep 01
2
Philips Semiconductors
Product specification
RDS/RBDS pre-processor
SAA6588
FEATURES
Integrated switched capacitor filters
Demodulation of the European Radio Data System
(RDS) or the USA Radio Broadcast Data System
(RBDS) signal
RDS and RBDS block detection
Error detection and correction
Fast block synchronization
Synchronization control (flywheel)
Mode control for RDS/RBDS processing
Different RDS/RBDS block information output modes
(e.g. A-block output mode)
Fast I
2
C-bus interface
Multi-path detector
Signal quality detector with sensitivity adjustment
Pause detector with pause level and time adjustment
Alternatively oscillator frequency: n
4.332 MHz
(n = 1 to 4)
UART compatible with 17.328 MHz (n = 4)
CMOS device
Single supply voltage
Extended temperature range (
-
40 to +85
C).
GENERAL DESCRIPTION
Today most FM radio stations in Europe and meanwhile
also many FM/AM radio broadcasting stations in the USA
transmit the inaudible European RDS (Radio Data
System) or the USA RBDS (Radio Broadcast Data
System) informations respectively. Likewise nowadays
receivers, most car radios and also some home and
portable radios on the market include at least some of the
RDS features.
The RDS/RBDS system offers a large range of
applications by its many functions to be implemented. For
car radios the most important are:
Program Service (PS) name
Traffic Program (TP) identification
Traffic Announcement (TA) signal
Alternative Frequency (AF) list
Program Identification (PI)
Enhanced Other Networks (EON) information.
The RDS/RBDS pre-processor is a CMOS device that
integrates all RDS/RBDS relevant functions in one chip.
The IC contains filtering and demodulation of the
RDS/RBDS signal, symbol decoding, block
synchronization, error detection, error correction and
additional detectors for multi-path, signal quality and audio
signal pauses. The pre-processed RDS/RBDS information
is available via the I
2
C-bus.
The RDS/RBDS pre-processor replaces a number of ICs
and peripheral components used nowadays in car radio
concepts with RDS or RBDS features. The integration of
the relevant RDS/RBDS data processing functions
provides, in an economic manner, high performance of
RDS/RBDS processing and reduces the real-time
requirements for the main radio microcontroller
considerably. In addition it simplifies the development of
the RDS specific software for the main controller of the
radio set.
Compared with standard radio systems, RDS/RBDS
controlled radio systems additionally require an
RDS/RBDS demodulator with a 57 kHz band-pass filter,
information about the current reception situation (reception
quality, multi-path disturbance etc.), and additional
microcontroller power for RDS/RBDS data processing,
decoding and radio control.
The new RDS/RBDS pre-processor includes all these
specific functions and meets all requirements of a high end
RDS/RBDS radio. Moreover the timing requirements of the
set controller, regarding RDS/RBDS data processing are
reduced due to the integration of decoder functions, so
that the development of radio control software can be
concentrated specifically on radio set features.
1997 Sep 01
5
Philips Semiconductors
Product specification
RDS/RBDS pre-processor
SAA6588
PINNING
SYMBOL
PIN
DESCRIPTION
MRO
1
multi-path rectifier output
MPTH
2
multi-path detector output
TCON
3
test control input pin
OSCO
4
oscillator output
OSCI
5
oscillator input
V
SSD
6
digital ground (0 V)
V
DDD
7
digital supply voltage (5 V)
DAVN
8
data available output (active LOW)
SDA
9
I
2
C-bus serial data I/O
SCL
10
I
2
C-bus serial clock input
PSWN
11
pause switch output (active LOW)
MAD
12
slave address (LSB) input
AFIN
13
audio signal input
V
DDA
14
analog supply voltage (5 V)
V
SSA
15
analog ground (0 V)
MPX
16
multiplex input signal
V
ref
17
reference voltage output
SCOUT
18
band-pass filter output
CIN
19
comparator input
LVIN
20
level input
SYMBOL
PIN
DESCRIPTION
Fig.2 Pin configuration (DIP20).
handbook, halfpage
MRO
MPTH
TCON
OSCO
OSCI
VSSD
VDDD
SDA
SCL
LVIN
CIN
SCOUT
Vref
VSSA
VDDA
MPX
AFIN
MAD
1
2
3
4
5
6
7
8
9
10
11
12
20
19
18
17
16
15
14
13
SAA6588
MGK533
DAVN
PSWN
Fig.3 Pin configuration (SO20).
handbook, halfpage
MRO
MPTH
TCON
OSCO
OSCI
VSSD
VDDD
SDA
SCL
LVIN
CIN
SCOUT
Vref
VSSA
VDDA
MPX
AFIN
MAD
1
2
3
4
5
6
7
8
9
10
11
12
20
19
18
17
16
15
14
13
MGK534
DAVN
PSWN
SAA6588T
PDF 
ZIP
