1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

FEATURES

Operates from an 8 V DC supply

Black level clamping of the colour difference, luminance
and RGB input signals with coupling-capacitor DC level
storage

Two analog RGB inputs, selected either by fast switch
signals or via I

C-bus; brightness and contrast control of

both RGB inputs

Saturation, contrast, brightness and white adjustment
via I

C-bus

Same RGB output black levels for Y/CD and RGB input
signals

Timing pulse generation from either a 2 or 3-level
sandcastle pulse for clamping, vertical synchronization
and cut-off timing pulses

Automatic cut-off control or clamped output selectable
via I

C-bus

Automatic cut-off control with picture tube leakage
current compensation

Cut-off measurement pulses after end of the vertical
blanking pulse or end of an extra vertical flyback pulse

Ultra-black or nominal black blanking selectable via
I

C-bus in clamped output mode

Two switch-on delays to prevent discolouration before
steady-state operation

Average beam current and peak drive limiting

PAL/SECAM or NTSC (Japan) matrix selection via
I

C-bus

Emitter-follower RGB output stages to drive the video
output stages

C-bus controlled DC output e.g. for hue-adjust of

NTSC (multistandard) decoders

Positive amplification factor of cut-off control voltage.

GENERAL DESCRIPTION

The TDA4688 is a monolithic integrated circuit with a
luminance and a colour difference interface for video
processing in TV receivers. Its primary function is to
process the luminance and colour difference signals from
a colour decoder which is equipped e.g. with the
multistandard decoder TDA4655 or TDA9160 plus delay
line TDA4661 and the Picture Signal Improvement (PSI)
IC, TDA467X, or from a feature module.

The required input signals are:

Luminance and negative colour difference signals

2 or 3-level sandcastle pulse for internal timing pulse
generation

C-bus data and clock signals for microcontroller

control.

Two sets of analog RGB colour signals can also be
inserted, e.g. one from a peritelevision connector and the
other from an on-screen display generator. The TDA4688
includes full I

C-bus control of all parameters and

functions with automatic cut-off control of the picture tube
cathode currents. It provides RGB output signals for the
video output stages.

The TDA4688 is a simplified, pin compatible (except for
pin 18) version of the TDA4681. The module address via
I

C-bus can be used for both ICs; where a function is not

included in the TDA4688 the I

C-bus command is not

executed. The differences with the TDA4681 are:

No automatic white level control; the white levels are
determined directly by the I

C-bus data

RGB reference levels for automatic cut-off control are
not adjustable via I

C-bus

Clamping delay is fixed

Only contrast and brightness adjust for the RGB input
signals

The measurement lines are triggered either by the
trailing edge of the vertical component of the sandcastle
pulse or by the trailing edge of an optional external
vertical flyback pulse (on pin 18), according to which
occurs first.

The difference compared to TDA4687 is the japanese type
NTSC matrix.

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

BLOCK DIAGRAM

handbook, full pagewidth

TDA4688

PAL/SECAM,

NTSC

MATRIX

FAST SIGNAL

SOURCE SWITCH,

BLANKING 1

CONTRAST

ADJUST

BRIGHTNESS

ADJUST,

BLANKING 2,

MEASUREMENT

PULSES

WHITE

POINT

ADJUST

CUT-OFF

ADJUST,

OUTPUT

STAGES

SATURATION

ADJUST

4 x 6-BIT

D/A

CONVERTERS

3 x 6-BIT

D/A

CONVERTERS

PEAK DRIVE

AND

AVERAGE

BEAM CURRENT

LIMITING

2 x 8-BIT

CONTROL

REGISTERS

SANDCASTLE

PULSE

DETECTOR

TIMING

GENERATOR

H + V

(H)

sandcastle

pulse

6-BIT D/A

CONVERTER

1ST AND 2ND

SWITCH-ON

DELAYS

CUT-OFF

COMPARATORS

C-BUS

RECEIVER

SDA

SCL

VFB

hue control voltage

average

beam

current

timing

pulses

= 8 V

leakage

and cut-off

current input

A45 to A40, A55 to A50, A65 to A60

AA5 to AA0

A05 to A00, A15 to A10, A25 to A20, A35 to A30

BREN

SC5

BCOF

FSDIS2, FSON2,

FSDIS1, FSON1

NMEN

RGB

outputs

SUPPLY

cut-off storage

leakage

storage

peak drive

limiting

storage

cut-off

control

C-bus

C-bus data and

control signals

BCOF

FSW

MED760

Fig.1 Block diagram.

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

PINNING

SYMBOL PIN

DESCRIPTION

FSW

fast switch 2 input

red input 2

green input 2

blue input 2

supply voltage

colour difference input

luminance input

GND

ground

red input 1

green input 1

blue input 1

FSW

fast switch 1 input

sandcastle pulse input

BCL

average beam current limiting input

PDL

storage capacitor for peak drive
limiting

storage capacitor for leakage current

VFB

vertical flyback pulse input

cut-off measurement input

blue output

blue cut-off storage capacitor

green output

green cut-off storage capacitor

red output

red cut-off storage capacitor

HUE

hue control output

SDA

C-bus serial data input;

acknowledge output

SCL

C-bus serial clock input

handbook, halfpage

TDA4688

MED761

FSW2

GND

FSW1

SCL

SDA

HUE

VFB

CPDL

BCL

Fig.2 Pin configuration.

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

C-BUS PROTOCOL

Control

The I

C-bus transmitter provides the data bytes to select

and adjust the following functions and parameters:

Brightness adjust

Saturation adjust

Contrast adjust

DC output e.g. for hue control

RGB gain adjust

Peak drive limiting level adjust

Selects either 3-level or 2-level (5 V) sandcastle pulse

Enables cut-off control; enables output clamping
(2 different modes)

Selects either PAL/SECAM or NTSC matrix

Enables/disables synchronization of the execution of
I

C-bus commands with the vertical blanking interval

Enables Y/CD, RGB

or RGB

input.

C-bus transmitter and data transfer

C-

BUS SPECIFICATION

The I

C-bus is a bidirectional, two-wire, serial data bus for

intercommunication between ICs in an equipment.
The microcontroller transmits data to the I

C-bus receiver

in the TDA4688 over the serial data line SDA (pin 27)

synchronized by the serial clock line SCL (pin 28).
Both lines are normally connected to a positive voltage
supply through pull-up resistors. Data is transferred when
the SCL line is LOW. When SCL is HIGH the serial data
line SDA must be stable. A HIGH-to-LOW transition of the
SDA line when SCL is HIGH is defined as a START bit.
A LOW-to-HIGH transition of the SDA line when SCL is
HIGH is defined as a STOP bit.

Each transmission must start with a START bit and end
with a STOP bit. The bus is busy after a START bit and is
only free again after a STOP bit has been transmitted.

C-

BUS RECEIVER

(

MICROCONTROLLER WRITE MODE

)

Each transmission to the I

C-bus receiver consists of at

least three bytes following the START bit. Each byte is
acknowledged by an acknowledge bit immediately
following each byte. The first byte is the Module Address
(MAD) byte, also called slave address byte. This includes
the module address, 1000100 for the TDA4688.
The TDA4688 is a slave receiver (R/W = 0), therefore the
module address byte is 10001000 (88H; see also Fig.3).

The length of a data transmission is unrestricted, but the
module address and the correct subaddress must be
transmitted before the data byte(s). The order of data
transmission is shown in Figs 4 and 5.
Without auto-increment (BREN = 0 or 1) the module
address (MAD) byte is followed by a SubAddress (SAD)
byte and one data byte only (see Fig.4).

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

UTO

INCREMENT

The auto-increment format enables quick slave receiver
initialization by one transmission, when the I

C-bus control

bit BREN = 0 (see control register bits of Table 1).
If BREN = 1 auto-increment is not possible.

If the auto-increment format is selected, the MAD byte is
followed by a SAD byte and by the data bytes of
consecutive subaddresses (see Fig.5).

All subaddresses from 00H to 0FH are automatically
incremented, the subaddress counter wraps round from
0FH to 00H. Reserved subaddresses 07H, 08H, 09H,
0BH and 0FH are treated as legal but have no effect.
Subaddresses outside the range 00H and 0FH are not
acknowledged by the device.

Subaddresses are stored in the TDA4688 to address the
following parameters and functions (see Table 1):

Brightness adjust

Saturation adjust

Contrast adjust

Hue control voltage

RGB gain adjust

Peak drive limiting adjust

Control register functions.

The data bytes D7 to D0 (see Table 1) provide the data of
the parameters and functions for video processing.

ONTROL REGISTER

NMEN (NTSC Matrix Enable):

0 = PAL/SECAM matrix

1 = NTSC matrix.

BREN (Buffer Register Enable):

0 = new data is executed as soon as it is received

1 = data is stored in buffer registers and is transferred to
the data registers during the next vertical blanking
interval.

The I

C-bus receiver does not accept any new data until

this data is transferred into the data registers.

SC5 (SandCastle 5 V):

0 = 3-level sandcastle pulse

1 = 2-level (5 V) sandcastle pulse.

ONTROL REGISTER

FSON2 (Fast Switch 2 ON).

FSDIS2 (Fast Switch 2 Disable).

FSON1 (Fast Switch 1 ON).

FSDIS1 (Fast Switch 1 Disable).

The RGB input signals are selected by FSON2 and
FSON1 or FSW

and FSW

FSON2 has priority over FSON1

FSW

has priority over FSW

FSDIS1 and FSDIS2 disable FSW

and FSW

(see Table 2).

BCOF (Black level Control Off):

0 = automatic cut-off control enabled

1 = automatic cut-off control disabled; RGB outputs are
clamped to fixed DC levels.

ONTROL REGISTER

MOD2 (output clamp MODe2):

0 = inactive

1 = output clamping, but brightness inactive.

When MOD2 = 1 and BCOF = 1 output clamp is enabled
and brightness adjust is disabled (for clamping purposes
of following RGB receivers).

(BCOF = 0) AND (MOD2 = 1); from the description given
above the influence on the clamping stage is contradictory.
Consequently, there is no purpose to this combination and
it makes no sense to switch this combination.

When the supply voltage has dropped below
approximately 6.0 V (usually occurs when the TV receiver
is switched on or the supply voltage is interrupted) all data
and function bits are set to 01H.

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

Table 1

Subaddress (SAD) and data bytes; note 1

Note

1. X = don't care, but for software compatibility with other or future video ICs it is recommended to set all X to logic 0.

FUNCTION

SAD

(HEX)

MSB

LSB

Brightness

A05

A04

A03

A02

A01

A00

Saturation

A15

A14

A13

A12

A11

A10

Contrast

A25

A24

A23

A22

A21

A20

Hue control voltage

A35

A34

A33

A32

A31

A30

Red gain

A45

A44

A43

A42

A41

A40

Green gain

A55

A54

A53

A52

A51

A50

Blue gain

A65

A64

A63

A62

A61

A60

Reserved

Peak drive limit

AA5

AA4

AA3

AA2

AA1

AA0

Reserved

Control register 1

SC5

BREN

NMEN

Control register 2

BCOF

FSDIS2

FSON2

FSDIS1

FSON1

Control register 3

MOD2

Reserved

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

Table 2

Signal input selection by the fast source switches; notes 1 to 4

Notes

1. H: logic HIGH implies that the voltage >0.9 V.

2. L: logic LOW implies that the voltage <0.4 V.

3. X = don't care.

4. ON indicates the selected input signal.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

C-BUS CONTROL BITS

ANALOG SWITCH SIGNALS

INPUT SELECTED

FSON2 FSDIS2 FSON1 FSDIS1

FSW

(PIN 1)

FSW

(PIN 13)

RGB

Y/CD

SYMBOL

PARAMETER

MIN.

MAX.

UNIT

supply voltage (pin 5)

8.8

input voltage (pins 1 to 8, 10 to 13, 16, 21, 23 and 25)

0.1

input voltage (pins 15, 18 and 19)

0.7

+ 0.7

input voltage (pins 27 and 28)

0.1

+8.8

sandcastle pulse voltage

0.7

+ 5.8

average current (pins 20, 22 and 24)

peak current (pins 20, 22 and 24)

output current

+0.6

stg

storage temperature

+150

amb

operating ambient temperature

tot

total power dissipation

1.2

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

CHARACTERISTICS
All voltages are measured in test circuit of Fig.9 with respect to GND (pin 9); V

= 8.0 V; T

amb

= 25

C; nominal signal

amplitudes (black-to-white) at output pins 24, 22 and 20; nominal settings of brightness, contrast, saturation and white
level control; without beam current or peak drive limiting; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply (pin 5)

supply voltage

7.2

8.0

8.8

supply current

Colour difference inputs [

Y): pin 6;

Y): pin 7]

6(p-p)

Y) input (peak-to-peak value)

notes 1 and 2

1.33

7(p-p)

Y) input (peak-to-peak value)

notes 1 and 2

1.05

6,7

internal DC bias voltage

at black level clamping

4.1

6,7

input current

during line scan

0.1

at black level clamping

100

6,7

input resistance

Luminance/sync (VBS; Y: pin 8)

i(p-p)

luminance input voltage at pin 8
(peak-to-peak value)

note 2

0.45

8(bias)

internal DC bias voltage

at black level clamping

4.1

input current

during line scan

0.1

at black level clamping

100

input resistance

RGB input 1 (R

: pin 10; G

: pin 11; B

: pin 12)

i(p-p)

input voltage at pins 10, 11 and 12
(peak-to-peak value)

note 2

0.7

10/11/12(bias)

internal DC bias voltage

at black level clamping

5.7

10/11/12

input current

during line scan

0.1

at black level clamping

100

10/11/12

input resistance

RGB input 2 (R

: pin 2, G

: pin 3, B

: pin 4)

i(p-p)

input voltage at pins 2, 3 and 4
(peak-to-peak value)

note 2

0.7

2/3/4

internal DC bias voltage

at black level clamping

5.7

2/3/4

input current

during line scan

0.1

at black level clamping

100

2/3/4

input resistance

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

Fast signal switch FSW

(pin 13) to select Y, CD or R

, G

, B

inputs (control bits: see Table 2)

voltage to select Y and CD

0.4

voltage to select R

, G

, B

0.9

5.0

internal resistance to ground

4.0

difference between transit times for
signal switching and signal insertion

Fast signal switch FSW

(pin 1) to select Y, CD/R

, G

, B

or R

, G

, B

inputs (control bits: see Table 2)

voltage to select Y, CD/R

, G

, B

0.4

voltage to select R

, G

, B

0.9

5.0

internal resistance to ground

4.0

difference between transit times for
signal switching and signal insertion

Saturation adjust [acts on

Y) and

Y) signals under I

C-bus control; subaddress 01H (bit resolution

1.5% of maximum saturation); data byte 3FH for maximum saturation, data byte 23H for nominal saturation
and data byte 00H for minimum saturation]

saturation below maximum

at 23H

at 00H; f = 100 kHz

Contrast adjust [acts on internal RGB signals under I

C-bus control; subaddress 02H (bit resolution 1.5% of

maximum contrast); data byte 3FH for maximum contrast, data byte 22H for nominal contrast and data byte
00H for minimum contrast]

contrast below maximum

at 22H

at 00H

Brightness adjust [acts on internal RGB signals under I

C-bus control; subaddress 00H (bit resolution 1.5%

of maximum brightness); data byte 3FH for maximum brightness, data byte 26H for nominal brightness and
data byte 00H for minimum brightness]

black level shift of nominal signal
amplitude referred to cut-off
measurement level

at 3FH

at 00H

White potentiometers [under I

C-bus control; subaddresses 04H (red), 05H (green) and 06H (blue); data byte

3FH for maximum gain; data byte 19H for nominal gain and data byte 00H for minimum gain]; note 3

relative to nominal gain

increase of gain

at 3FH

decrease of gain

at 00H

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

RGB outputs (pins 24, 22 and 20; positive going output signals; peak drive limiter set = 3FH); note 4

o(b-w)

nominal output signals
(black-to-white value)

2.0

maximum output signals
(black-to-white value)

3.0

spread between RGB output signals

minimum output voltages

0.8

maximum output voltages

6.8

24,22,20

voltage of cut-off measurement line
equivalent to voltage during
ultra-black

output clamping;
BCOF = 1

2.3

2.5

2.7

int

internal current sources

5.0

output resistance

Frequency response

res

frequency response of Y path
(from pin 8 to pins 24, 22 and 20)

f = 10 MHz

frequency response of CD path
(from pins 7 to 24 and 6 to 20)

f = 8 MHz

frequency response of RGB

path

(from pins 10 to 24, 11 to 22 and
12 to 20)

f = 10 MHz

frequency response of RGB

path

(from pins 2 to 24, 3 to 22 and
4 to 20)

f = 10 MHz

Sandcastle pulse detector (pin 14)

ONTROL BIT

SC5 = 0; 3-

LEVEL

; notes 5 and 6

sandcastle pulse voltage

for horizontal and vertical blanking
pulses

2.0

2.5

3.0

for horizontal pulses (line count)

4.0

4.5

5.0

for burst key pulses (clamping)

7.6

+ 5.8 V

ONTROL BIT

SC5 = 1; 2-

LEVEL

; notes 5 and 6

sandcastle pulse voltage

for horizontal and vertical blanking
pulses

2.0

2.5

3.0

for burst key pulses

4.0

4.5

+ 5.8 V

ENERAL

output current

= 0 V

100

leading edge delay of the clamping
pulse

1.5

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

Vertical flyback (pin 18); note 6

vertical flyback pulse

for LOW

2.5

for HIGH

4.5

internal voltage

pin 18 open-circuit;
note 7

5.0

input current

Average beam current limiting (pin 15); note 8

c(15)

contrast reduction starting voltage

4.0

c(15)

voltage difference for full contrast
reduction

2.0

br(15)

brightness reduction starting voltage

2.5

br(15)

voltage difference for full brightness
reduction

1.6

Peak drive limiting voltage [pin 16; internal peak drive limiting level (V

pdl

) acts on RGB outputs under I

C-bus

control; subaddress 0AH]; note 9

20,22,24

minimum RGB output voltages

at 00H

3.0

maximum RGB output voltages

at 3FH

7.0

charge current

discharge current

during peak white

internal voltage limitation

4.5

c(16)

contrast reduction starting voltage

4.0

c(16)

voltage difference for full contrast
reduction

2.0

br(16)

brightness reduction starting voltage

2.5

br(16)

voltage difference for full brightness
reduction

1.6

Automatic cut-off control (pin 19); notes 6 and 10 to 12; see Fig.7

external voltage

1.4 V

output current

input current

150

additional input current

switch-on delay 1

0.5

24,22,20

monitor pulse amplitude (under
I

C-bus control; subaddress 0AH)

switch-on delay 1;
note 11

pdl

1.0

19(th)

voltage threshold for picture tube
cathode warming up

switch-on delay 1

4.5

ref

internally controlled voltage

during leakage
measurement period

2.7

difference between V

MEAS

(cut-off

measurement voltage) and V

ref

1.0

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

Cut-off storage (pins 25, 23 and 21)

21,23,25

charge and discharge currents

during cut-off
measurement lines

0.3

input currents of storage inputs

outside measurement
time

0.1

Storage of leakage information (pin 17)

charge and discharge currents

during leakage
measurement period

0.4

leakage current

outside measurement
time

0.1

threshold voltage for reset to
switch-on state

2.5

Hue control (under I

C-bus control; subaddress 03H; data byte 3FH for maximum voltage; data byte 20H for

nominal voltage and data byte 00H for minimum voltage); note 13

output voltage

at 3FH

4.8

at 20H

3.0

at 00H

1.2

int

current of the internal current source
at pin 26

500

C-bus receiver clock SCL (pin 28)

SCL

input frequency range

100

kHz

LOW-level input voltage

1.5

HIGH-level input voltage

3.0

6.0

LOW-level input current

HIGH-level input current

clock pulse LOW

4.7

clock pulse HIGH

4.0

rise time

1.0

fall time

0.3

C-bus receiver data input/output SDA (pin 27)

LOW-level input voltage

1.5

HIGH-level input voltage

3.0

6.0

LOW-level input current

HIGH-level input current

LOW-level output current

3.0

rise time

1.0

fall time

0.3

SU;DAT

data set-up time

0.25

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

Notes to the characteristics

1. The values of the

Y) and

Y) colour difference input signals are for a 75% colour-bar signal.

2. The pins are capacitively coupled to a low ohmic source, with a recommended maximum output impedance of 600

3. The white potentiometers affect the amplitudes of the RGB output signals.

4. The RGB outputs at pins 24, 22 and 20 are emitter followers with current sources.

5. Sandcastle pulses are compared with internal threshold voltages independent of V

. The threshold voltages

separate the components of the sandcastle pulse. The particular component is generated when the voltage on pin 14
exceeds the defined internal threshold voltage.
The internal threshold voltages (control bit SC5 = 0) are:

1.5 V for horizontal and vertical blanking pulses

3.5 V for horizontal pulses

6.5 V for the burst key pulse.

The internal threshold voltages (control bit SC5 = 1) are:

1.5 V for horizontal and vertical blanking pulses

3.5 V for the burst key pulse.

6. Vertical signal blanking is determined by the vertical component of the sandcastle pulse. The leakage and the RGB

cut-off measurement lines are positioned in the first four complete lines after the end of the vertical component.
In this case, the RGB output signals are blanked until the end of the last measurement line; see Fig.7a. If an extra
vertical flyback pulse VFB is applied to pin 18, the four measurement lines start in the first complete line after the end
of the VFB pulse; see Fig.7b. In this case, the output signals are blanked either until the end of the last measurement
line or until the end of the vertical component of the sandcastle pulse, according to which occurs last.

7. If no VFB pulse is applied, pin 18 can be left open-circuit or connected to V

. If pin 18 is always LOW neither

automatic cut-off control nor output clamping can happen.

8. Average beam current limiting reduces the contrast, at minimum contrast it reduces the brightness.

9. Peak drive limiting reduces the RGB outputs by reducing the contrast, at minimum contrast it reduces the brightness.

The maximum RGB outputs are determined via the I

C-bus under subaddress 0AH. When an RGB output exceeds

the maximum voltage, peak drive limiting is delayed by one horizontal line.

10. During leakage current measurement, the RGB channels are blanked to ultra-black level. During cut-off

measurement one channel is set to the measurement pulse level, the other channels are blanked to ultra-black.
Since the brightness adjust shifts the colour signal relative to the black level, the brightness adjust is disabled during
the vertical blanking interval (see Figs 6 and 7).

11. During picture cathode warming up (first switch-on delay) the RGB outputs (pins 24, 22 and 20) are blanked to the

ultra-black level during line scan. During the vertical blanking interval a white-level monitor pulse is fed out on the
RGB outputs and the cathode currents are measured. When the voltage threshold on pin 19 is greater than 4.5 V,
the monitor pulse is switched off and cut-off control is activated (second switch-on delay). As soon as cut-off control
stabilizes, RGB output blanking is removed.

12. Range of cut-off measurement level at the RGB outputs is 1 to 5 V. The recommended value is 3 V.

13. The hue control output at pin 26 is an emitter follower with current source.

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

Table 3

Demodulator axes and amplification factors

Table 4

PAL/SECAM and NTSC matrix; note 1

Note

1. PAL/SECAM signals are matrixed by the equation: V

0.51V

0.19V

NTSC signals are matrixed by the equations (hue phase shift of

2 degrees):

= 1.39V

0.07V

; V

0.46V

0.15V

; V

= V

In the matrix equations: V

and V

are conventional PAL demodulation axes and amplitudes at the output of

the NTSC demodulator. V

, V

and V

are the NTSC modified colour difference signals; this is equivalent

to the demodulator axes and amplification factors shown in Table 3.

PARAMETER

NTSC

PAL

Y)* demodulator axis

240

236

Y)* amplification factor

1.59

1.14

Y)* amplification factor

2.03

Y)* amplification factor

0.606

0.698

MATRIX

NMEN

PAL/SECAM

NTSC

Fig.6 Cut-off measurement pulse.

(1) Maximum brightness.

(2) Nominal brightness.

handbook, full pagewidth

MHA697

cut-off measurement line

for red signal

ultra-black

(1)

(2)

1997 Jun 23

Philips Semiconductors

Product specification

Video processor with automatic cut-off control

TDA4688

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

Soldering by dipping or by wave

The maximum permissible temperature of the solder is
260

C; solder at this temperature must not be in contact

with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T

stg max

). If the

printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

Repairing soldered joints

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300

C it may remain in

contact for up to 10 seconds. If the bit temperature is
between 300 and 400

C, contact may be up to 5 seconds.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

C COMPONENTS

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Purchase of Philips I

C components conveys a license under the Philips' I

C patent to use the

components in the I

C system provided the system conforms to the I

C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

Internet: http://www.semiconductors.philips.com

Philips Semiconductors a worldwide company

SCA54

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

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Printed in The Netherlands

547047/25/03/pp24

Date of release: 1997 Jun 23

Document order number:

9397 750 02045

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA4688

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA4688

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA4688