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July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

FEATURES

Two input stages, R, G, B and Y,

Y),

Y) with

multiplexing.

Chrominance processing, highly integrated, includes
vertical identification, low frequency pre-emphasis and
high frequency pre-emphasis (anti-Cloche) and
bandpass filter.

Fully controlled FM modulator which produces a signal
in accordance with the SECAM standard without
adjustments.

Two reference oscillators, one for D'R f

(4.40625 MHz)

and one for D'B f

(4.250 MHz). These oscillators are

tuned by PLL loop with the frequency of the line sync as
reference. Crystal tuning, or tuning by external
reference source, of the reference oscillators is
possible.

Output stages, CVBS and separated Y + SYNC and
CHROMA. For CVBS output, signal amplitude 2 V (p

nominal, thus only an external emitter follower is
required for 75

driving.

Sync separator circuit and pulse shaper, to generate the
required pulses for the processing, line, frame, FH/2 and
chrominance blanking.

A 3-level sandcastle pulse is generated for PAL/NTSC
to SECAM transcoding.

FH/2 input for locking with another decoder.

Colour killing on the internal colour difference signals.

Internal bandgap reference.

GENERAL DESCRIPTION

The TDA8505 is a highly integrated SECAM encoding IC
that is designed for use in all applications that require
transformation of R, G and B signals or Y, U and V signals
to a standard SECAM signal.

The specification of the input signals is fully compatible
with those of the TDA8501 PAL/NTSC encoder.

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

PINS

PIN POSITION

MATERIAL

CODE

TDA8505

SDIP32

plastic

SOT232-1

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

BLOCK DIAGRAM

handbook, full pagewidth

MLA951 - 3

PULSE

GENERATOR

PHASE

DETECTOR

272

DIVIDER

4.25 MHz

VCO

SYNC

SEPARATOR

SWITCH

PHASE

DETECTOR

282

DIVIDER

4.406 MHz

VCO

FRAME

IDENTI-

FICATION

CLAMP

ADDER

GAIN

LIMITER

MODULATOR

PHASE

SWITCH

LOW-PASS

FILTER

LF PRE-

EMPHASIS

CHROMINANCE

BLANKING

RED

input

CL/BL

GREEN

input

CL/BL

BLUE

input

CL/BL

MATRIX

SWITCH

SEQUENCE

CL/BL

(R Y)

(B Y)

colour difference

inputs

luminance

input

multiplexer

control input

TEST

ref

FADJ

reference

voltage

output

FLT output

FILTER

CLOCHE BANDPASS

ADDER

chrominance

output

CVBS 2 V (p p)

output

220

BUFFER

2 k

notch

output

Y+SYNC

1 V (p p)

DELAY

LINE

650

PHASE

DETECTOR

LPFDB output

PHASE

DETECTOR

LPFDR output

ADDER

VCO4.25

output

control input

(Y/Y SYNC)

sandcastle

output

FH/2 input

colour killing

input

22 nF

composite

sync

input

SSD

DDD

SSA

DDA

47 µF

100 nF

XTAL/PLL

VIDENT

input

LPF4.25

output

LPF 4.4

output

TDA8505

270 pF

Y+SYNC output

2 V (p-p)

Y+SYNC

input

external power

supply (V )

ext

2.2 k

4.7

22 nF

1.2 k

4.7

100 nF

1 nF

3.9 k

6.8

100

470 nF

SANDCASTLE

4.7

1.8 k

22 nF

22 k

Fig.1 Block diagram.

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

PINNING

D'R and D'B are the colour difference signals at the output of the multiplexer circuit; D'R =

1.9(R

Y) and

D'B = +1.5(B

Y), for an EBU bar of 75% the amplitudes are equal.

SYMBOL

PIN

DESCRIPTION

colour difference input signal, for EBU bar of 75% 1.05 V (peak-to-peak value)

MCONTR

multiplexer control; input HIGH = RGB, input LOW =

Y),

Y) and Y

colour difference input signal, for EBU bar of 75% 1.33 V (peak-to-peak value)

FH/2

line pulse input divided-by-2 for synchronizing two or more encoders; when not used this
pin is connected to ground

luminance input signal 1 V nominal without sync

TEST

test pin; must be connected to V

(pin 8), or left open-circuit

RED input signal for EBU bar of 75% 0.7 V (peak-to-peak value)

DDA

analog supply voltage for encoder part; 5 V nominal

GREEN input signal for EBU bar of 75% 0.7 V (peak-to-peak value)

SSA

analog ground

BLUE input signal for EBU bar of 75% 0.7 V (peak-to-peak value)

Y/Y+SYNC

when this control input is LOW, Y without sync is connected to pin 5, input blanking at
pin 5 is active; when input is HIGH, Y+SYNC is connected to pin 5, input blanking at pin 5
is not active

LPFDR

modulator control loop filter output; black level of D'R = 4.40625 MHz

FADJ

adjustment pin for 4.286 MHz of HF pre-emphasis filter

LPFDB

modulator control loop filter output; black level of D'B = 4.250 MHz

FLT

filter tuning loop capacitor output

ref

2.5 V internal reference voltage output

CHROMA

chrominance output, amplitude corresponds with Y+SYNC at the output of the delay line

ext

external power supply for sandcastle generation; when not used this pin is connected to
ground

SAND

3-level sandcastle output pulse

CVBS

composite SECAM output 2 V (peak-to-peak value) nominal

NOTCH

Y+SYNC output after an internal resistor of 2 k

; a notch filter can be connected

Y+SYNC IN

Y+SYNC input, connected to the output of the delay line

LPF4.4

loop filter output for 4.40625 MHz reference oscillator

Y+SYNC OUT

Y+SYNC output, 2 V (peak-to-peak value) nominal, connected to the input of the
delay line

XTAL/PLL
VIDENT

control pin; input HIGH = crystal tuning, input LOW = PLL tuning, both without vertical
identification, 2.5 V = PLL tuning with vertical identification

VCO4.25

when used for PLL tuning a capacitor is connected; when used for crystal tuning a crystal
has to be connected (in series with a capacitor)

COLKIL

colour killing; input HIGH = active, internal colour difference signals are blanked

composite sync input, 0.3 V (peak-to-peak value) nominal

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

FUNCTIONAL DESCRIPTION

The following three important circuits are integrated:

Encoder circuit

Modulator control circuit

Sync separator and pulse shaper.

Encoder circuit

NPUT STAGE

R, G and B inputs are connected to the matrix via a
clamping and a blanking circuit.

For an EBU colour bar of 75% the amplitude of the signal
must be 0.7 V (peak-to-peak value). The outputs of the
matrix are Y, D'R and D'B.

The second part of the input stage contains inputs for
colour difference signals and a luminance signal. The
condition for 75% colour bar is

Y) = 1.05 V (peak-to-peak value) at pin 1,

Y) = 1.33 V (peak-to-peak value) at pin 3 and

Y = 1 V (peak-to-peak value) without sync at pin 5. After
clamping and blanking the amplitude and polarity are
corrected such that the signals are equal to the signals of
the matrix output. Signals are connected to a switch. Fast
switching between the two input parts is possible by the
multiplexer control pin (pin 2).

The Y output signal of the multiplexer is added to the sync
pulse of the sync separator.

The Y input (pin 5) is different to the other 5 inputs. The
timing of the internal clamping is after the sync period and
there is no vertical blanking.

The input blanking of Y can be switched off by a HIGH at
pin 12, and the internal sync separator signal is not added
to the Y signal. In this way the Y+SYNC is allowed at pin 5
and after clamping internally connected directly to pin 25.

The colour difference signals are switched sequentially by
H/2 and fed to the low frequency pre-emphasis circuit.

The colour-killing input signal at pin 28 can be used for
completely blanking the internal colour difference signals
at the input of the low frequency pre-emphasis filter.

OW FREQUENCY PRE

EMPHASIS

This filter is fully integrated, Fig.3 illustrates the nominal
response.

The transfer is guaranteed within the illustrated area for
the whole ambient temperature range by a compensation
circuit.

Fig.3 Nominal response for the low frequency pre-emphasis filter.

handbook, full pagewidth

MLA953 - 1

f (Hz)

(dB)

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

ERTICAL IDENTIFICATION

After the low frequency pre-emphasis the signal is
clamped and, if desired the vertical identification sawtooth
waveform can be added. The generation of the vertical
identification is switched on/off by the logic level input at
pin 26.

Figure 4 shows the sawtooth waveform at the input of the
FM modulator with the corresponding frequency values
after modulation.

Vertical identification is only possible if PLL tuning is
selected.

AIN

LIMITER

The gain of this amplifier is sequentially switched, so that
the amplitude of D'R is 280/230 times the amplitude of D'B
(based on an EBU colour bar). The signal is limited at a
lower and upper level to ensure that the FM modulator
frequencies are always between 3.9 MHz and 4.756 MHz.
A DC offset between D'R and D'B is added which
corresponds with the limiter levels.

MODULATOR

The signal of the gain + limiter stage is fed to the FM
modulator.

The modulator control adjusts the DC level at pin 13 to set
the frequency of the FM signal to 4.406 MHz at the black

level of D'R. The modulator control also sets the DC level
at pin 15 to adjust the FM frequency to 4.250 MHz at the
black level of D'B.

At the start of every line the FM modulator is stopped and
is started again by a short duration pulse of the pulse
shaper. These stop/start pulses are operating such that
after two lines starting in the same phase, the start phase
of the third line is shifted 180 degrees. This sequence is
inverted during each vertical blanking.

The FM signal is fed to the internal HF pre-emphasis filter.

PRE

EMPHASIS AND BANDPASS FILTER

An HF pre-emphasis filter combined with a bandpass filter
is integrated.

Figures 5 and 6 illustrate the frequency response. Two
resistors in series with a potentiometer at pin 14 adjusts
the frequency to 4.286 MHz with a tolerance of

20 kHz.

A tuning circuit integrated with an external capacitor
connected to pin 16 guarantees a stable frequency
response for the whole temperature range.

The output of the bandpass filter is connected directly to
the chrominance blanking circuit.

Fig.4 Vertical identification sawtooth waveform input.

handbook, full pagewidth

MLA954

3.90 MHz

4.250 MHz

4.406 MHz

4.756 MHz

frequency

after

modulation

35 kHz

D'R

D'B

18 s

6 s

15 s

5 s

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

HROMINANCE BLANKING

The chrominance signal is blanked by the internally
generated chrominance blanking pulse. The output of this
blanking stage is connected to the chrominance and
CVBS output circuits.

Y+SYNC, CVBS,

AND

CHROMA

OUTPUTS

The Y output signal of the matrix is added to the composite
sync signal of the sync separator. The output of this adder
at pin 25 is connected to the input of an external delay line
which is necessary for correct timing of the Y+SYNC signal
corresponding with the chrominance signal. The signal
amplitude at pin 25 is 2 V (peak-to-peak value) nominal,
so at the output of the delay line Y+SYNC is
1 V (peak-to-peak value).

The delay line has to be DC-coupled between
pins 25 and 23 to ensure the required DC level at
pin 23. The output resistor of the delay line has to be
connected to pin 17 where (V

ref

= 2.5 V).

The output of the delay line is connected to pin 23 which is
the input of a buffer operational amplifier. The output of the
buffer operational amplifier is connected to pin 22 and to
the CVBS adder stage via an internal resistor of 2 k

. An

external notch filter can be connected to pin 22. The CVBS
signal amplitude output at pin 21 is 2 V (peak-to-peak
value) nominal. An external emitter follower is used to
provide a 75

output load.

The amplitude of the chrominance output signal which is
connected to pin 18 corresponds with the Y+SYNC signal
at the output of the delay line.

Modulator control circuit

The modulator control circuit has two tuning modes which
are controlled by the input at pin 26:

Tuning by line frequency

Tuning by crystal or external signal source.

UNING BY LINE FREQUENCY

Two reference voltage controlled oscillators (VCOs) are
integrated, the 4.4 MHz VCO with an internal capacitor
and the 4.25 MHz VCO with an external capacitor at
pin 27.

A PLL loop with divider circuits directly couples the
frequencies of the two VCOs with the line frequency of the
sync separator sync signal.

The loop filter for the 4.40625 MHz reference is at pin 24
and the loop filter for the 4.250 MHz reference is at pin 31.

The outputs of the 272 divider are also used for pulse
shaping.

Within the vertical blanking period, another two Phase
Locked Loops (PLLs) synchronizes the FM modulator
during two lines with the 4.406 MHz reference VCO and
during the following 2 lines with the 4.250 MHz reference
VCO. The loop filters are connected to pins 13 and 15
respectively.

It is necessary to use low-leakage capacitors for these
loop filters.

UNING BY CRYSTAL OR EXTERNAL SIGNAL SOURCE

When the frequency of the sync pulse at pin 29 is not
stable or is incorrect it is possible to tune the FM modulator
using an external 4.250 MHz crystal connected to pin 27.
The 4.25 MHz loop at pin 31 has to be connected to pin 17
(V

ref

). A stable line frequency reference is generated by

the 272 divider circuit which is used for the 4.406 MHz
reference loop.

An external signal source, instead of a crystal, can be
connected at pin 27 via a capacitor in series with a resistor.

The minimum AC current of 50

A is determined by the

resistor values (R

int

+ R

ext

) and the output voltage of the

signal source (see Fig.7).

When crystal tuning is used no vertical identification
is possible.

Crystal tuning is recommended for VTR signals.

handbook, halfpage

MSA732 - 1

1 nF

R ext

I 50 A

signal

source

R int

800

OSCILLATOR

TDA8505

V (p-p)

Fig.7 Tuning circuit for external signal source.

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

Sync separator and pulse shaper

The composite sync input at pin 29 together with the
outputs of the 272 divider of the 4.250 MHz reference loop
are the sources for all pulses necessary for the processing.

The pulses are used for:

Clamping

Video blanking

FH/2

Chrominance blanking

Stop/start of modulator

Vertical identification

Timing for the modulator control

Sandcastle pulse shaping at pin 20.

External FH/2 at pin 4 is only necessary when two or more
SECAM encoders have to be locked in the same phase.
The phase of the internal FH/2 can be locked with an
external FH/2 connected at pin 4. A reset of the internal
FH/2 is possible by forcing pin 4 to a HIGH level. This
HIGH level corresponds with D'R. Pin 4 is connected to
ground when not used.

Figures 9 and 10 show the generated pulses during
vertical blanking for PLL tuning or crystal tuning
respectively. Figure 11 shows the pulses during line
blanking.

Transcoding application

A sandcastle pulse is necessary for the PAL/NTSC
demodulator (i.e. TDA4510) for transcoding PAL or NTSC
to SECAM.

Most of the demodulator ICs use a sandcastle pulse with
an amplitude of 12 V or 8 V. A 12 V or 8 V sandcastle is
not possible with the TDA8505 because of the 5 V power
supply.

To generate a 3-level sandcastle pulse at pin 20
(see Fig.8) an external supply voltage must be connected
to pin 19.

The PAL or NTSC CVBS signal is connected to the
composite sync input (pin 29) for PLL tuning and pulse
shaping. As previously mentioned the Y input at pin 5 can
be used as the Y+SYNC input for the filtered Y+SYNC PAL
or NTSC signal, when pin 12 is at a HIGH level.

Fig.8 3-level sandcastle pulse.

handbook, full pagewidth

MSA733 - 1

V ext

4.5 V 0.2 V

2.5 V 0.2 V

0.5 V

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); all voltages referenced to V

SSA

pin 10.

THERMAL CHARACTERISTICS

DC CHARACTERISTICS

and V

= 5 V; T

amb

= 25

C; all voltages referenced to pins 10 and 30; unless otherwise specified.

AC CHARACTERISTICS

and V

= 5 V; T

amb

= 25

C; composite sync signal connected to pin 29; unless otherwise specified.

SYMBOL

PARAMETER

MIN.

MAX.

UNIT

DDA

analog supply voltage for encoder part

5.5

DDD

digital supply voltage

5.5

ext

external supply voltage for sandcastle generation

13.2

stg

storage temperature

+150

amb

operating ambient temperature

+70

SYMBOL

PARAMETER

VALUE

UNIT

th j-a

thermal resistance from junction to ambient in free air

K/W

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

DDA

analog supply voltage for encoder part (pin 8)

4.5

5.0

5.5

DDD

digital supply voltage (pin 32)

4.5

5.0

5.5

DDA

analog supply current

DDD

digital supply current

ext

external supply voltage for sandcastle generation

8 to 12

13.2

tot

total power dissipation

215

ref

reference voltage output (pin 17)

2.425

2.5

2.575

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Encoder circuit: input stage (pins 1, 3, 5, 7, 9 and 11; black level = clamping level

n(max)

voltage from black level positive

1.2

n(min)

voltage from black level negative

only pins 1, 3 and 5

0.9

bias(max)

maximum input bias current

= V

input voltage clamped

input capacitor
connected to ground

input clamping impedance

= 1 mA

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

Multiplexer control (pin 2; note 1)

LOW level input voltage Y,

and

0.4

HIGH level input voltage R, G
and B

input current

switching time

Control input Y/Y+SYNC (pin 12)

LOW level input voltage

blanking pin 5 active;
internal sync added to Y

HIGH level input voltage

blanking pin 5 inactive;
internal sync not added
to Y

I(max)

maximum input current

XTAL/PLL and VIDENT input (pin 26)

LOW level input voltage

PLL mode; vertical
identification off

HIGH level input voltage

crystal tuning; vertical
identification off

input voltage

pin 26 connected to
pin 17; PLL tuning;
vertical identification on;
see Fig.4

input current

COLKIL input (pin 28)

LOW level input voltage

inactive

HIGH level input voltage

active

I(max)

maximum input current

FH/2 input (pin 4)

LOW level input voltage

inactive

HIGH level input voltage

active

I(max)

maximum input current

LF pre-emphasis (see Fig.3)

HF pre-emphasis and bandpass (see Figs 5 and 6)

FADJ input (pin 14) resistor value for correct adjustment; see Fig.1

input sensitivity

1.75

kHz/mV

I(max)

maximum input current

100

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

FLT output (pin 16)

DCL

limited DC LOW level output
voltage

= 200

0.27

DCH

limited DC HIGH level output
voltage

= 200

1.8

DC level output voltage

tbf

0.86

tbf

Y+SYNC output (pin 25)

output resistance

sink(max)

maximum sink current

200

source(max)

maximum source current

black level output voltage

1.6

SYNC

sync voltage amplitude

570

600

630

Y voltage amplitude

1330

1400

1470

bandwidth frequency response

= 10 k

; C

= 10 pF

MHz

group delay time tolerance

= 10 k

; C

= 10 pF

sync delay time from
pin 29 to pin 25

220

290

360

Y delay time from pin 5 to pin 25

Y+SYNC input (pin 23; note 2)

bias

input bias current

I(max)

maximum Y voltage amplitude

NOTCH output (pin 22)

output resistance

1750

2000

2250

DC output voltage level

sink(max)

maximum sink current

300

CHROMA output (pin 18)

sink(max)

maximum sink current

200

source(max)

maximum source current

DC voltage level

2.5

variation of DC voltage level

chrominance signal
blanked

chrominance signal not
blanked

output resistance

120

O(p-p)

chrominance output voltage
amplitude (peak-to-peak value)

f = 4.25 MHz

165

f = 4.406 MHz

205

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

REQUENCY OF CHROMINANCE SIGNAL

(

NOTE

black level of D'R

4406

kHz

black level of D'B

4250

kHz

max

maximum frequency

4721

4756

4791

kHz

min

minimum frequency

3865

3900

3935

kHz

D'R

deviation of D'R

EBU bar of 75%

252

280

308

kHz

D'B

deviation of D'B

EBU bar of 75%

207

230

253

kHz

CVBS output (pin 21)

sink(max)

maximum sink current

250

source(max)

maximum source current

black

black level voltage

1.6

gain Y+SYNC (pin 23 to pin 21)

CHR

gain CHROMA (pin 18 to pin 21)

output resistance

120

LPFDR output (pin 13)

DC control voltage level

tbf

2.4

tbf

control sensitivity

0.2

kHz/mV

output leakage current

LPFDB output (pin 15)

DC control voltage level

tbf

2.1

tbf

control sensitivity

1.5

kHz/mV

output leakage current

LPF4.4 output (pin 24)

DC control voltage level

tbf

2.3

tbf

control sensitivity

1.5

kHz/mV

output leakage current

100

LPF4.25 output (pin 31; C

ext

= 270 pF)

DC control voltage level

tbf

2.3

tbf

control sensitivity

5.3

kHz/mV

output leakage current

100

VCO4.25 (pin 27; note 4)

CS input (pin 29)

I(p-p)

sync pulse input amplitude
(peak-to-peak value)

300

600

slicing level

input current

O(max)

maximum output current

during sync

100

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

Notes

1. The threshold level of pin 2 is 700

20 mV. The specification of the HIGH and LOW levels is in accordance with the

scart fast blanking.

2. The black level of input signal must be 2 V; amplitude 1 V (peak-to-peak value) nominal (Y = 700 mV,

SYNC = 300 mV).

3. The tolerances of f

and f

are with the printed-circuit board

<±

5 kHz. This value can be influenced by the print

layout.

4. The oscillator operates in series-resonance. The resonance resistance of the crystal must be

and parallel

capacitance of the crystal

10 pF.

INTERNAL CIRCUITRY

ext

(pin 19)

ext

external supply current

1.5

SAND output (pin 20; V

ext

= 13.2 V); see Fig.8

sink(max)

maximum sink current

100

source(max)

maximum source current

100

top voltage level

ext

10 V

ext

10 V

PIN

NAME

CIRCUIT

DESCRIPTION

Y) input; connected via 47 nF

capacitor; 1.05 V (peak-to-peak
value) for EBU bar of 75%;
see also pins 3, 5, 7, 9 and 11

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

July 1994

Philips Semiconductors

Preliminary specification

SECAM encoder

TDA8505

SOLDERING

Plastic dual in-line packages

Y DIP OR WAVE

The maximum permissible temperature of the solder is
260

C; this temperature must not be in contact with the

joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the

specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300

C, it must not be in contact for more than 10 s;

if between 300 and 400

C, for not more than 5 s.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Philips Semiconductors

Philips Semiconductors a worldwide company

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BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367

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Tel. (02)805 4455, Fax. (02)805 4466

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floor, Suite 51,

CEP: 04552-903-SÃO PAULO-SP, Brazil.
P.O. Box 7383 (01064-970).
Tel. (011)821-2333, Fax. (011)829-1849

Canada: INTEGRATED CIRCUITS:

Tel. (800)234-7381, Fax. (708)296-8556
DISCRETE SEMICONDUCTORS: 601 Milner Ave,
SCARBOROUGH, ONTARIO, M1B 1M8,
Tel. (0416)292 5161 ext. 2336, Fax. (0416)292 4477

Chile: Av. Santa Maria 0760, SANTIAGO,

Tel. (02)773 816, Fax. (02)777 6730

Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17,

77621 BOGOTA, Tel. (571)249 7624/(571)217 4609,
Fax. (571)217 4549

Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. (032)88 2636, Fax. (031)57 1949

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. (9)0-50261, Fax. (9)0-520971

France: 4 Rue du Port-aux-Vins, BP317,

92156 SURESNES Cedex,
Tel. (01)4099 6161, Fax. (01)4099 6427

Germany: PHILIPS COMPONENTS UB der Philips G.m.b.H.,

P.O. Box 10 63 23, 20043 HAMBURG,
Tel. (040)3296-0, Fax. (040)3296 213.

Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. (01)4894 339/4894 911, Fax. (01)4814 240

Hong Kong: PHILIPS HONG KONG Ltd., Components Div.,

6/F Philips Ind. Bldg., 24-28 Kung Yip St., KWAI CHUNG, N.T.,
Tel. (852)424 5121, Fax. (852)428 6729

India: Philips INDIA Ltd, Components Dept,

Shivsagar Estate, A Block ,
Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. (022)4938 541, Fax. (022)4938 722

Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,

P.O. Box 4252, JAKARTA 12950,
Tel. (021)5201 122, Fax. (021)5205 189

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. (01)640 000, Fax. (01)640 200

Italy: PHILIPS COMPONENTS S.r.l.,

Viale F. Testi, 327, 20162 MILANO,
Tel. (02)6752.3302, Fax. (02)6752 3300.

Japan: Philips Bldg 13-37, Kohnan 2 -chome, Minato-ku, TOKYO 108,

Tel. (03)3740 5028, Fax. (03)3740 0580

Korea: (Republic of) Philips House, 260-199 Itaewon-dong,

Yongsan-ku, SEOUL, Tel. (02)794-5011, Fax. (02)798-8022

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880

Mexico: Philips Components, 5900 Gateway East, Suite 200,

EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB

Tel. (040)783749, Fax. (040)788399

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. (09)849-4160, Fax. (09)849-7811

Norway: Box 1, Manglerud 0612, OSLO,

Tel. (022)74 8000, Fax. (022)74 8341

Pakistan: Philips Electrical Industries of Pakistan Ltd.,

Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. (021)587 4641-49,
Fax. (021)577035/5874546.

Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. (02)810 0161, Fax. (02)817 3474

Portugal: PHILIPS PORTUGUESA, S.A.,

Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. (01)14163160/4163333, Fax. (01)14163174/4163366.

Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. (65)350 2000, Fax. (65)251 6500

South Africa: S.A. PHILIPS Pty Ltd., Components Division,

195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430 Johannesburg 2000,
Tel. (011)470-5911, Fax. (011)470-5494.

Spain: Balmes 22, 08007 BARCELONA,

Tel. (03)301 6312, Fax. (03)301 42 43

Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. (0)8-632 2000, Fax. (0)8-632 2745

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. (01)488 2211, Fax. (01)481 77 30

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. (02)388 7666, Fax. (02)382 4382.

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. (662)398-0141, Fax. (662)398-3319.

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. (0 212)279 2770, Fax. (0212)269 3094

United Kingdom: Philips Semiconductors Limited, P.O. Box 65,

Philips House, Torrington Place, LONDON, WC1E 7HD,
Tel. (071)436 41 44, Fax. (071)323 03 42

United States: INTEGRATED CIRCUITS:

811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. (800)234-7381, Fax. (708)296-8556
DISCRETE SEMICONDUCTORS: 2001 West Blue Heron Blvd.,

P.O. Box 10330, RIVIERA BEACH, FLORIDA 33404,
Tel. (800)447-3762 and (407)881-3200, Fax. (407)881-3300

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. (02)70-4044, Fax. (02)92 0601

For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BAF-1,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. +31-40-724825

SCD32

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
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other industrial or intellectual property rights.

Printed in The Netherlands

533061/1500/03/pp32

Date of release: July 1994

Document order number:

9397 736 70011

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