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Электронный компонент: TDA8706

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DATA SHEET
Preliminary specification
Supersedes data of February 1992
File under Integrated Circuits, IC02
1996 Aug 20
INTEGRATED CIRCUITS
TDA8706
6-bit analog-to-digital converter
with multiplexer and clamp
1996 Aug 20
2
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
FEATURES
6-bit resolution
Binary 3-state TTL outputs
TTL compatible digital inputs
3 multiplexed video inputs
Luminance and colour difference clamps
Internal reference
300 mW power dissipation
20-pin plastic package.
APPLICATIONS
General purpose video applications
Y, U and V signals
Colour Picture-in-Picture (PIPCO) for TV
Videophone
Frame grabber.
GENERAL DESCRIPTION
The TDA8706 is a monolithic bipolar 6-bit
Analog-to-Digital Converter (ADC) with a 3 analog input
multiplexer and a clamp. All digital inputs and outputs are
TTL compatible. Regulator with good temperature
compensation.
FUNCTIONAL DESCRIPTION
The TDA8706 is a `like-flash' converter which produces an
output code in one clock period. The device can withstand
a duty clock cycle of 50 to 66.6% (clock HIGH).
Luminance clamping level is fitted with 00H code (output
000000). Chrominance clamping level is fitted with 20H
code (output 100000).
QUICK REFERENCE DATA
Measured over full voltage and temperature ranges.
ORDERING INFORMATION
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
V
CCA
analog supply voltage (pin 2)
4.5
5.0
5.5
V
V
CCD
digital supply voltage (pin 10)
4.5
5.0
5.5
V
I
CCA
analog supply current (pin 20)
-
32
39
mA
I
CCD
digital supply current (pin 10)
-
28
37
mA
ILE
integral linearity error
-
-
0.75
LSB
DLE
DC differential linearity error
-
-
0.5
LSB
f
CLK
maximum clock frequency
20
-
-
MHz
P
tot
total power dissipation
-
300
418
mW
T
amb
operating ambient temperature range
0
-
+70
C
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8706
DIP20
plastic dual in-line package; 20 leads (300 mil)
SOT146-1
TDA8706T
SO20
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1996 Aug 20
3
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
BLOCK DIAGRAM
handbook, full pagewidth
MULTIPLEXER
CHROMINANCE
CLAMP
CHROMINANCE
CLAMP
LUMINANCE
CLAMP
6-BIT
ADC
TTL
OUTPUTS
REGULATOR
luminance
input
clamp
input
clock
input
chrominance
input
chrominance
input
5
6
7
12
CB
A
CCA
V
2
V
CCD
11
8
9
10
3
4
1
select
inputs
reference
voltage
TOP
reference
voltage
BOTTOM
chip
enable
13
14
20
D0
19
D1
18
D2
17
D3
16
D4
15
D5
digital
voltage
outputs
MCD267
TDA8706
ground
Fig.1 Block diagram.
1996 Aug 20
4
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
PINNING
SYMBOL PIN
DESCRIPTION
GND
1
ground
V
CCA
2
analog positive supply (+5 V)
V
RT
3
reference voltage TOP decoupling
V
RB
4
reference voltage BOTTOM
decoupling
INC
5
chrominance input
INB
6
chrominance input
INA
7
luminance input
C
8
select input
B
9
select input
A
10
select input
V
CCD
11
digital positive supply voltage (+5 V)
CLAMP
12
damp pulse input (positive pulse)
CLK
13
clock input
CE
14
chip enable (active LOW)
D5
15
digital voltage output: most significant
bit (MSB)
D4
16
digital voltage output
D3
17
digital voltage output
D2
18
digital voltage output
D1
19
digital voltage output
D0
20
digital voltage output: significant bit
(LSB)
Fig.2 Pin configuration.
handbook, halfpage
MCD266
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11 VCCD
CCA
V
RT
V
RB
V
D5
D4
D3
D2
D1
D0
INC
INB
INA
C
B
A
CLAMP
CLK
TDA8706
CE
GND
1996 Aug 20
5
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
V
CCA
analog supply voltage range (pin 2)
-
0.3
+7.0
V
V
CCD
digital supply voltage range (pin 10)
-
0.3
+7.0
V
V
CCA
-
V
CCD
supply voltage difference
1.0
-
V
V
I
input voltage range
-
0.3
+7.0
V
I
O
output current
-
10
mA
T
stg
storage temperature range
-
55
+150
C
T
amb
operating ambient temperature range
0
+70
C
1996 Aug 20
6
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
CHARACTERISTICS (see Tables 1 and 2)
V
CCA
= 4.5 to 5.5 V; V
CCD
= 4.5 to 5.5 V = V
CCD
; T
amb
= 0 to +70
C; C
VRB
= C
VR1
= 100 nF; Typical values measured
at V
CCA
= V
CCD
= 5 V and T
amb
= 25
C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
V
CCA
analog supply voltage (pin 2)
4.5
5.0
5.5
V
V
CCD
digital supply voltage (pin 10)
4.5
5.0
5.5
V
I
CCA
analog supply current (pin 2)
-
32
39
mA
I
CCD
digital supply current (pin 10)
all outputs at LOW level
-
28
37
mA
Inputs
C
LOCK INPUT
(
PIN
13)
V
IL
LOW level input voltage
0
-
0.8
V
V
IH
HIGH level input voltage
2.0
-
V
CCD
V
I
IL
LOW level input current
V
CLK
= 0.4 V
-
400
-
-
A
I
IH
HIGH level input current
V
CLK
= 2.7 V
-
-
100
A
Z
I
input impedance
f
CLK
= 20 MHz
-
4
-
k
C
i
input capacitance
f
CLK
= 20 MHz
-
2
-
pF
A, B, C, CLAMP
AND
CEN
INPUTS
(
PINS
8, 9, 10, 12
AND
14)
V
IL
LOW level input voltage
0
-
0.8
V
V
IH
HIGH level input voltage
2
-
V
CCD
V
I
IL
LOW level input current
V
CLK
= 0.4 V
-
400
-
-
A
I
IH
HIGH level input current
V
CLK
= 2.7 V
-
-
20
A
Reference voltage (pins 3 and 4)
V
RT
reference voltage TOP decoupling
3.22
3.35
3.44
V
V
RB
reference voltage BOTTOM decoupling
1.84
1.9
1.96
V
V
RT
-
V
RB
reference voltage TOP
-
BOTTOM decoupling
1.36
1.435
1.48
V
Analog inputs INA, INB, INC (pins 7, 6 and 5)
V
I(p-p)
input voltage amplitude (peak-to-peak value)
840
900
940
mV
Z
I
input impedance
f
i
= 4.43 MHz
100
-
-
k
C
clamp
coupling clamp capacitance
1
10
1000
nF
Analog signal processing (pins 5, 6 and 7) (f
CLK
= 20 MHz)
f
1
fundamental harmonics (full scale)
f
i
= 4.43 MHz
-
-
0
dB
f
all
harmonics (full scale); all components
f
i
= 4.43 MHz
-
-
45
-
dB
G
diff
differential gain
note 1
-
0.4
-
%
diff
differential phase
note 1
-
1.0
-
deg
SVRR
supply voltage ripple rejection
note 2
-
-
30
-
dB
1996 Aug 20
7
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
Outputs
D
IGITAL VOLTAGE OUTPUTS
(
PINS
15
TO
20) (see Table 2)
V
OL
LOW level input voltage
I
O
= 1 mA
0
-
0.4
V
V
OH
HIGH level output voltage
I
O
= 0.5 mA
2.7
-
V
CCD
V
I
OZ
output current in 3-state mode
0.4 V < V
O
< V
CCD
-
20
-
+20
A
Switching characteristics
C
LOCK TIMING
(see Fig.3)
f
CLK
maximum clock frequency
20
-
-
MHz
f
mux
maximum multiplexing frequency
10
-
-
MHZ
t
CLK
period
50
-
-
ns
duty cycle
CLK = V
IH
45
50
66.6
%
t
LOW
LOW time
at 50%
16
-
-
ns
t
HIGH
HIGH time
at 50%
22.5
-
-
ns
t
CLR
rise time
at 10 to 90%
4
6
-
ns
t
CLF
fall time
at 90 to 10%
4
6
-
ns
Select signals, Clamp, Data (see Figs 4 and 5)
t
S
set-up time select A, B and C
35
-
-
ns
t
r
rise time A, B and band C
at 10 to 90%
4
6
-
ns
t
f
fall time A, B and band C
at 90 to 10%
4
6
-
ns
t
CLPS
set-up time clamp asynchronous
0
-
-
t
CLPH
hold time clamp asynchronous
0
-
-
t
CLPP
clamp pulse
C
CLP
= 10 nF
-
3
-
s
t
d
data output delay time
-
15
24
ns
t
DH
data hold time
12
-
-
ns
Transfer function
ILE
DC integral linearity error
-
-
0.75
LSB
DLE
DC differential linearity error
-
-
0.5
LSB
AILE
AC integral linearity error
note 3
-
-
2
LSB
EB
effective bits
note 3
-
5.7
-
bits
Timing
D
IGITAL OUTPUTS
T
dt
3-state delay time
see Fig.6
-
16
25
ns
T
sto
sampling time offset
-
2
-
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1996 Aug 20
8
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
Notes to the characteristics
1. Low frequency ramp signal (V
VI(p-p)
= 1.8 V and f
i
= 15 kHz) combined with a sinewave input voltage (V
VI(p-p)
= 0.5 V
and f
i
= 4.43 MHz) at the input.
2. Supply voltage ripple rejection (SVRR): variation of the input voltage produces output code 31 for a supply voltage
variation of 1 V.
3. Full-scale sinewave; f
i
= 4.43 MHz, f
CLK
= 20 MHz.
SVRR
20 log
V
Vi 31
( )
V
CCA
-----------------------
=
Table 1
Output coding
Note
1. With clamping capacitance.
Table 2
Mode selection
STEP
VI
(1)
BINARY
OUTPUTS
(TYP. VALUE)
D5 TO D0
Underflow
<2.2 V
000000
0
2.2 V
000000
1
2.215 V
000001
.
......
.
......
.
......
62
3.072 V
111110
63
3.086 V
111111
Overflow
>3.1 V
111111
CEN
D0 TO D5
1
high impedance
0
active; binary
Table 3
Clamp input A
Note
1. X = don't care.
Table 4
Clamp input B and C
Note
1. X = don't care.
A
CLAMP
DIGITAL
OUTPUTS
V
in
A
0
1
X
(1)
2.2
1
1
0
2.2
B/C
CLAMP
DIGITAL
OUTPUTS
V
in
B/V
in
C
0
1
X
(1)
2.65
1
1
32
2.65
1996 Aug 20
9
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
handbook, full pagewidth
90%
10%
t CLR
t CLF
t
CLH
t CLL
VIH
V
IL
50%
MCD268
t CLP
Fig.3 AC clock characteristics.
handbook, full pagewidth
MCD269 - 1
t S
t CLPS
t CLPH
t CLPP
t d
t DH
CLK
A
B
C
CLAMP
OUTPUT
DATA
DATA C
DATA A
DATA B
DATA C
Fig.4 AC characteristics select signals; Clamp, Data.
1996 Aug 20
10
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
Table 5
Clamp characteristic related to TV signals
PARAMETER
MIN.
TYP.
MAX.
UNIT
Clamping time per line (signal active)
2.2
3.0
3.3
s
Input signals clamped to correct level after
-
3
10
lines
handbook, full pagewidth
1
0
CLAMP
input
Y
(A input)
(R Y)
(B input)
(B Y)
(C input)
digital outputs
= 100000
digital outputs
= 100000
digital outputs
= 000000
MCD270
Fig.5 AC characteristics select signals; Clamp, Data.
1996 Aug 20
11
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
Fig.6 Timing diagram of 3-state delay.
handbook, full pagewidth
MGD690
2.4 V
0.4 V
reference
level
(1.3 V)
t dHZ
t dLZ
t dZH
t dZL
data
outputs
CE
input
1996 Aug 20
12
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
APPLICATION INFORMATION
Additional application information will be supplied upon request (please quote reference number FTV/9112).
Fig.7 Application diagram.
handbook, full pagewidth
MGA230
22 nF
22 nF
C
C
C
INC
INB
INA
C
B
A
TDA8706
clock signal
C
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
(1) `C' capacitors must be determined on the output capacitance of the circuits driving A, B and C or CLK pins.
(2) V
RB
and V
RT
are decoupling pins for the internal reference ladder. Do not draw current from these pins in order to achieve good linearity.
(3) Analog and digital supplies should be separated and decoupled.
1996 Aug 20
13
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
PACKAGE OUTLINES
UNIT
A
max.
1
2
b
1
c
D
E
e
M
H
L
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT146-1
92-11-17
95-05-24
A
min.
A
max.
b
Z
max.
w
M
E
e
1
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
0.254
2.54
7.62
8.25
7.80
10.0
8.3
2.0
4.2
0.51
3.2
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.01
0.10
0.30
0.32
0.31
0.39
0.33
0.078
0.17
0.020
0.13
SC603
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w
M
b
1
e
D
A
2
Z
20
1
11
10
b
E
pin 1 index
0
5
10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
(1)
(1)
(1)
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
1996 Aug 20
14
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
UNIT
A
max.
A
1
A
2
A
3
b
p
c
D
(1)
E
(1)
(1)
e
H
E
L
L
p
Q
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
inches
2.65
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25
0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
1.1
0.4
SOT163-1
92-11-17
95-01-24
10
20
w
M
b
p
detail X
Z
e
11
1
D
y
0.25
075E04
MS-013AC
pin 1 index
0.10
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.51
0.49
0.30
0.29
0.050
1.4
0.055
0.42
0.39
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
0
5
10 mm
scale
X
A
A
1
A
2
H
E
L
p
Q
E
c
L
v
M
A
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1996 Aug 20
15
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
"IC Package Databook" (order code 9398 652 90011).
DIP
S
OLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260
C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
stg max
). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
R
EPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300
C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400
C, contact may be up to 5 seconds.
SO
R
EFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250
C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45
C.
W
AVE SOLDERING
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
The longitudinal axis of the package footprint must be
parallel to the solder flow.
The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260
C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150
C within
6 seconds. Typical dwell time is 4 seconds at 250
C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
R
EPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300
C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320
C.
1996 Aug 20
16
Philips Semiconductors
Preliminary specification
6-bit analog-to-digital converter with
multiplexer and clamp
TDA8706
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.