1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital
video interface

TDA8758

FEATURES

Two 8-bit ADCs:

one Luminance or CVBS channel

one Chrominance channel

Sampling rate up to 32 MHz

Binary or two's complement 3-state TTL outputs for
each channel

Internal reference voltage regulator

TTL-compatible digital inputs and outputs

Power dissipation of 530 mW (typical)

Input selector circuit (five selectable video inputs for
CVBS or YC processing)

Peak white enable input

Clamp and Automatic Gain Control (AGC) functions for
Y/CVBS channel (clamping on code 64 and Peak White
level control at code 255)

Clamp function for C channel (code 128)

No sample-and-hold circuit required.

APPLICATIONS

Video signal decoding

Digital picture processing

Frame grabbing

Multimedia with the Philips Desktop Video chip set (and
especially SAA7196 multistandard decoder and scaler).

GENERAL DESCRIPTION

The TDA8758 is an 8-bit video high-speed low-power
analog-to-digital conversion (ADC) interface for YC and
CVBS signal processing. It converts 1-of-3 CVBS input
signals or 1-of-2 YC input signals into binary or two's
complement words at a sampling rate of 32 MHz.
All analog signal inputs are digitally clamped and an ADC
interface is provided on the Y/CVBS channel. A fast
precharge on clamp and AGC is provided for start-up.
All digital inputs and outputs are TTL compatible.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

CCA

analog supply voltage

4.75

5.0

5.25

CCD

digital supply voltage

4.75

5.0

5.25

CCO

output stages supply voltage

4.75

5.0

5.25

CCA

analog supply current

CCD

digital supply current

CCO

output supply current

= 15 pF

ILE

DC integral linearity error

0.75

1.5

LSB

DLE

DC differential linearity error

0.4

1.0

LSB

effective bits
(from video input to digital outputs)

clk

= 32 MHz;

= 4.43 MHz

7.1

bits

clk(max)

maximum clock frequency

MHz

maximum

3 dB bandwidth

(input preamplifier)

full-scale; 0 dB gain

MHz

crosstalk between Y and C channels
and each video input

tot

total power dissipation

530

724

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

TDA8758G

LQFP48

plastic low profile quad flat package; 48 leads; body 7

1.4 mm

SOT313-2

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

PINNING

SYMBOL

PIN

DESCRIPTION

DEC1

decoupling input 1

CHROM2

chrominance analog voltage input 2

AGND

analog ground

CHROM1

chrominance analog voltage input 1

SEL2

selection control input 2

CVBS3

luminance analog voltage input 3

CLPY

Y channel clamping capacitor

SDN

stabilizer decoupling node

Y2/CVBS2

luminance analog voltage input 2

CCA

analog supply voltage (+5 V)

Y1/CVBS1

luminance analog voltage input 1

SEL1

selection control input 1

AGC

AGC capacitor

PWE

peak white enable input (active LOW)

DEC3

decoupling input 3

ANOUTY

analog output for Y channel

REG2

decoupling input 2 (internal stabilization loop decoupling)

DGND

digital ground

GATE A

AGC control input

GATE B

clamp control input

CCD

digital supply voltage (+5 V)

OFY

Y channel output format/chip enable (3-state input)

Y channel data output; bit 7 (MSB)

Y channel data output; bit 6

Y channel data output; bit 5

Y channel data output; bit 4

Y channel data output; bit 3

Y channel data output; bit 2

Y channel data output; bit 1

Y channel data output; bit 0 (LSB)

OGND2

output ground 2

CCO2

output supply voltage 2 (+5 V)

C channel data output; bit 7 (MSB)

C channel data output; bit 6

C channel data output; bit 5

C channel data output; bit 4

C channel data output; bit 3

C channel data output; bit 2

C channel data output; bit 1

C channel data output; bit 0 (LSB)

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

FUNCTIONAL DESCRIPTION

The TDA8758 provides a simple interface between CVBS
or Y/C analog signals and a digital colour decoder.

Video inputs selection

The input selector allows a choice from different video
sources, and has one of the following configurations:

A: Two Y/C and one CVBS signals

B: One Y/C and two CVBS signals

C: Three CVBS signals (only the Y channel is used).

The wiring of the five video inputs (pins 2, 4, 6, 9 and 11)
and the control of the two selection inputs (pins 5 and 12)
will depend on the available video sources.

In configuration A, connect as follows:

Y1 to pin 11

C1 to pin 4

Y2 to pin 9

C2 to pin 2

CVBS3 to pin 6.

Keep SEL2 (pin 5) LOW and select Y1/C1 or Y2/C2 by
switching SEL1 (pin 12).

CVBS3 is selected with SEL1 and SEL2 HIGH.

In configuration B, replace Y1 (or Y2) by a CVBS input
(no more C1 or C2). The selection mode is the same.

In configuration C, connect as follows:

CVBS1 to pin 11

CVBS2 to pin 9

CVBS3 to pin 6.

Use both SEL1 and SEL2 to select inputs.

Remark: the video inputs selection is a static selection.

Synchronization pulses

GATE A and GATE B pulses are synchronization pulses
occurring during the sync period and rear porch
respectively. They should be distinct.

On the Y channel, the digital output of the ADC is
compared to internal digital reference levels. The resultant
outputs control the charge or discharge current of a
capacitor connected to the C

AGC

pin. The voltage across

this capacitor controls the gain of the video amplifier.
This is the control loop.

The sync level comparator is active during a positive-going
pulse at the GATE A input. This means that sync pulse of
the composite video signal is used as an amplitude
reference. The bottom of the sync pulse is adjusted to
obtain a digital output of logic 1 at the converter Y output.
As the black level is digital level 64, the sync pulse will
have a digital amplitude of 64 LSBs.

The Peak White control loop is active when the selection
pin PWE is LOW. Then, if the Y video signal exceeds the
digital code of 255, it will be limited to avoid any over-range
of the converter.

The clamp level control is accomplished by using the same
techniques as used for the gain control. On both Y and C
channels, the black level digital comparators are active
during a positive-going pulse at the GATE B input. On the
Y channel, the clamping capacitor connected to the C

CLPY

pin will be charged or discharged to adjust the digital
output to code 64. On the C channel, the clamping
capacitor connected to the C

CLPC

pin will be charged or

discharged to adjust the digital output to code 128.

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).

THERMAL CHARACTERISTICS

CHARACTERISTICS
V

CCA

= V

to V

= 4.75 to 5.25 V; V

CCD

= V

to V

= 4.75 to 5.25 V; V

CCO1

= V

to V

= 4.75 to 5.25 V;

CC02

= V

to V

= 4.75 to 5.25 V; AGND and DGND shorted together; V

CCA

to V

CCD

0.25 to +0.25 V;

CCO

to V

CCD

0.25 to +0.25 V; V

CCA

to V

CCO

0.25 to +0.25 V; T

amb

= 0 to +70

C; typical values measured

at V

CCA

= V

CCD

= V

CCO

= 5 V and T

amb

= 25

C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

CCA

analog supply voltage

0.3

+7.0

CCD

digital supply voltage

0.3

+7.0

CCO

output supply voltage

0.3

+7.0

supply voltage difference between V

CCA

and V

CCD

1.0

+1.0

supply voltage difference between V

CCO

and V

CCD

1.0

+1.0

supply voltage difference between V

CCA

and V

CCO

1.0

+1.0

input voltage

referenced to AGND

5.0

clk(p-p)

AC input voltage for switching (peak-to-peak value) referenced to DGND

CCO

output current

stg

storage temperature

+150

amb

operating ambient temperature

+70

junction temperature

+150

SYMBOL

PARAMETER

VALUE

UNIT

th j-a

thermal resistance from junction to ambient in free air

K/W

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

CCA

analog supply voltage

4.75

5.0

5.25

CCD

digital supply voltage

4.75

5.0

5.25

CCO

output stages supply voltage

4.75

5.0

5.25

CCA

analog supply current

CCD

digital supply current

CCOtot

total output supply current

= 15 pF

Video amplifier inputs

Y1/CVBS1, Y2/CVBS2, CVBS3, CHROM1

AND

CHROM2

INPUTS

I(p-p)

input voltage (peak-to-peak value)

AGC load with external
capacitor; note 1

Y channel

0.7

1.4

C channel

1.0

input impedance

= 6 MHz

input capacitance

= 6 MHz

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

SEL1

AND

SEL2 TTL

INPUTS

; see Table 1

LOW level input voltage

0.8

HIGH level input voltage

2.0

CCD

LOW level input current

= 0.4 V

400

HIGH level input current

= 2.7 V

GATE A

AND

GATE B TTL

INPUTS

; see Figs 5 and 6

LOW level input voltage

0.8

HIGH level input voltage

2.0

CCD

LOW level input current

= 0.4 V

400

HIGH level input current

= 2.7 V

AGC

INPUT

(

13); see Fig.8

13(min)

AGC voltage for minimum gain at

3 dB

3.3

13(max)

AGC voltage for maximum gain at +3 dB

3.75

AGC output current

see Table 2

C-

CHANNEL CLAMP INPUT

(

48)

CLAMP voltage for code 128 output

3.45

CLAMP output current

see Table 3

Y-

CHANNEL CLAMP INPUT

(

CLAMP voltage for code 64 output

3.70

CLAMP output current

see Table 3

Video amplifier dynamic characteristics

crosstalk between video inputs
(pins 2, 4, 6, 9 and 11)

CCA

= 4.75 to 5.25 V

3 dB bandwidth

MHz

gain range

stab

gain stability as a function of:

supply voltage

= 4.43 MHz

0.5

supply voltage and temperature

Analog-to-digital converter inputs

CLK

INPUT

(

42)

LOW level input voltage

0.8

HIGH level input voltage

2.0

CCD

LOW level input current

clk

= 0.4 V

400

HIGH level input current

clk

= 2.7 V

input capacitance

clk

= 32 MHz

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

OFY

AND

OFC

INPUTS

; 3-

STATE

; see Table 4

LOW level input voltage

0.2

HIGH level input voltage

2.6

CCD

input voltage in high impedance state

1.15

LOW level input current

370

300

HIGH level input current

500

700

Analog-to-digital converter outputs

ANOUTY

AND

ANOUTC

OUTPUTS

(

PINS

AND

45); see Table 5

ANOUT

output voltage

digital output = 00

2.6

ANOUT

output voltage

digital output = 255

3.6

ANOUT(p-p)

output voltage amplitude
(peak-to-peak value)

1.0

IGITAL OUTPUTS

Y7, C0

LOW level output voltage

= 2 mA

0.6

HIGH level output voltage

0.4 mA

2.4

CCD

Switching characteristics; see Fig.9

clk(max)

CLK input maximum frequency

note 2

MHz

CPH

clock pulse width HIGH

CPL

clock pulse with LOW

Analog signal processing from video input to digital output on both channels; 0 dB gain (f

clk

= 32 MHz)

INL

DC integral non-linearity

0.75

1.5

LSB

DNL

DC differential non-linearity

0.4

1.0

LSB

AINL

AC integral non linearity

= 4.43 MHz

1.5

LSB

ADNL

AC differential non-linearity

= 4.43 MHz

0.5

LSB

THD

total harmonic distortion

note 3

effective bits

= 4.43 MHz; note 4

7.1

bits

diff

differential gain

16,45

= 1.0 V (p-p);

see Fig.4; PAL
modulated ramp; note 5

1.5

3.0

diff

differential phase

see Fig.5; PAL
modulated ramp; note 5

0.6

1.5

deg

SVRR2

supply voltage ripple rejection

note 6

%/V

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

Notes

1. 0 dB is obtained at the AGC amplifier when applying V

I(p-p)

= 1.0 V on Y channel.

2. It is recommended that the rise and fall times of the clock are

1 ns. In addition, a `good layout' for the digital and

analog grounds is recommended.

3. THD (total harmonic distortion) is obtained with the addition of the first five harmonics:

a) F being the fundamental harmonic referenced at 0 dB for a full-scale sine wave input.

4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent

fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB

6.02 + 1.76 dB.

5. Measurement carried out using video analyser VM700A, where video analog signal is reconstructed through a

digital-to-analog converter.

6. The supply voltage ripple rejection is the relative variation of the analog signal (full-scale signal at input) for 0.5 V of

supply variation:

Timing (f

clk

= 32 MHz); see Fig.9

IGITAL OUTPUTS

= 15 pF)

sampling delay time

output hold time

output delay time

clamp pulse width

see Figs 6 and 7

3-state output delay times; see Fig.10

dZH

enable HIGH

dZL

enable LOW

dHZ

disable HIGH

dLZ

disable LOW

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

THD

20 log

(2nd)

(3rd)

(4th)

(5th)

(6th)

---------------------------------------------------------------------------------------------------------------

SVRR2

I 00

( )

I FF

(

)

(

)

I 00

( )

I FF

(

)

(

)

CCA

-----------------------------------------------------------------------------------------------------

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

Table 2 AGC output current

Note

1. X = don't care.

Table 3 CLAMP output current

Note

1. X = don't care.

PWE

GATE A

DIGITAL

OUTPUT

AGC

output

255

output

255

+540

output

0 < output < 255

output > 255

+540

(1)

output

0 < output < 255

CLAMP

GATE B

DIGITAL

OUTPUT

CLAMP

output

128

+54

output

128

(1)

output

+54

64 < output

Table 4 OFY and OFC input coding

Note

1. Use C

10 pF to DGND.

OFY (or OFC)

Y0 to Y7 (or C0 TO C7)

active, twos complement

high impedance

open circuit

(1)

active, binary

Table 5 Output coding and ANOUTY (or ANOUTC) voltage (typical values)

STEP

BINARY OUTPUTS

TWOS COMPLIMENT

Underflow

2.6

254

255

3.6

Overflow

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

Fig.12 Example of system application (DPC71 evaluation board).

andbook, full pagewidth

MBH012

CHROMA1

CHR7

CHR6

CHROMA2

Y1/CVBS1

Y2/CVBS2

CVBS3

C27

4.7

C26

4.7

C25

4.7

C11

4.7

SEL1

IN0

SEL2

IN1

PWE

GPSWO

GATE A

HSY

GATE B

HCL

IN_ADC_Y

DEC_LLC

INADCY

IN_ADC_C

INADCC

OE_Y

OE_C

INADCY

INADCC

CHROMA IN

LUMA IN

CVBS1 IN

CVBS2 IN

CLMP_Y

CLMP_C

SDN

C12

0.1

C14

0.022

C13

0.1

DEC1

DEC2

C16

0.022

C15

0.022

AGC_CAP

C18

0.47

REG1

HEADER 3

3SIP100

REG2

C20

0.047

C19

0.047

DEC3

C17

0.022

VCCA

VCC

JP14

HEADER 3

3SIP100

VCC

VCCA

VCC

VCCA

JP15

HEADER 3

3SIP100

VCC

JP5

TDA8758

SAA7151B

68LLC50

CHR5

CHR4

CHR3

CHR2

CHR1

CHR0

CHR7

CHR6

CHR5

CHR4

CHR3

CHR2

CHR1

CHR0

UV7

UV6

UV5

UV4

UV3

UV2

UV1

DEC_UV7

DEC_UV0

to 7

DEC_Y0

to 7

DEC_UV6

DEC_UV5

DEC_UV4

DEC_UV3

DEC_UV2

DEC_UV1

DEC_UV0

UV0

DEC_Y7

DEC_Y6

DEC_Y5

DEC_Y4

DEC_Y3

DEC_Y2

DEC_Y1

DEC_Y0

DEC_HREF

DEC_HS

DEC_VS

HREF

CHR7

CHR6

CHR5

CHR4

CHR3

CHR2

CHR1

CHR0

CVBS7

CVBS6

CVBS5

CVBS4

CVBS3

CVBS2

CVBS1

DEC_FI

DEC_RTC

GPSWO

MUXC

ODD

RTCO

VSSA

VSS1

VSS2

VSS3

VSS4

VDDA
VDD1
VDD2
VDD3
VDD4

SDA

SCL

SDA

SCL

FEIN

GPSWO

RSVRD

IICSA

GTBS

FSI

CVBS0

CVBS7

CVBS6

CVBS5

CVBS4

CVBS3

CVBS2

CVBS1

CVBS0

SDAT

XTAL

CVBS7

CVBS6

CVBS5

CVBS4

CVBS3

CVBS2

CVBS1

CVBS0

XTAL2

XTAL1

GPSW1

IN0

GPSW2

IN1

HSY

HCL

LL27

DEC_LLC

CREF

DEC_REF

LFCO

RES

CVBS0 to 7

R13

220

CHR0 to 7

CLK

CX12
0.1

CCX4
0.1

CX3

OGND1

OGND2

DGND

AGND

VCCO1

VCCO2

VCCD

VCCA

R64

4.7 k

VCC

CX6
22

CX5

0.1

CX14

0.1

PAD100

TEST PT

J10

VCC

VCCA

GND

PAD100

J24

GROUND

PAD100

J25

GROUND

PAD100

TEST PT

VCC

VCCA

HEADER

4X2

8HH100

DEC_LLC

DEC_LLC2

DEC_CREF

JP16

SAA7197

20SOP300

RES

R12

4.7 k

CX13
0.1

CX7
0.1

C24
0.1

CLKREF

LFCOSEL

LL3B

LL1 to 5B

PORD

VSSA

VSSD

VDDA
VDDD
VDDD

LFCO

LFCO2

R15

R16

R14

R11

22 k

LL1 to 5A

LL3A

RES

C21

10 pF

C22

10 pF

C23

XTAL1

Y2
24.576 MHz
2SIP100

XTAL2

0.001

L2
10

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all LQFP
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45

Wave soldering

Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.

The footprint must be at an angle of 45

to the board

direction and must incorporate solder thieves
downstream and at the side corners.

Even with these conditions, do not consider wave
soldering LQFP packages LQFP48 (SOT313-2),
LQFP64 (SOT314-2) or LQFP80 (SOT315-1).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

C within

6 seconds. Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

1996 Feb 01

Philips Semiconductors

Product specification

YC 8-bit low-power analog-to-digital video
interface

TDA8758

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Philips Semiconductors a worldwide company

Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)

BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. (02)805 4455, Fax. (02)805 4466

Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,

Tel. (01)60 101-1236, Fax. (01)60 101-1211

Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,

Tel. (31)40-2783749, Fax. (31)40-2788399

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floor, Suite 51,

CEP: 04552-903-SÃO PAULO-SP, Brazil,
P.O. Box 7383 (01064-970),
Tel. (011)821-2333, Fax. (011)829-1849

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Tel. (800) 234-7381, Fax. (708) 296-8556

Chile: Av. Santa Maria 0760, SANTIAGO,

Tel. (02)773 816, Fax. (02)777 6730

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,

72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. (852)2319 7888, Fax. (852)2319 7700

Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17,

77621 BOGOTA, Tel. (571)249 7624/(571)217 4609,
Fax. (571)217 4549

Denmark: Prags Boulevard 80, PB 1919, DK-2300

COPENHAGEN S, Tel. (45)32 88 26 36, Fax. (45)31 57 19 49

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. (358)0-615 800, Fax. (358)0-61580 920

France: 4 Rue du Port-aux-Vins, BP317,

92156 SURESNES Cedex,
Tel. (01)4099 6161, Fax. (01)4099 6427

Germany: P.O. Box 10 51 40, 20035 HAMBURG,

Tel. (040)23 53 60, Fax. (040)23 53 63 00

Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. (01)4894 339/4894 911, Fax. (01)4814 240

India: Philips INDIA Ltd, Shivsagar Estate, A Block,

Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. (022)4938 541, Fax. (022)4938 722

Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,

P.O. Box 4252, JAKARTA 12950,
Tel. (021)5201 122, Fax. (021)5205 189

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. (01)7640 000, Fax. (01)7640 200

Italy: PHILIPS SEMICONDUCTORS S.r.l.,

Piazza IV Novembre 3, 20124 MILANO,
Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557

Japan: Philips Bldg 13-37, Kohnan 2 -chome, Minato-ku, TOKYO 108,

Tel. (03)3740 5130, Fax. (03)3740 5077

Korea: Philips House, 260-199 Itaewon-dong,

Yongsan-ku, SEOUL, Tel. (02)709-1412, Fax. (02)709-1415

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880

Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905,

Tel. 9-5(800)234-7381, Fax. (708)296-8556

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. (040)2783749, Fax. (040)2788399

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. (09)849-4160, Fax. (09)849-7811

Norway: Box 1, Manglerud 0612, OSLO,

Tel. (022)74 8000, Fax. (022)74 8341

Pakistan: Philips Electrical Industries of Pakistan Ltd.,

Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. (021)587 4641-49,
Fax. (021)577035/5874546

Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. (63) 2 816 6380, Fax. (63) 2 817 3474

Portugal: PHILIPS PORTUGUESA, S.A.,

Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. (01)4163160/4163333, Fax. (01)4163174/4163366

Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. (65)350 2000, Fax. (65)251 6500

South Africa: S.A. PHILIPS Pty Ltd.,

195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430, Johannesburg 2000,
Tel. (011)470-5911, Fax. (011)470-5494

Spain: Balmes 22, 08007 BARCELONA,

Tel. (03)301 6312, Fax. (03)301 42 43

Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. (0)8-632 2000, Fax. (0)8-632 2745

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. (01)488 2211, Fax. (01)481 77 30

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. (886) 2 382 4443, Fax. (886) 2 382 4444

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. (66) 2 745-4090, Fax. (66) 2 398-0793

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. (0 212)279 27 70, Fax. (0212)282 67 07

Ukraine: Philips UKRAINE, 2A Akademika Koroleva str., Office 165,

252148 KIEV, Tel. 380-44-4760297, Fax. 380-44-4766991

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. (0181)730-5000, Fax. (0181)754-8421

United States: 811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. (02)70-4044, Fax. (02)92 0601

Internet: http://www.semiconductors.philips.com/ps/

For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. +31-40-2724825

SCDS47

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
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use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.

Printed in The Netherlands

537021/1100/03/pp24

Date of release: 1996 Feb 01

Document order number:

9397 750 00606

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8758G/C1

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8758G/C1