Document Outline

1 FEATURES
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 ORDERING INFORMATION
5 QUICK REFERENCE DATA
6 BLOCK DIAGRAM
7 PINNING
8 FUNCTIONAL DESCRIPTION
- 8.1 Controller
- 8.2 Pulse width modulation frequency
- 8.3 Protections
- 8.4 Differential audio inputs
9 LIMITING VALUES
10 THERMAL CHARACTERISTICS
11 QUALITY SPECIFICATION
12 DC CHARACTERISTICS
13 AC CHARACTERISTICS
14 SWITCHING CHARACTERISTICS
- 14.1 Minimum pulse width
15 TEST AND APPLICATION INFORMATION
- 15.1 Test circuit
- 15.2 BTL application
- 15.3 Mode pin
- 15.4 External clock
- 15.5 Reference designs
- 15.6 Reference design bill of material
- 15.7 Curves measured in reference design
16 PACKAGE OUTLINE
- SOT137-1
17 SOLDERING
18 DATA SHEET STATUS
19 DEFINITIONS
20 DISCLAIMERS

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

CONTENTS

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

ORDERING INFORMATION

QUICK REFERENCE DATA

BLOCK DIAGRAM

PINNING

FUNCTIONAL DESCRIPTION

8.1

Controller

8.2

Pulse width modulation frequency

8.3

Protections

8.3.1

Diagnostic temperature

8.3.2

Diagnostic current

8.3.3

Start-up safety test

8.4

Differential audio inputs

LIMITING VALUES

THERMAL CHARACTERISTICS

QUALITY SPECIFICATION

DC CHARACTERISTICS

AC CHARACTERISTICS

SWITCHING CHARACTERISTICS

14.1

Minimum pulse width

TEST AND APPLICATION INFORMATION

15.1

Test circuit

15.2

BTL application

15.3

Mode pin

15.4

External clock

15.5

Reference designs

15.6

Reference design bill of material

15.7

Curves measured in reference design

PACKAGE OUTLINE

SOLDERING

17.1

Introduction to soldering surface mount
packages

17.2

Reflow soldering

17.3

Wave soldering

17.4

Manual soldering

17.5

Suitability of surface mount IC packages for
wave and reflow soldering methods

DATA SHEET STATUS

DEFINITIONS

DISCLAIMERS

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

FEATURES

Operating voltage from

15 to

30 V

Very low quiescent current

Low distortion

Fixed gain of 30 dB Single-Ended (SE) or 36 dB
Bridge-Tied Load (BTL)

Good ripple rejection

Internal switching frequency can be overruled by an
external clock

No switch-on or switch-off plop noise

Diagnostic input for short-circuit and temperature
protection

Usable as a stereo Single-Ended (SE) amplifier or as a
mono amplifier in Bridge-Tied Load (BTL)

Start-up safety test, to protect for short-circuits at the
output of the power stage to supply lines

Electrostatic discharge protection (pin to pin).

APPLICATIONS

Television sets

Home-sound sets

Multimedia systems

All mains fed audio systems

Car audio (boosters).

GENERAL DESCRIPTION

The TDA8929T is the controller of a two-chip set for a high
efficiency class-D audio power amplifier system. The
system is divided into two chips:

TDA8929T; the analog controller chip in a SO24
package

TDA8926J/ST/TH or TDA8927J/ST/TH; a digital power
stage in a DBS17P, RDBS17P or HSOP24 power
package.

With this chip set a compact 2

50 W or 2

100 W audio

amplifier system can be built, operating with high efficiency
and very low dissipation. No heatsink is required, or
depending on supply voltage and load, a very small one.
The system operates over a wide supply voltage range
from

15 up to

30 V and consumes a very low quiescent

current.

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

TDA8929T

SO24

plastic small outline package; 24 leads; body width 7.5 mm

SOT137-1

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

QUICK REFERENCE DATA

Note

1. V

25 V.

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

General; note 1

supply voltage

q(tot)

total quiescent current

Stereo single-ended configuration

v(cl)

closed-loop voltage gain

input impedance

n(o)

noise output voltage

220

400

SVRR

supply voltage ripple rejection

channel separation

DC output offset voltage

150

Mono bridge-tied load configuration

v(cl)

closed-loop voltage gain

input impedance

n(o)

noise output voltage

280

SVRR

supply voltage ripple rejection

DC output offset voltage

200

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

PINNING

SYMBOL

PIN

DESCRIPTION

SS1

negative analog supply voltage
channel 1

SGND1

signal ground channel 1

DD1

positive analog supply voltage
channel 1

IN1

negative audio input channel 1

IN1+

positive audio input channel 1

MODE

mode select input
(standby/mute/operating)

OSC

oscillator frequency adjustment, or
tracking input

IN2+

positive audio input channel 2

IN2

negative audio input channel 2

DD2

positive analog supply voltage
channel 2

SGND2

signal ground channel 2

SS2(sub)

negative analog supply voltage
channel 2 (substrate)

SW2

digital switch output channel 2

REL2

digital control input channel 2

DIAGTMP

digital input for temperature limit
error report from power stage

EN2

digital control output for enable
channel 2 of power stage

PWM2

input for feedback from PWM
output power stage channel 2

SSD

negative digital supply voltage;
reference for digital interface to
power stage

STAB

pin for a decoupling capacitor for
internal stabilizer

PWM1

input for feedback from PWM
output power stage channel 1

EN1

digital control output for enable
channel 1 of power stage

DIAGCUR

digital input for current error report
from power stage

REL1

digital control input channel 1

SW1

digital switch output channel 1

handbook, halfpage

VSS1

SGND1

VDD1

IN1

MODE

OSC

IN2

VDD2

SGND2

VSS2(sub)

SW1

REL1

DIAGCUR

EN1

STAB

VSSD

PWM1

PWM2

EN2

DIAGTMP

REL2

SW2

TDA8929T

MGW149

Fig.2 Pin configuration.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

FUNCTIONAL DESCRIPTION

The combination of the TDA8926J and the TDA8929T
produces a two-channel audio power amplifier system
using the class-D technology (see Fig.4).

In the TDA8929T controller device the analog audio input
signal is converted into a digital Pulse Width Modulation
(PWM) signal. The digital power stage (TDA8926) is used
for driving the low-pass filter and the loudspeaker load. It
performs a level shift from the low-power digital
PWM signal, at logic levels, to a high-power PWM signal
that switches between the main supply lines.
A second-order low-pass filter converts the PWM signal
into an analog audio signal across the loudspeaker.

For a description of the power stage see the specification
of the TDA8926.

The TDA8926 can be used for an output power of
2

50 W. The TDA8927 should be used for a higher

output power of 2

100 W.

8.1

Controller

The controller contains (for two audio channels) two Pulse
Width Modulators (PWMs), two analog feedback loops
and two differential input stages. This chip also contains
circuits common to both channels such as the oscillator, all
reference sources, the mode functionality and a digital
timing manager.

The pinning of the TDA8929T and the power stage devices
are designed to have very short and straight connections
between the packages. For optimum performance the
interconnections between the packages must be as short
as possible.

Using this two-chip set an audio system with two
independent amplifier channels with high output power,
high efficiency (90%) for the system, low distortion and a
low quiescent current is obtained. The amplifiers channels
can be connected in the following configurations:

Mono Bridge-Tied Load (BTL) amplifier

Stereo Single-Ended (SE) amplifier.

The amplifier system can be switched in three operating
modes via the mode select pin:

Standby: with a very low supply current

Mute: the amplifiers are operational, but the audio signal
at the output is suppressed

On: amplifier fully operational with output signal.

For suppressing pop noise the amplifier will remain
automatically for approximately 220 ms in the mute mode
before switching to operating mode. In this time the
coupling capacitors at the input are fully charged.

Figure 3 shows an example of a switching circuit for driving
pin MODE.

MGW150

handbook, halfpage

MODE

SGND

mute/on

standby/
mute

5 V

Fig.3 Mode select switch circuitry.

2001

Dec

Philips Semiconductors

Preliminar

y specification

Controller class-D audio amplifier

TD
A8929T

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handbook, full pagewidth

IN1

PWM1

IN1

IN2

Vi(2)

Vi(1)

mute

SGND

SGND1

SGND2

REL1

SW1

EN1

STAB

DIAGCUR

DIAGTMP

SW2

REL2

PWM2

EN2

REL1

SW1

EN1

SW2

REL2

EN2

Rfb

INPUT

STAGE

INPUT

STAGE

TDA8929T

PWM

MODULATOR

PWM

MODULATOR

MODE

STABI

OSCILLATOR

MANAGER

VSSA VDDA

VSS1 VDD1

VSSA VDDA

VSS2(sub)

VSSD

VDD2

VMODE

VSSA

MODE

OSC

ROSC

MGU387

CONTROL

AND

HANDSHAKE

DRIVER

HIGH

TDA8926J

DRIVER

LOW

25 V

VSS1

VSSA

VSS2

VSSD

VDDD

VDD2

VDDA

VDD2 VDD1

CONTROL

AND

HANDSHAKE

DRIVER

HIGH

DRIVER

LOW

BOOT1

OUT1

OUT2

BOOT2

SGND

(0 V)

STAB

POWERUP

DIAG

TEMPERATURE SENSOR

AND

CURRENT PROTECTION

Fig.4 Typical application schematic of the class-D system using TDA8929T and the TDA8926J.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

8.2

Pulse width modulation frequency

The output signal of the power stage is a PWM signal with
a carrier frequency of approximately 300 kHz. Using a
second-order LC demodulation filter in the application
results in an analog audio signal across the loudspeaker.
This switching frequency is fixed by an external resistor
R

OSC

connected between pin OSC and V

. With the

resistor value given in the application diagram, the carrier
frequency is typical 317 kHz. The carrier frequency can be

calculated using:

[Hz]

If two or more class-D systems are used in the same audio
application, it is advised to have all devices working at the
same switching frequency. This can be realized by
connecting all OSC pins together and feed them from an
external oscillator. Using an external oscillator it is
necessary to force pin OSC to a DC-level above SGND for
switching from the internal to an external oscillator. In this
case the internal oscillator is disabled and the PWM will
switch on the external frequency. The frequency range of
the external oscillator must be in the range as specified in
the switching characteristics.

Application in a practical circuit:

Internal oscillator: R

OSC

connected between pin OSC

and V

External oscillator: connect oscillator signal between
pin OSC and pin SGND; delete R

OSC

8.3

Protections

The controller is provided with two diagnostic inputs. One
or both pins can be connected to the diagnostic output of
one or more power stages.

8.3.1

IAGNOSTIC TEMPERATURE

A LOW level on pin DIAGTMP will immediately force both
pins EN1 and EN2 to a LOW level. The power stage shuts
down and the temperature is expected to drop. If
pin DIAGTMP goes HIGH, pins EN1 and EN2 will
immediately go HIGH and normal operation will be
maintained.

Temperature hysteresis, a delay before enabling the
system again, is arranged in the power stage. Internally
there is a pull-up resistance to 5 V at the diagnostic input
of the controller. Because the diagnostic output of the
power stage is an open-drain output, diagnostic lines can
be connected together (wired-OR). It should be noted that
the TDA8929T itself has no temperature protection.

8.3.2

IAGNOSTIC CURRENT

This input is intended to protect against short-circuits
across the loudspeaker load. In the event that the current
limit in the power stage is exceeded, pin DIAGCUR must
be pulled to a LOW level. A LOW level on the diagnostic
current input will immediately force the output pins EN1
and EN2 to a LOW level. The power stage will shut down
within less than 1

s and the high current is switched off.

In this state the dissipation is very low. Every 220 ms the
controller will attempt to restart the system. If there is still
a short-circuit across the loudspeaker load, the system is
switched off again as soon as the maximum current is
exceeded. The average dissipation will be low because of
this low duty factor. The actual current limiting value is set
by the power stage.

Depending on the type of power stage which is used,
several values are possible:

TDA8926TH: limit value can be externally adjusted with
a resistor; maximum is 5 A

TDA8927TH: limit value can be externally adjusted with
a resistor; maximum is 7.5 A

TDA8926J and TDA8926ST: limit value is fixed at 5 A

TDA8927J and TDA8927ST: limit value is fixed at 7.5 A.

osc

OSC

-------------------

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

8.3.3

TART

UP SAFETY TEST

During the start-up sequence, when pin MODE is switched
from standby to mute, the condition at the output terminals
of the power stage are checked. These are the same lines
as the feedback inputs of the controller. In the event of a
short-circuit of one of the output terminals to V

or V

the start-up procedure is interrupted and the system waits
for non-shorted outputs. Because the test is done before
enabling the power stages, no large currents will flow in the
event of a short-circuit. This system protects against
short-circuits at both sides of the output filter to both supply
lines. When there is a short-circuit from the outputs of the
power stage to one of the supply lines, before the
demodulation filter, it will also be detected by the start-up
safety test. Practical use from this test feature can be
found in detection of short-circuits on the printed-circuit
board.

Remark: this test is only operational prior to or during the
start-up sequence, and not during normal operating.

8.4

Differential audio inputs

For a high common mode rejection and a maximum
flexibility of application, the audio inputs are fully
differential. By connecting the inputs anti-parallel the
phase of one of the channels is inverted, so that a load can
be connected between the two output filters. In this case
the system operates as a mono BTL amplifier (see Fig.5).

Also in the stereo single-ended configuration it is
recommended to connect the two differential inputs in
anti-phase. This has advantages for the current handling
of the power supply at low signal frequencies.

handbook, full pagewidth

MGW185

TDA8929T

REL1

SW1

EN1

EN2

SW2

OUT1

SGND

OUT2

REL2

IN1

IN2

CONTROLLER

POWER

STAGE

Fig.5 Mono BTL application.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

LIMITING VALUES

In accordance with the Absolute Maximum Rate System (IEC 60134).

Notes

1. Human Body Model (HBM); R

= 1500

and C = 100 pF.

2. Machine Model (MM); R

= 10

; C = 200 pF and L = 0.75

10 THERMAL CHARACTERISTICS

11 QUALITY SPECIFICATION

In accordance with

"SNW-FQ611-part D" if this device is used as an audio amplifier.

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

supply voltage

MODE(sw)

mode select switch voltage

referenced to SGND

5.5

stg

storage temperature

+150

amb

ambient temperature

+85

virtual junction temperature

150

es(HBM)

electrostatic discharge
voltage (HBM)

note 1

all pins with respect to V

(class A)

500

+500

all pins with respect to V

(class A1)

1000

+1000

all pins with respect to GND (class B)

2500

+2500

all pins with respect to each other
(class B)

2000

+2000

es(MM)

electrostatic discharge
voltage (MM)

note 2

all pins with respect to V

(class A)

100

+100

all pins with respect to V

(class B)

100

+100

all pins with respect to GND (class B)

300

+300

all pins with respect to each other
(class B)

200

+200

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient

in free air

K/W

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

12 DC CHARACTERISTICS
V

25 V; T

amb

= 25

C; measured in Fig.10; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

supply voltage

note 1

q(tot)

total quiescent current

stb

standby current

MODE

= 0 V

100

Offset

output offset voltage in system on and mute

150

delta output offset voltage in
system

mute

Mode select input (pin MODE); see Figs 6, 7 and 8

MODE

input voltage

note 2

5.5

MODE

input current

MODE

= 5.5 V

1000

th1+

positive threshold voltage 1

standby

mute;

note 2

1.6

2.0

th1

negative threshold voltage 1

mute

standby;

note 2

0.8

1.0

MODE(hys1)

hysteresis voltage 1

th1+

)

th1

)

600

th2+

positive threshold voltage 2

mute

on;

note 2

3.8

4.0

th2

negative threshold voltage 2

mute;

note 2

3.0

3.2

MODE(hys2)

hysteresis voltage 2

th2+

)

th2

)

600

Audio inputs (pins IN1+, IN1

, IN2+ and IN2

)

DC input voltage

note 2

Internal stabilizer (pin STAB)

O(STAB)

stabilizer output voltage

mute and on;
note 3

STAB(max)

maximum current on pin STAB mute and on

Enable outputs (pins EN1 and EN2)

HIGH-level output voltage

referenced to V

STAB

1.6

STAB

0.7

LOW-level output voltage

referenced to V

0.8

Current diagnose input (pin DIAGCUR with internal pull-up resistance)

HIGH-level input voltage

no errors; note 3

STAB

LOW-level input voltage

note 3

1.5

pu(int)

internal pull-up resistance to
internal digital supply

Temperature diagnose input (pin DIAGTMP with internal pull-up resistance)

HIGH-level input voltage

no errors; note 3

5.5

LOW-level input voltage

note 3

1.5

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

Notes

1. The circuit is DC adjusted at V

15 to

30 V.

2. Referenced to SGND (0 V).

3. Referenced to V

13 AC CHARACTERISTICS

pu(int)

internal pull-up resistance to
internal digital supply

Switch outputs (pins SW1 and SW2)

HIGH-level output voltage

note 3

STAB

1.6

STAB

0.7

LOW-level output voltage

note 3

0.8

Control inputs (pins REL1 and REL2)

HIGH-level input voltage

note 3

STAB

LOW-level input voltage

note 3

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Stereo single-ended application; note 1

THD

total harmonic distortion

= 1 W; note 2

= 1 kHz

0.01

0.05

= 10 kHz

0.1

v(cl)

closed-loop voltage gain

SVRR

supply voltage ripple rejection

on; f

= 100 Hz; note 3

on; f

= 1 kHz; note 3

mute; f

= 100 Hz; note 3

standby; f

= 100 Hz; note 3

input impedance

n(o)

noise output voltage

on; R

= 0

; B = 22 Hz to 22 kHz

220

400

on; R

= 10 k

; B = 22 Hz to 22 kHz

230

mute; note 4

220

channel separation

= 10 W; R

= 0

channel unbalance

output signal

mute; V

= V

i(max)

= 1 V (RMS)

400

CMRR

common mode rejection ratio

= 1 V (RMS)

Mono BTL application; note 5

THD

total harmonic distortion

= 1 W; note 2

= 1 kHz

0.01

0.05

= 10 kHz

0.1

v(cl)

closed-loop voltage gain

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

Notes

1. V

25 V; f

= 1 kHz; T

amb

= 25

C; measured in Fig.10; unless otherwise specified.

2. THD is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a low-order low-pass filter

a significantly higher value will be found, due to the switching frequency outside the audio band.

3. V

ripple

= V

ripple(max)

= 2 V (p-p); R

= 0

4. B = 22 Hz to 22 kHz and independent of R

5. V

25 V; f

= 1 kHz; T

amb

= 25

C; measured in reference design in Fig.12; unless otherwise specified.

SVRR

supply voltage ripple rejection

on; f

= 100 Hz; note 3

on; f

= 1 kHz; note 3

mute; f

= 100 Hz; note 3

standby; f

= 100 Hz; note 3

input impedance

n(o)

noise output voltage

on; R

= 0

; B = 22 Hz to 22 kHz

280

500

on; R

= 10 k

; B = 22 Hz to 22 kHz

300

mute; note 4

280

output signal

mute; V

= V

i(max)

= 1 V (RMS)

500

CMRR

common mode rejection ratio

= 1 V (RMS)

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

handbook, full pagewidth

VMODE(hys1)

VMODE(hys2)

VMODE

Vth1

Vth2

MGW334

standby

mute

Fig.6 Mode pin selection.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

handbook, full pagewidth

MGW152

mute

switching

audio

standby

110 ms

0 V (SGND)

2 V

4 V

VMODE

VEN

VSTAB

VSS

Fig.7 Mode pin timing from standby to on via mute.

When switching from standby to mute there is a delay of 110 ms before the output starts switching. The audio signal is
available after the mode pin has been set to on, but not earlier than 220 ms after switching to mute.

handbook, full pagewidth

MGW151

switching

audio

standby

110 ms

0 V (SGND)

4 V

VMODE

VEN

VSTAB

VSS

Fig.8 Mode pin timing from standby to on.

When switching from standby to on there is a delay of 110 ms before the output starts switching.
After a second delay of 110 ms the audio signal is available.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

14 SWITCHING CHARACTERISTICS
V

25 V; T

amb

= 25

C; measured in Fig.10; unless otherwise specified.

Notes

1. Frequency set with R

OSC

, according to the formula in the functional description.

2. For tracking the external oscillator has to switch around SGND + 2.5 V with a minimum voltage of V

OSC(ext)

14.1

Minimum pulse width

The minimum obtainable pulse width of the PWM output signal of a class-D system, sets the maximum output voltage
swing after the demodulation filter and also the maximum output power. Delays in the power stages are the main cause
for the minimum pulse width being not equal to zero. The TDA8926 and TDA8927 power stages have a minimum pulse
width of t

W(min)

= 220 ns (typical). Using the TDA8929T controller, the effective minimum pulse is reduced by a factor of

two during clipping. For the calculation of the maximum output power at clipping the effective minimum pulse width during
clipping is 0.5t

W(min)

For the practical useable minimum and maximum duty factor

()

which determines the maximum output power:

100% <

100%

Using the typical values of the TDA8926 and TDA8927 power stages:

3.5% <

< 96.5%.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Switching frequency

osc

oscillator frequency

OSC

= 30.0 k

309

317

329

kHz

OSC

= 27 k

;

see Fig.12

360

kHz

osc(r)

oscillator frequency range

note 1

210

600

kHz

OSC

maximum voltage at pin OSC

frequency tracking

SGND + 12

OSC(trip)

trip level at pin OSC for tracking

frequency tracking

SGND + 2.5

track

frequency range for tracking

frequency tracking

200

600

kHz

OSC(ext)

voltage at pin OSC for tracking

note 2

W(min)

osc

-------------------------------

W(min)

osc

-------------------------------

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

15 TEST AND APPLICATION INFORMATION

15.1

Test circuit

The test diagram in Fig.10 can be used for stand alone
testing of the controller. Audio and mode input pins are
configured as in the application. For the simulation of a
switching output power stage a simple level shifter can be
used. It converts the digital PWM signal from the controller
(switching between V

and V

+ 12 V level) to a

PWM signal switching between V

and V

A proposal for a simple level shifting circuit is given
in Fig.9.

The low-pass filter performs the demodulation, so that the
audio signal can be measured with an audio analyzer. For
measuring low distortion values, the speed of the level
shifter is important. Special care has to be taken at a
sufficient supply decoupling and output waveforms without
ringing.

The handshake with the power stage is simulated by a
direct connection of the release inputs (REL1 and REL2)
with the switch outputs (SW1 and SW2) of the controller.
The enable outputs (EN1 and EN2) for waking-up the
power stage are not used here, only the output level and
timing are measured.

handbook, full pagewidth

MGW154

10 k

1.33 k

2 k

74LV14

20 k

10 nF

PWM

VDD

VSS

switch

0/12 V

VSS

5 V

BST82

PHC2300

Fig.9 Level shifter.

2001

Dec

Philips Semiconductors

Preliminar

y specification

Controller class-D audio amplifier

TD
A8929T

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MGW153

30 k

100 nF

STABILIZER

SGND

100 nF

audio
analyzer

audio left

audio right

220 nF

100 nF

SGND

0 / 12 V

30 V/

30 V

Rfb

mute

V/I

SGND

TDA8929T

SGND

OSCILLATOR

WINDOW

COMPARATOR

WINDOW

COMPARATOR

MODE

MANAGER

220 nF

VSS1

SGND1

VDD1

IN1

MODE

VMODE

VSS

Vi(L)

Vi(R)

OSC

IN2

VDD2

VDD

SGND2

VSS2(sub)

VSS

100 nF

VDD

VSS

SW1

REL1

LEVEL SHIFTER

30 kHz

LOW-PASS

DIAGCUR

EN1

STAB

VSSD

VSS

PWM1

PWM2

PWM

EN2

DIAGTMP

REL2

SW2

SGND

VSS

VDD

SGND

audio
analyzer

0 / 12 V

30 V/

30 V

VDD

VSS

LEVEL SHIFTER

30 kHz

LOW-PASS

PWM

Fig.10 Test diagram.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

15.2

BTL application

When using the system in a mono BTL application (for
more output power), the inputs of both channels must be
connected in parallel. The phase of one the inputs must be
inverted (see Fig.5). In principle the loudspeaker can be
connected between the outputs of the two single-ended
demodulation filters. For improving the common mode
behavior of the filter, the configuration in Fig.12 is advised.

15.3

Mode pin

For correct operation the switching voltage on pin MODE
should be de-bounced. If this pin is driven by a mechanical
switch an appropriate de-bouncing low-pass filter should
be used. If pin MODE is driven by an electronic circuit or
microcontroller then it should remain, for at least 100 ms,
at the mute voltage level (V

th1+

) before switching back to

the standby voltage level.

15.4

External clock

Figure 11 shows an external clock oscillator circuit.

15.5

Reference designs

The reference design for a two-chip class-D audio
amplifier for TDA8926J or TDA8927J and TDA8929T is
shown in Fig.12. The Printed-Circuit Board (PCB) layout is
shown in Fig.13. The bill of materials is given in Table 1.

The reference design for a two-chip class-D audio
amplifier for TDA8926TH or TDA8927TH and TDA8929T
is shown in Fig.14. The PCB layout is shown in Fig.15.

handbook, full pagewidth

MGW155

R19
5 k

9.1 k

39 k

R20

mode select

external clock

MODE

OSC

mute

off

C44

220 nF

5V6

120 pF

HEF4047B

GND

VDDA

TDA8929T

Fig.11 External oscillator circuit.

2001

Dec

Philips Semiconductors

Preliminar

y specification

Controller class-D audio amplifier

TD
A8929T

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MLD633

39 k

R19
39 k

R7
10 k

220 nF

R20

1 k

R10

Sumida 33

CDRH127-330

Sumida 33

CDRH127-330

GND

220 nF

C44
220 nF

PWM2

n.c.

1 nF

C29

input 2

input 1

(5.6 V)

(7.5 V)

IN1

GND

SGND1

SGND2

VSSA

VSS1

VSS2

VDDA

VDD2

VDD1

GND

QGND

OUT1

OUT2

BOOT2

BOOT1

OUT1

OUT2

VDDD

VDD1

VDD2

VSS2

VSS1

VDDD

VSSD

VSSA VSSD

27 k

220 nF

OSC

POWERUP

VSSA

220 nF

MODE

VDDA

R24

200 k

VDDD

mute

off

TDA8929T

CONTROLLER

C22

330 pF

C27

470 nF

C4
220 nF

220 nF

C14

470 nF

C18

1 nF

C19

1 nF

C20

1 nF

C21

1 nF

C16

470 nF

C6
220 nF

C9
15 nF

C8
15 nF

C43
180 pF

IN2

R6
10 k

C26

470 nF

R4
10 k

1 nF

C28

C24

470 nF

R5
10 k

QGND

inputs

outputs

power supply

mode select

VSS

C25

470 nF

C23

330 pF

R11

5.6

C10

560 pF

VSSD

VDDD VSSD

R12
5.6

R13

5.6

R14
5.6

C11
560 pF

C12

560 pF

C13
560 pF

R22
9.1 k

VSSD

VSSA

VDDA

VDDD

C31

1 nF

C30

1 nF

C33
220 nF

C35
1500

(35 V)

R21
10 k

C32
220 nF

C34
1500

(35 V)

C38
220 nF

C39
220 nF

C41
47

(35 V)

C36
220 nF

C37
220 nF

C40
47

(35 V)

GND

QGND

bead

GND

VDD

VSS

25 V

SW2

REL2

EN2

SW2

REL2

EN2

PWM1

SW1

TDA8926J

TDA8927J

POWER STAGE

REL1

EN1

SW1

REL1

EN1

STAB

VSSD

DIAGCUR

DIAG

R16
24

R15
24

4 or 8

BTL

C17
220 nF

C15
220 nF

Fig.12 Two-chip class-D audio amplifier application diagram for TDA8926J or TDA8927J and TDA8929T.

R21 and R22 are only necessary in BTL applications with asymmetrical supply.

BTL: remove R6, R7, C23, C26 and C27 and close J5 and J6.

C22 and C23 influence the low-pass frequency response and should be tuned with the real load (loudspeaker).

Inputs floating or inputs referenced to QGND (close J1 and J4) or referenced to V

(close J2 and J3) for an input signal ground reference.

2001

Dec

Philips Semiconductors

Preliminar

y specification

Controller class-D audio amplifier

TD
A8929T

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ndbook, full pagewidth

MLD634

C24

TDA8926J/27J & TDA8929T

Copper top, top view

Copper bottom, top view

Silk screen top, top view

Silk screen bottom, top view

In1

GND

In2

Out1

Out2

state of D art

Version 21 03-2001

C25

C34

C35

C40

C26

C27

ON
MUTE
OFF

C41

C16

C14

R20

R21

R22

C38

C39

C36

R24

C31

C30

C18

C19

C20

C21

R19

C13

C33

C32

C11

C29

C28

R14

R12

C43
R10

C12

C17

R16

C15

R15

R13

R11
C10

C37

C22
C23

C44

In1

Out1

Out2

GND

In2

QGND

VDD

VSS

Fig.13 Printed-circuit board layout for TDA8926J or TDA8927J and TDA8929T.

2001

Dec

Philips Semiconductors

Preliminar

y specification

Controller class-D audio amplifier

TD
A8929T

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MGW232

39 k

R1
30 k

R7
10 k

100 nF

C12

1 k

5.6

R11

Sumida 33

CDRH127-330

Sumida 33

CDRH127-330

bead

GND

100 nF

C1
220 nF

C11

PWM2

n.c.

1 nF

C10

input 2

input 1

(5.6 V)

IN1

GND

SGND1

SGND2

VSSA

VSSD

VSS1

VSS2

VDDA

VDD2

VDD1

GND

QGND

OUT1

OUT2

BOOT2

BOOT1

OUT1

OUT2

VDDD

VDD1

VDD2

VSS2

VSS1

VDDD

VSSD

VSSA

VSSD

27 k

220 nF

OSC

POWERUP

VSSA

100 nF

C14

MODE

VDDA

R18

200 k

(7.5 V)

VDDD

mute

off

TDA8929T

CONTROLLER

330 pF

C13
100 nF

C27

100 nF

C36

470 nF

C40

1 nF

C41

1 nF

C42

1 nF

C43

1 nF

C37

470 nF

C28

100

C33
15 nF

C26
15 nF

C15
180 pF

IN2

R6
10 k

R5
10 k

1 nF

R4
10 k

QGND

inputs

outputs

power supply

mode select

VSS

330 pF

R12

5.6

C24

560 pF

VSSD

VDDD VSSD

R13
5.6

R14

5.6

R15
5.6

C25
560 pF

C34

560 pF

C35
560 pF

R10
9.1 k

VSSD

VSSA

VDDA

VDDD

C17

1 nF

C16

1 nF

R9
10 k

C20
100 nF

C21
100 nF

C23
47

(35 V)

C18
100 nF

C19
100 nF

C22
47

(35 V)

GND

QGND

bead

GND

C30
100 nF

C32
1500

(35 V)

C29
100 nF

C31
1500

(35 V)

VDD

VSS

25 V

SW2

REL2

EN2

SW2

REL2

EN2

PWM1

SW1

TDA8926TH

TDA8927TH

POWER STAGE

REL1

EN1

SW1

REL1

EN1

STAB

VSS(sub)

VSSD

LIM

VSSD

STAB

DIAGCUR

DIAG

R17
5.6

R16
5.6

4 or 8

BTL

C39
220 nF

C38
220 nF

1, 12, 18, 20

n.c.

Fig.14 Two-chip class-D audio amplifier application diagram for TDA8926TH or TDA8927TH and TDA8929T.

R9 and R10 are only necessary in BTL applications with asymmetrical supply.

BTL: remove R6, R7, C4, C7 and C8 and close J5 and J6.

Demodulation coils L2 and L4 should be matched in BTL.

Inputs floating or inputs referenced to QGND (close J1 and J4) or referenced to V

(close J2 and J3).

2001

Dec

Philips Semiconductors

Preliminar

y specification

Controller class-D audio amplifier

TD
A8929T

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MGW147

TDA8926TH/27TH
TDA8929T

Copper top, top view

Copper bottom, top view

Silk screen top, top view

Silk screen bottom, top view

In1

In2

State of D art

ON
MU
OFF

C31

C32

C22

C23

C37

C36

Version 2CTH1

C29

C10

C8
C7

R4
R5

R7
R6

C30

C35

C1 C15

C12

C21

C19

C13

C3
C4

C5
C6

C18

C11

R11

C20

R1 R2

C14

R12

R14

R13

R17

R16

R10

C39

C43

QGND

C42 C41 C40 C16 C17

C38

R15

C25

C24

C34

C26

C33

Jan 2001

C27

C28

GND

Out1

Out2

VDD

VSS

Fig.15 Printed-circuit board layout for TDA8926TH or TDA8927TH and TDA8929T.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

15.6

Reference design bill of material

Table 1

Two-chip class-D audio amplifier PCB (Version 2.1; 03-2001) for TDA8926J or TDA8927J and TDA8929T
(see Figs 12 and 13)

COMPONENT

DESCRIPTION

VALUE

COMMENTS

In1 and In2

Cinch input connectors

Farnell: 152-396

Out1, Out2, V

GND and V

supply/output connectors

Augat 5KEV-02;

Augat 5KEV-03

on/mute/off switch

PCB switch Knitter ATE 1 E M-O-M

power stage IC

TDA8926J/27J

DBS17P package

controller IC

TDA8929T

SO24 package

L2 and L4

demodulation filter coils

Sumida CDRH127-330

L5, L6 and L7

power supply ferrite beads

Murata BL01RN1-A62

C1 and C2

supply decoupling capacitors for
V

to V

of the controller

220 nF/63 V

SMD1206

clock decoupling capacitor

220 nF/63 V

SMD1206

12 V decoupling capacitor of the
controller

220 nF/63 V

SMD1206

12 V decoupling capacitor of the power
stage

220 nF/63 V

SMD1206

C6 and C7

supply decoupling capacitors for
V

to V

of the power stage

220 nF/63 V

SMD1206

C8 and C9

bootstrap capacitors

15 nF/50 V

SMD0805

C10, C11,
C12 and C13

snubber capacitors

560 pF/100 V

SMD0805

C14 and C16

demodulation filter capacitors

470 nF/63 V

MKT

C15 and C17

resonance suppress capacitors

220 nF/63 V

SMD1206

C18, C19,
C20 and C21

common mode HF coupling capacitors

1 nF/50 V

SMD0805

C22 and C23

input filter capacitors

330 pF/50 V

SMD1206

C24, C25,
C26 and C27

input capacitors

470 nF/63 V

MKT

C28, C29,
C30 and C31

common mode HF coupling capacitors

1 nF/50 V

SMD0805

C32 and C33

power supply decoupling capacitors

220 nF/63 V

SMD1206

C34 and C35

power supply electrolytic capacitors

1500

F/35 V

Rubycon ZL very low ESR (large

switching currents)

C36, C37,
C38 and C39

analog supply decoupling capacitors

220 nF/63 V

SMD1206

C40 and C41

analog supply electrolytic capacitors

F/35 V

Rubycon ZA low ESR

C43

diagnostic capacitor

180 pF/50 V

SMD1206

C44

mode capacitor

220 nF/63 V

SMD1206

5.6 V zener diode

BZX79C5V6

DO-35

7.5 V zener diode

BZX79C7V5

DO-35

clock adjustment resistor

27 k

SMD1206

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

R4, R5,
R6 and R7

input resistors

10 k

SMD1206

R10

diagnostic resistor

1 k

SMD1206

R11, R12,
R13 and R14

snubber resistors

5.6

; >0.25 W

SMD1206

R15 and R16

resonance suppression resistors

SMD1206

R19

mode select resistor

39 k

SMD1206

R20

mute select resistor

39 k

SMD1206

R21

resistor needed when using an
asymmetrical supply

10 k

SMD1206

R22

resistor needed when using an
asymmetrical supply

9.1 k

SMD1206

R24

bias resistor for powering-up the power
stage

200 k

SMD1206

COMPONENT

DESCRIPTION

VALUE

COMMENTS

15.7

Curves measured in reference design

handbook, halfpage

MLD627

Po (W)

THD

(%)

(1)

(2)

(3)

Fig.16 THD + N as a function of output power.

SE; V

25 V:

(1) 10 kHz.

(2) 1 kHz.

(3) 100 Hz.

handbook, halfpage

MLD628

fi (Hz)

THD

(%)

(1)

(2)

Fig.17 THD + N as a function of input frequency.

SE; V

25 V:

(1) P

= 10 W.

(2) P

= 1 W.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

handbook, halfpage

MLD629

Po (W)

THD

(%)

(1)

(2)

(3)

Fig.18 THD + N as a function of output power.

SE; V

25 V:

(1) 10 kHz.

(2) 1 kHz.

(3) 100 Hz.

handbook, halfpage

MLD630

fi (Hz)

THD

(%)

(1)

(2)

Fig.19 THD + N as a function of input frequency.

SE; V

25 V:

(1) P

= 10 W.

(2) P

= 1 W.

handbook, halfpage

MLD631

Po (W)

THD

(%)

(1)

(2)

(3)

Fig.20 THD + N as a function of output power.

BTL; V

25 V:

(1) 10 kHz.

(2) 1 kHz.

(3) 100 Hz.

handbook, halfpage

MLD632

fi (Hz)

THD

(%)

(1)

(2)

Fig.21 THD + N as a function of input frequency.

BTL; V

25 V:

(1) P

= 10 W.

(2) P

= 1 W.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

handbook, halfpage

MLD609

(2)

Po (W)

(W)

(1)

(3)

Fig.22 Power dissipation as a function of output

power.

25 V; f

= 1 kHz:

(1) 2

SE.

(2) 1

BTL.

(3) 2

SE.

handbook, halfpage

(3)

(1)

(2)

150

100

(%)

Po (W)

120

MLD610

Fig.23 Efficiency as a function of output power.

25 V; f

= 1 kHz:

(1) 2

SE.

(2) 1

BTL.

(3) 2

SE.

handbook, halfpage

(3)

(4)

(1)

(2)

200

120

160

(W)

VP (V)

MLD611

Fig.24 Output power as a function of supply

voltage.

THD + N = 0.5%; f

= 1 kHz:

(1) 1

BTL.

(2) 1

BTL.

(3) 2

SE.

(4) 2

SE.

handbook, halfpage

(3)

(4)

(1)

(2)

200

120

160

(W)

VP (V)

MLD612

Fig.25 Output power as a function of supply

voltage.

THD + N = 10%; f

= 1 kHz:

(1) 1

BTL.

(2) 1

BTL.

(3) 2

SE.

(4) 2

SE.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

handbook, halfpage

100

MLD613

fi (Hz)

(dB)

(1)

(2)

Fig.26 Channel separation as a function of input

frequency.

SE; V

25 V:

(1) P

= 10 W.

(2) P

= 1 W.

handbook, halfpage

100

MLD614

fi (Hz)

(dB)

(1)

(2)

Fig.27 Channel separation as a function of input

frequency.

SE; V

25 V:

(1) P

= 10 W.

(2) P

= 1 W.

handbook, halfpage

MLD615

fi (Hz)

(dB)

(1)

(2)

(3)

Fig.28 Gain as a function of input frequency.

25 V; V

= 100 mV;

= 10 k

= 330 pF:

(1) 1

BTL.

(2) 2

SE.

(3) 2

SE.

handbook, halfpage

MLD616

fi (Hz)

(dB)

(1)

(2)

(3)

Fig.29 Gain as a function of input frequency.

25 V; V

= 100 mV;

= 0

(1) 1

BTL.

(2) 2

SE.

(3) 2

SE.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

handbook, halfpage

100

MLD617

fi (Hz)

SVRR

(dB)

(1)

(2)

(3)

Fig.30 SVRR as a function of input frequency.

25 V; V

ripple

= 2 V (p-p) with respect to GND:

(1) Both supply lines in anti-phase.

(2) Both supply lines in phase.

(3) One supply line rippled.

handbook, halfpage

100

(1)

(3)

SVRR

(dB)

Vripple (V)

MLD618

(2)

Fig.31 SVRR as a function of V

ripple

(p-p).

25 V; V

ripple

with respect to GND:

(1) f

ripple

= 1 kHz.

(2) f

ripple

= 100 Hz.

(3) f

ripple

= 10 Hz.

handbook, halfpage

VP (V)

(mA)

37.5

100

MLD619

Fig.32 Quiescent current as a function of supply

voltage.

= open.

handbook, halfpage

VP (V)

fclk

(kHz)

380

340

348

356

364

372

MLD620

Fig.33 Clock frequency as a function of supply

voltage.

= open.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

handbook, halfpage

MLD621

Po (W)

Vripple

(V)

(1)

(2)

Fig.34 Supply voltage ripple as a function of output

power.

25 V; 1500

F per supply line; f

= 10 Hz:

(1) 1

SE.

(2) 1

SE.

handbook, halfpage

MLD622

fi (Hz)

SVRR

(%)

(1)

(2)

Fig.35 SVRR as a function of input frequency.

25 V; 1500

F per supply line:

(1) P

= 30 W into 1

SE.

(2) P

= 15 W into 1

SE.

handbook, halfpage

600

100

(3)

fclk (kHz)

THD

(%)

200

300

400

500

MLD623

(1)

(2)

Fig.36 THD + N as a function of clock frequency.

25 V; P

= 1 W in 2

(1) 10 kHz.

(2) 1 kHz.

(3) 100 Hz.

handbook, halfpage

100

600

200

(W)

fclk (kHz)

300

400

500

MLD624

Fig.37 Output power as a function of clock

frequency.

25 V; R

= 2

; f

= 1 kHz; THD + N = 10%.

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

16 PACKAGE OUTLINE

UNIT

max.

(1)

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

EIAJ

inches

2.65

0.30
0.10

2.45
2.25

0.49
0.36

0.32
0.23

15.6
15.2

7.6
7.4

1.27

10.65
10.00

1.1
1.0

0.9
0.4

8
0

0.25

0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

1.1
0.4

SOT137-1

detail X

(A )

0.25

075E05

MS-013

pin 1 index

0.10

0.012
0.004

0.096
0.089

0.019
0.014

0.013
0.009

0.61
0.60

0.30
0.29

0.050

1.4

0.055

0.419
0.394

0.043
0.039

0.035
0.016

0.01

0.25

0.01

0.004

0.043
0.016

0.01

10 mm

scale

SO24: plastic small outline package; 24 leads; body width 7.5 mm

SOT137-1

97-05-22

99-12-27

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

17 SOLDERING

17.1

Introduction to soldering surface mount
packages

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"Data Handbook IC26; Integrated Circuit Packages"

(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.

17.2

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.

Typical reflow peak temperatures range from
215 to 250

C. The top-surface temperature of the

packages should preferable be kept below 220

C for

thick/large packages, and below 235

C for small/thin

packages.

17.3

Wave soldering

Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

For packages with leads on two sides and a pitch (e):

larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

For packages with leads on four sides, the footprint must
be placed at a 45

angle to the transport direction of the

printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

17.4

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

17.5

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

"Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods".

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45

angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

PACKAGE

SOLDERING METHOD

WAVE

REFLOW

(1)

BGA, HBGA, LFBGA, SQFP, TFBGA

not suitable

suitable

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS

not suitable

(2)

suitable

PLCC

(3)

, SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended

(3)(4)

suitable

SSOP, TSSOP, VSO

not recommended

(5)

suitable

2001 Dec 11

Philips Semiconductors

Preliminary specification

Controller class-D audio amplifier

TDA8929T

18 DATA SHEET STATUS

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

DATA SHEET STATUS

(1)

PRODUCT

STATUS

(2)

DEFINITIONS

Objective data

Development

This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.

Preliminary data

Qualification

This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.

Product data

Production

This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.

19 DEFINITIONS

Short-form specification

The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition

Limiting values given are in

accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information

Applications that are

described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.

20 DISCLAIMERS

Life support applications

These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes

Philips Semiconductors

reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

SCA73

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Philips Semiconductors a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

Printed in The Netherlands

753503/01/pp

Date of release:

2001 Dec 11

Document order number:

9397 750 08189

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Document Outline

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