2002 Sep 16

Philips Semiconductors

Product specification

Stereo audio coder-decoder
for MD, CD and MP3

UDA1380

CONTENTS

FEATURES

1.1

General

1.2

Multiple format data input interface

1.3

Multiple format data output interface

1.4

ADC front-end features

1.5

DAC features

APPLICATIONS

GENERAL DESCRIPTION

QUICK REFERENCE DATA

ORDERING INFORMATION

BLOCK DIAGRAM

PINNING

FUNCTIONAL DESCRIPTION

8.1

Clock modes

8.2

ADC analog front-end

8.3

Decimation filter (ADC)

8.4

Interpolation filter (DAC)

8.5

Noise shaper

8.6

FSDAC

8.7

Headphone driver

8.8

Digital and analog mixers (DAC)

8.9

Application modes

8.10

Power-on reset

8.11

Power-down requirements

8.12

Plop prevention

8.13

Digital audio data input and output

L3-BUS INTERFACE DESCRIPTION

9.1

Introduction

9.2

Device addressing

9.3

Slave address

9.4

9.5

Data write mode

9.6

Data read mode

C-BUS INTERFACE DESCRIPTION

10.1

Addressing

10.2

WRITE cycle

10.3

READ cycle

11.1

Evaluation modes and clock settings

11.2

S-bus input and output settings

11.3

Power control settings

11.4

Analog mixer settings

11.5

Reserved

11.6

Master volume control

11.7

Mixer volume control

11.8

Mode, bass boost and treble

11.9

Master mute, channel de-emphasis and mute

11.10

Mixer, silence detector and oversampling
settings

11.11

Decimator volume control

11.12

PGA settings and mute

11.13

ADC settings

11.14

AGC settings

11.15

Restore L3 default values (software reset)

11.16

Headphone driver and interpolation filter
(read-out)

11.17

Decimator read-out

LIMITING VALUES

HANDLING

THERMAL CHARACTERISTICS

QUALITY SPECIFICATION

DC CHARACTERISTICS

AC CHARACTERISTICS

TIMING

APPLICATION INFORMATION

PACKAGE OUTLINES

SOLDERING

21.1

Introduction to soldering surface mount
packages

21.2

Reflow soldering

21.3

Wave soldering

21.4

Manual soldering

21.5

Suitability of surface mount IC packages for
wave and reflow soldering methods

DATA SHEET STATUS

DEFINITIONS

DISCLAIMERS

PURCHASE OF PHILIPS I

C COMPONENTS

2002 Sep 16

Philips Semiconductors

Product specification

Stereo audio coder-decoder
for MD, CD and MP3

UDA1380

FEATURES

1.1

General

�

2.4 to 3.6 V power supply

�

5 V tolerant digital inputs (at 2.4 to 3.6 V power supply)

�

24-bit data path for Analog-to-Digital Converter (ADC)
and Digital-to-Analog Converter (DAC)

�

Selectable control via L3-bus microcontroller interface
or I

C-bus interface; choice of 2 device addresses in

L3-bus and I

C-bus mode

Remark: This device does not have a static mode

�

Supports sample frequencies from 8 to 55 kHz for the
ADC part, and 8 to 100 kHz for the DAC part. The ADC
cannot support DVD audio (96 kHz audio), only
Mini-Disc (MD), Compact-Disc (CD) and Moving Picture
Experts Group Layer-3 Audio (MP3). For playback
8 to 100 kHz is specified. DVD playback is supported

�

Power management unit:

� Separate power control for ADC, Automatic Volume

Control (AVC), DAC, Phase Locked Loop (PLL) and
headphone driver

� Analog blocks like ADC and Programmable Gain

Amplifier (PGA) have a block to power-down the bias
circuits

� When ADC and/or DAC are powered-down, also the

clocks to these blocks are stopped to save power

Remark: By default, when the IC is powered-up, the
complete chip will be in the Power-down mode.

�

ADC part and DAC part can run at different frequencies,
either system clock or Word Select PLL (WSPLL)

�

ADC and PGA plus integrated high-pass filter to cancel
DC offset

�

The decimation filter is equipped with a digital Automatic
Gain Control (AGC)

�

Mono microphone input with Low Noise Amplifier (LNA)
of 29 dB fixed gain and Variable Gain Control (VGA)
from 0 to 30 dB in steps of 2 dB

�

Integrated digital filter plus DAC

�

Separate single-ended line output and one stereo
headphone output, capable of driving a 16

load. The

headphone driver has a built-in short-circuit protection
with status bits which can be read out from the
L3-bus or I

C-bus interface

�

Digital silence detection in the interpolator (playback)
with read-out status via L3-bus or I

C-bus interface

�

Easy application.

1.2

Multiple format data input interface

�

Slave BCK and WS signals

�

S-bus format

�

MSB-justified format compatible

�

LSB-justified format compatible.

1.3

Multiple format data output interface

�

Select option for digital output interface: either the
decimator output (ADC signal) or the output signal of the
digital mixer which is in the interpolator DSP

�

Selectable master or slave BCK and WS signals for
digital ADC output

Remark: SYSCLK must be applied in WSPLL mode and
master mode

�

S-bus format

�

MSB-justified format compatible

�

LSB-justified format compatible.

1.4

ADC front-end features

�

ADC plus decimator can run at either WSPLL,
regenerating the clock from WSI signal, or on SYSCLK

�

Stereo line input with PGA: gain range from 0 to 24 dB
in steps of 3 dB

�

LNA with 29 dB fixed gain for mono microphone input,
including VGA with gain from 0 to 30 dB in steps of 2 dB

�

Digital left and right independent volume control and
mute from +24 to

63.5 dB in steps of 0.5 dB.

2002 Sep 16

Philips Semiconductors

Product specification

Stereo audio coder-decoder
for MD, CD and MP3

UDA1380

1.5

DAC features

�

DAC plus interpolator can run at either WSPLL
(regenerating the clock from WSI) or at SYSCLK

�

Separate digital logarithmic volume control for left and
right channels via L3-bus or I

C-bus from 0 to

78 dB in

steps of 0.25 dB

�

Digital tone control, bass boost and treble via L3-bus or
I

C-bus interface

�

Digital de-emphasis for sample frequencies of:
32, 44.1, 48 and 96 kHz via L3-bus or I

C-bus interface

�

Cosine roll-off soft mute function

�

Output signal polarity control via L3-bus or I

C-bus

interface

�

Digital mixer for mixing ADC output signal and digital
serial input signal, if they run at the same sampling
frequency.

APPLICATIONS

This audio coder-decoder is suitable for home and
portable applications like MD, CD and MP3 players.

GENERAL DESCRIPTION

The UDA1380 is a stereo audio coder-decoder, available
in TSSOP32 (UDA1380TT) and HVQFN32 (UDA1380HN)
packages. All functions and features are identical for both
package versions. The term `UDA1380' in this document
refers to both UDA1380TT and UDA1380HN, unless
particularly specified.

The front-end of the UDA1380 is equipped with a stereo
line input, which has a PGA control, and a mono
microphone input with an LNA and a VGA. The digital
decimation filter is equipped with an AGC which can be
used in case of voice-recording.

The DAC part is equipped with a stereo line output and a
headphone driver output. The headphone driver is capable
of driving a 16

load. The headphone driver is also

capable of driving a headphone without the need for
external DC decoupling capacitors, since the headphone
can be connected to a pin V

REF(HP)

on the chip.

In addition, there is a built-in short-circuit protection for the
headphone driver output which, in case of short-circuit,
limits the current through the operational amplifiers and
signals the event via its L3-bus or I

C-bus register.

The UDA1380 also supports an application mode in which
the coder-decoder itself is not running, but an analog
signal, for instance coming from an FM tuner, can be
controlled in gain, and applied to the output via the
headphone driver and line outputs.

The UDA1380 supports the I

S-bus data format with word

lengths of up to 24 bits, the MSB-justified data format with
word lengths of up to 24 bits and the LSB-justified serial
data format with word lengths of 16, 18, 20 or 24 bits
(LSB-justified 24 bits is only supported for the output
interface).

The UDA1380 has sound processing features in playback
mode, de-emphasis, volume, mute, bass boost and treble
which can be controlled by the L3-bus or I

C-bus interface.

2002 Sep 16

Philips Semiconductors

Product specification

Stereo audio coder-decoder
for MD, CD and MP3

UDA1380

QUICK REFERENCE DATA

DDD

= V

DDA(AD)

= V

DDA(DA)

= V

DDA(HP)

= 3.0 V; T

amb

= 25

�

C; R

= 5 k

; all voltages measured with respect to ground;

unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

DDA(AD)

ADC analog supply voltage

2.4

3.0

3.6

DDA(DA)

DAC analog supply voltage

2.4

3.0

3.6

DDA(HP)

headphone analog supply
voltage

2.4

3.0

3.6

DDD

digital supply voltage

2.4

3.0

3.6

DDA(AD)

ADC analog supply current

one ADC and microphone amplifier
enabled; f

= 48 kHz

4.5

two ADCs and PGA enabled;
f

= 48 kHz

7.0

all ADCs and PGAs power-down, but
AVC activated; f

= 48 kHz

3.3

all ADCs, PGAs and LNA
power-down; f

= 48 kHz

1.0

�

DDA(DA)

DAC analog supply current

operating mode; f

= 48 kHz

3.4

Power-down mode; f

= 48 kHz

0.1

�

DDA(HP)

headphone analog supply
current

no signal applied (quiescent current)

0.9

Power-down mode

0.1

�

DDD

digital supply current

operating mode; f

= 48 kHz

10.0

playback mode; f

= 48 kHz

5.0

record mode; f

= 48 kHz

6.0

Power-down mode; f

= 48 kHz

1.0

�

DD(tot)

total supply current

playback mode (without headphone);
f

= 48 kHz

9.0

playback mode (with headphone); no
signal; f

= 48 kHz

8.8

record mode (audio); f

= 48 kHz

13.0

record mode (speech); f

= 48 kHz

10.0

record mode (audio and speech);
f

= 48 kHz

13.0

fully operating; f

= 48 kHz

23.0

signal mix-in operating, using
FSDAC, AVC (with headphone); no
signal; f

= 48 kHz

12.0

Power-down mode; f

= 48 kHz

2.0

�

amb

ambient temperature

+85

�

Электронный компонент: UDA1380TT

Document Outline