PJ494
Switchmode Pulse Width Modulation Control Circuit
1-11
2002/11.rev.A
DIP-16 SOP-16
he PJ494 incorporates on a single monolithic chip all
the functions required in the construction of a pulse-
width-modulation control circuit. Designed primarily for
power supply control, these devices offer the systems
engineer the flexibility to tailor the power supply control
circuitry to his application.
The PJ494 contains an error amplifier, an on-chip adjustable
oscillator, a deed-time control comparator, pulse-steering
control flip-flop, a 5-volt, 5% precision regulator, and output-
control circuits. The error amplifier exhibits a common-mode
voltage from 0.3 volts to Vcc 2 volts. The dead-time
control comparator has a fixed offset that provides
approximately 5% dead time when externally altered. The on-
chip oscillatory be bypassed by terminating R
T
(pin 6) to the
reference output and providing a sawtooth input to C
T
(PIN
5), or it may be used to drive the common circuits in
synchronous multiple-rail power supplies. The uncommited
output transistor provide either common-emitter or emitter-
follower output capability. Each device provides for push-pull
or single-ended output operation, which may be selected
through the output-control function. The architecture of these
devices prohibits the possibility of either output being pulsed
twice during push-pull operation.
Complete PWM Power Control Circuitry
Uncommitted Outputs for 200mA Sink or Source Current
Output Control Selects Single-Ended or Push Pull Operation
Internal Circuitry Prohibits Double Pulse at Either Output
Variable Dead-Time Provides Control over Total Range
Internal Regulator Provides a Stable 5-V Reference Supply, 5%
Circuit Architecture Allows Easy Synchronization
(unless otherwise noted)
T
Device OperatingTemperature
(Ambient)
Package
PJ494CD DIP-16
PJ494CS
-20 to +85
SOP-16
Rating
Symbol Value Unit
Supply voltage
Vcc
41
Amplifier input voltage
Vi
Vcc+0.3
Collector output voltage
Vo
41
V
Collector output current
250
mA
Operating free-air temperature range
-20 to 85
Storage temperature range
T
stg
-25 to 125
Operating Junction Temperature
T
J
125
Lead temperature 1,6mm from case for 10 seconds
260
Power Dissipation @T
A
45
P
D
1000 mW
FEATURES
ORDERING INFORMATION
Pin 1.Noninv Input
2.Inv Input
3.Feedback 4.Dead-Time Control
5.C
T
6.R
T
7.Gnd
8.C1 9.E1 10.E2
11.C2 12.Vcc
13.Output Control 14.Ref Out
15. Inv Input
16. Noninv Input
ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE RANGE
Error Amp2
Error Amp1
PJ494
Switchmode Pulse Width Modulation Control Circuit
2-11
2002/11.rev.A
Parameter Symbol
Min
Max
Unit
Supply voltage
Vcc
7
40
Amplifier input voltage
Vi
-0.3
Vcc-2
Collector output voltage
Vo
40
V
Collector output current(each transistor)
200
Current into feedback terminal
0.3
mA
Timing capacitor
C
T
0.47 10000 nF
Timing resistor
R
T
1.8 500
K
Oscillator frequency
1
300
KHz
Operating free-air temperature
T
A
0 70
Vcc=15V, f=10KHz (unless otherwise noted).
REFERENCE SECTION
Value
Parameter Test
Conditions*
Min Typ Max
Unit
Output
voltage(Vref)
Io=1mA
4.75 5 5.25 V
Line regulation
Vcc=7V to 40V
--
2.0
25
Load regulation
Io=1mA to 10mA
--
3.0
15
mV
Output voltage change with temperature
T
A
=MIN to MAX
-- 0.2 1 %
Short-circuit output current***
Vref=0
15
35
75
mA
OSCILLATOR SECTION
Value
Parameter Test
Conditions*
Min Typ Max
Unit
Frequency
C
T
=0.001
F,R
T
=30K
-- 40 -- KHz
Standard deviation of frequency****
C
T
=0.001
F,R
T
=30K
-- 3.0 --
Frequency change with voltage
Vcc=7V to 40V, T
A
=25
-- 0.1 --
Frequency change with temperature***
C
T
=0.001
F,R
T
=30K
T
A
=MIN to MAX
-- -- 12
%
ERROR AMPLIFIER SECTION
Value
Parameter Test
Conditions*
Min Typ** Max
Unit
Input offset voltage
Vo=(pin 3)=2.5V
--
2.0
10
mA
Input offset current
Vo=(pin 3)=2.5V
--
5.0
250
nA
Input bias current
Vo=(pin 3)=2.5V
--
-0.1
-1.0
A
Common-mode input voltage range
Vcc=7V to 40V
-0.3 toV
cc
-2 V
Open-loop voltage amplification
Vo=3V,R
L
=2K
,Vo=0.5 to 3.5V
70 95 -- dB
Unity-gain bandwidth
R
L
=2K
,Vo=0.5 to 3.5V
-- 800 -- KHz
Common-mode rejection ratio
Vo=40V, T
A
=25
65 90 -- dB
Power Supplu Rejection Ratio
Vcc=33V,Vo=2.5V,R
L
=2K
-- 100 -- dB
Output sink current (pin 3)
V
ID
=-15mV to -5V,V
(PIN3)
=0.7V 0.3
0.7
--
mA
Output source current (pin 3)
V
ID
=15mV to 5V,V
(PIN3)
=3.5V 2.0
-4.0
--
mA
OUTPUT SECTION
Value
Parameter Test
Conditions
Min Typ Max
Unit
Collector off-state current
V
CE
=40V,V
CC
=40V -- 2.0 100
Emitter off-state current
Vcc=Vc=40V, V
E
=0 --
-- -100
A
Common-emitter V
E
=0, Ic=200mA
--
1.1
1.3
Collector-emitter saturation
voltage
Emitter-follower Vc=15V,
I
E
=-200mA
-- 1.5 2.5
V
Output control input current
V
I
=Vref --
--
3.5
mA
RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING FREE-AIR TEMPERATURE
PJ494
Switchmode Pulse Width Modulation Control Circuit
3-11
2002/11.rev.A
DEAD-TIME CONTROL SECTIONDead-time control-section (See Figure 11)
Value
Parameter Test
Conditions
Min Typ* Max
Unit
Input bias current (pin 4)
V
I
=0 to 5.25V
--
-2.0
-10
A
Maximum duty cycle, each output
V
I
(pin 4)=0,C
T
=0.1
F,R
T
=12K
-- 45 50 %
Zero duty cycle
--
3.0
3.3
Input threshold voltage(pin 4)
Maximum duty cycle
0
--
--
V
PWM COMPARATOR SECTION (See Figure11)
Value
Parameter Test
Conditions
Min Typ* Max
Unit
Input threshold voltage (pin 3)
Zero duty cycle
--
4.0
4.5
V
Input sink current (pin 3)
V(pin 3)=0.7V
0.3
0.7
--
mA
TOTAL DEVICE
Value
Parameter Test
Conditions
Min Typ* Max
Unit
Vcc=15V -- 6.0 10
Standby supply current
Pin 6 at Vref, all other inputs and
outputs open
Vcc=40V -- 9.0 15
Average supply current
V
I(PIN4)
=2V, See Figure 1
--
7.5
--
mA
SWITCHING CHARACTERISTICS, T
A
=25
Value
Parameter Test
Conditions
Min Typ* Max
Unit
Output voltage rise time
--
100
200
Output voltage fall time
Common-emitter configuration,
See Figure 3
-- 25 100
Output voltage rise time
--
100
200
Output voltage fall time
Emitter-follower configuration,
See Figure 4
-- 40 100
ns
UNDERVOLTAGE LOCKOUT SECTION
Value
Parameter Test
Conditions
Min Typ* Max
Unit
Turn-on Threshold
Vcc increasing Iref =1.0mA
5.5
6.43
7.0
V
All typical value except for temperature coefficient are at T
A
=25
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values except for parameter changes with temperature are at T
A
=25
Duration of the short-circuit should not exceed one second
Standard deviation is a measure of the statistical distribution about the mean as derived from the formula
2
1
1
2
1
)
(
-
-
=
=
N
n
n
N
x
x
Temperature coefficient of timing capacitor and timing resistor not taken into account
PJ494
Switchmode Pulse Width Modulation Control Circuit
4-11
2002/11.rev.A
This device contained 46 active transistors
Figure 1. Representative Block Diagram
Figure 2. Timing Diagram
FUNCTION BLOCK DIAGRAM
PJ494
Switchmode Pulse Width Modulation Control Circuit
5-11
2002/11.rev.A
Description
The PJ494 is a fixed-frequency pulse width modulation control circuit, incorporating the primary building blocks required for
the control of a switching power supply . (See Figure 1.) An internal-linear sawtooth oscillator is frequescy-programmable by two
external components, R
T
and C
T
. The approximate oscillator frequency is determined by:
........... For more information refer to Figure 3.
Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor C
T
to
either of two control signals. The NOR gates, which drive output transistors Q1 and Q2, are enabled only when the flip-flop
clock-input line is in its low state. This happens only during that portion of time when the sawtoothvoltage is greater than the
control signals. Therefore, an increase in contro-signal amplitude causes a corresponding linear decrease of output pulse width.
(Refer to the Timing Diagram shown in Figure 2.)
The control signals are external inputs that can be fed into the deadtime control, the error amplifier inputs, or the feedback
input. The deadtime control comparator has an effective 120mV input offset which limits the minimum output deadtime to
approximately tge first 4% of the sawtooth-cycle time. This would result in a maximum duty cycle on a given output of 96% with
the output control grounded, and 48% with it connected to the reference line. Additional deadtime may be imposed on the output
by setting the deadtime-control input to a fixed voltage, ranging between 0V to 3.3V .
The pulse width modulator comparator provides a means for the error amplifiers to adjust the output pulse width from the
maximum percent on-time, established by the deadtime control input, down to zero as the voltage at the feedback pin varies from
0.5V to 3.5V. Both error amplifiers have a common mode input range from -0.3C to (Vcc 2V), and may be ised to sense power-
supply output voltage and current. The error amplifier outputs are active high and are ORed together at the noninverting input of
the pulse-width modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates
control of the loop.
When capacitor C
T
is discharged, a positive pulse is generated on the output of the deadtime comparator, which clocks the
pulse-steering flip=flop and inhibits the output transistors, Q1 and Q2. With the output-control connected to the reference line, the
pulse-steering flip-flop directs the modulated pulses to each of the rwo output transistors alternately for push-pull operation. The
output frequency is equal to half that of the oscillator. Output drive can also be taken from Q1 and Q2, when single-ended
operation with a maximum on-time of less than 50% is required. This is desirable when the output transformer has a ringback
winding with a catch diode ised for snubbing. When higher output-drive currents are required for single-ended operation, Q1 and
Q2 may be connected in parallel, and the output mode pin must be tied to ground to disable the flip-flop. The output frequency
will now be equal to that of the oscillator.
The PJ494 has an internal 5.0V reference capable of sourcing up to 10mA of laod current for external bias circuits. The
reference has an internal accuracy of 5.0% with a typical thermal drift of less than 50mV over an operating temperature range of 0
to
70.
Figure 3. Oscillator Frequency versus Timing Resistance
APPLICATIONS INFORMATION
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