PLL130-09
High Speed Translator Buffer to LVDS
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 1
FEATURES
Differential LVDS output
Single AC coupled input (min. 100mV swing).
Input range from DC to 1.0 GHz.
2.5V to 3.3V operation.
Available in 8-Pin SOIC or 3x3mm QFN.
DESCRIPTION
The PLL130-09 is a low cost, high performance,
high speed, buffer that reproduces any input fre-
quency from DC to 1.0GHz. It provides a pair of
differential LVDS output. Any input signal with at
least 100mV swing can be used as reference
signal. This chip is ideal for conversion from sine
wave, TTL, CMOS, or PECL to LVDS.
PIN CONFIGURATION
(TOP VIEW)
BLOCK DIAGRAM
Input
Amplifier
LVDS_BAR
REF_IN
LVDS
PLL130-09
1
2
3
4
5
6
7
8
GND
REF_IN
GND
LVDS
VDD
LVDS_BAR
VDD
GND
PLL130-09
LVDS_BAR
LVDS
GND
VDD
1
2
3
4
12
11
10
9
13
14
15
16
8
7
6
5
VDD
VDD
GND
VDD
GND
GND
GND
OE^
GN
D
GN
D
REF_IN
GN
D
Note: ^ denotes internal pull up
PLL130-09
High Speed Translator Buffer to LVDS
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 2
PIN DESCRIPTIONS
Name
8pin SOIC
Pin number
3x3mm QFN
Pin number
Type Description
GND 1,3,7 1,2,4,5,
9,13,14,15
P Ground.
VDD 5,8 7,10,11,12
P
Power
supply.
REF_IN 2
3 I
Reference input signal. The frequency of this signal will be
reproduced at the output (after translation to LVDS level).
LVDS 4
6 O
LVDS
True
output.
LVDS_BAR 7
8
O
LVDS
Complementary
output.
OE
N/A
16
I
Output enable (`1' for enable). Internal pull-up (default is `1').
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
4.6 V
Input Voltage, dc
V
I
-0.5
V
DD
+0.5 V
Output Voltage, dc
V
O
-0.5
V
DD
+0.5 V
Storage Temperature
T
S
-65 150
C
Ambient Operating Temperature*
T
A
-40 85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. AC Specifications
PARAMETERS CONDITIONS
MIN.
TYP.
MAX.
UNITS
Input Frequency
0
1000
MHz
Input signal swing
REF_IN input
100
mV
Output Frequency
0
1000
MHz
PLL130-09
High Speed Translator Buffer to LVDS
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 3
3
. LVDS Electrical Characteristics
PARAMETERS SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Output Differential Voltage
V
OD
247
355
454
mV
V
DD
Magnitude Change
V
OD
-50 50 mV
Output High Voltage
V
OH
1.4
1.6
V
Output Low Voltage
V
OL
0.9
1.1
V
Offset Voltage
V
OS
1.125
1.2
1.375
V
Offset Magnitude Change
V
OS
R
L
= 100
(see figure)
0 3 25 mV
Power-off Leakage
I
OXD
V
out
= V
DD
or GND
V
DD
= 0V
1
10
uA
Output Short Circuit Current
I
OSD
-5.7 -8
mA
4. LVDS Switching Characteristics
PARAMETERS SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Differential Clock Rise Time
t
r
0.2 0.7 1.0 ns
Differential Clock Fall Time
t
f
R
L
= 100
C
L
= 10 pF
(see figure)
0.2 0.7 1.0 ns
OUT
OUT
V
OD
V
OS
50
50
OUT
V
DIFF
R
L
= 100
C
L
= 10pF
C
L
= 10pF
LVDS Switching Test Circuit
LVDS Levels Test Circuit
LVDS Transistion Time Waveform
OUT
OUT
OUT
0V (Differential)
0V
20%
80%
20%
80%
t
R
t
F
V
DIFF
PLL130-09
High Speed Translator Buffer to LVDS
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 4
PACKAGE INFORMATION
C
L
A
8 PIN ( dimensions in mm )
Narrow SOIC
Symbol
Min.
Max.
A
1.47
1.73
A1
0.10
0.25
B
0.33
0.51
C
0.19
0.25
D
4.80
4.95
E
3.80
4.00
H
5.80
6.20
L
0.38
1.27
e
1.27 BSC
E
H
D
A
1
e
B
PLL130-09
High Speed Translator Buffer to LVDS
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 5
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL130-09 S C
Order Number
Marking
Package Option
PLL130-09QC-R P130-09QC QFN - Tape and Reel
PLL130-09QC
P130-09QC
QFN - Tube
PLL130-09SC-R P130-09SC SOIC -Tape and Reel
PLL130-09SC P130-09SC SOIC
-
Tube
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
S=SOIC; Q=QFN
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