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Электронный компонент: PLL502-39UQI-R

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PLL502-39U
750kHz 800MHz Low Phase Noise Multiplier VCXO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/29/05 Page 1
FEATURES
Selectable 750kHz to 800MHz range.
Low phase noise output (@ 10kHz frequency
offset, -142dBc/Hz for 19.44MHz, -125dBc/Hz for
155.52MHz, -115dBc/Hz for 622.08MHz).
12 to 25MHz crystal input.
No external load capacitor or varicap required.
Inverted LVDS signal Output Enable selector.
Wide pull range (+/-200 ppm)
Selectable 1/16 to 32x frequency multiplier.
3.3V operation.
Available in 16-Pin (TSSOP or 3x3mm QFN).
DESCRIPTION
The PLL502-39U (LVDS) is a high performance and
low phase noise VCXO clock IC. It provides phase
noise performance as low as 125dBc at 10kHz off-
set (at 155MHz), by multiplying the input crystal fre-
quency up to 32x. The wide pull range (+/- 200 ppm)
and very low jitter makes this ideal for a wide range
of applications, including SONET/SDH and FEC.
PLL502-39 accepts fundamental parallel resonant
mode crystals input from 12 to 25MHz.
BLOCK DIAGRAM

PIN CONFIGURATION
(Top View)

Note: ^ designates Internal pull-up
OUTPUT ENABLE LOGICAL LEVELS
Part #
OE
State
1 Tri-state
PLL502-39U
0 (Default)
Output enabled
PLL502-39U
GND
VDD
CLKT
CLKC
1
2
3
4
12
11
10
9
13
14
15
16
8
7
6
5
XIN
SEL0
^
SEL1^
VD
D
SEL3^
XOUT
SEL2^
OE
GN
D
VC
O
N
GN
D
GN
D
XIN
XOUT
OE
CLKT
PLL502-39U
VCON
PLL by-pass
SEL
PLL
(Phase
Locked
Loop)
Oscillator
Amplifier
w/
integrated
varicaps
CLKC
PLL502-39U
750kHz 800MHz Low Phase Noise Multiplier VCXO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/29/05 Page 2
FREQUENCY SELECTION TABLE
SEL3
SEL2 SEL1 SEL0
Selected
Multiplier
0
0
1
1
Fin x 32
0 1 1 0
Fin
/
8
0
1
1
1
Fin x 2
1 0 0 1
Fin
/
2
1 0 1 0
Fin
/
16
1
0
1
1
Fin x 4
1 1 0 0
Fin
/
4
1
1
0
1
Fin x 8
1
1
1
0
Fin x 16
1 1 1 1
No
multiplication
PIN DESCRIPTIONS
Name
3x3mm QFN
Pin number
Type Description
VCON 1 I
Voltage
Control
input.
GND 2,3,4,8
P
Ground
connection.
CLKT 5
O
LVDS
Output
VDD 6
P
+3.3V
power
supply.
CLKC
7
O
Complementary LVDS output
SEL1 9
I
SEL0 10
I
Multiplier selector pins. These pins have an internal pull-up that will
default SEL to `1' when not connected to GND.
VDD 11
P
+3.3V
power
supply.
XIN
12
I
Crystal input. See Crystal Specification on page 3.
XOUT
13
I
Crystal output. See Crystal Specification on page 3.
SEL3 14
I
SEL2 15
I
Multiplier selector pins. These pins have an internal pull-up that will
default SEL to `1' when not connected to GND.
OE
16
I
Output enable pin (see OE logic state table on page 1).
PLL502-39U
750kHz 800MHz Low Phase Noise Multiplier VCXO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/29/05 Page 3
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
4.6 V
Input Voltage, dc
V
I
-0.5
V
DD
+0.5 V
Output Voltage, dc
V
O
-0.5
V
DD
+0.5 V
Storage Temperature
T
S
-65 150
C
Ambient Operating Temperature*
T
A
-40 85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. Crystal Specifications
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
F
XIN
Parallel Fundamental Mode
12
25
MHz
Crystal Loading Rating
C
L (xtal)
At VCON = 1.65V
9.5
pF
Crystal Pullability
C
0
/C
1 (xtal)
AT
cut
250
-
Recommended ESR
R
E
AT cut
30
Note: Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at
nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This how-
ever may reduce the pull range.
3. Voltage Control Crystal Oscillator
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
VCXO Stabilization Time *
T
VCXOSTB
From power valid
10 ms
VCXO Tuning Range
F
XIN
= 12 25MHz;
XTAL C
0
/C
1
< 250
0V
VCON 3.3V
500 ppm
CLK output pullability
VCON=1.65V,
1.65V
200
ppm
VCXO Tuning Characteristic
150
ppm/V
Pull range linearity
10
%
VCON pin input impedance
2000
k
VCON modulation BW
0V
VCON 3.3V, -3dB
25
kHz
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
PLL502-39U
750kHz 800MHz Low Phase Noise Multiplier VCXO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/29/05 Page 4
4. General Electrical Specifications
PARAMETERS SYMBOL
CONDITIONS
MIN. TYP. MAX. UNITS
Fout<24MHz
25
24MHz<Fout<96MHz
45
Supply Current,
Dynamic (with
Loaded Outputs)
I
DD
96MHz<Fout<800MHz
80
mA
Operating Voltage
V
DD
2.97
3.63 V
Output Clock
Duty Cycle
@ 1.25V
4 50 55 %
Short Circuit
Current
50
mA
5. Jitter Specifications
PARAMETERS CONDITIONS
FREQUENCY MIN. TYP. MAX. UNITS
19.44MHz 2.2
77.76MHz 4.5
155.52MHz 4.5
Period jitter RMS
With capacitive decoupling be-
tween VDD and GND.
Over 10,000 cycles.
622.08MHz 5.0
ps
19.44MHz 17
77.76MHz 25
155.52MHz 27
Period jitter Peak-to-
Peak
1
With capacitive decoupling be-
tween VDD and GND.
Over 10,000 cycles.
622.08MHz 35
ps
155.52MHz 2.5 4
Integrated jitter RMS
Integrated 12 kHz to 20 MHz
622.08MHz 2.5 4
ps
6. Phase Noise Specifications
PARAMETERS FREQUENCY @10Hz
@100Hz @1kHz @10kHz @100kHz UNITS
19.44MHz -80 -108
-132
-142
-150
77.76MHz -72 -103
-122
-130
-125
155.52MHz -65 -95
-120
-125
-121
Phase Noise relative
to carrier
(typical)
622.08MHz -55 -85
-109
-115
-110
dBc/Hz
Note: Phase Noise measured at VCON = 0V
PLL502-39U
750kHz 800MHz Low Phase Noise Multiplier VCXO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/29/05 Page 5
8. LVDS Electrical Characteristics
PARAMETERS SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Output Differential Voltage
V
OD
247
355
454
mV
V
DD
Magnitude Change
V
OD
-50
50 mV
Output High Voltage
V
OH
1.4
1.6
V
Output Low Voltage
V
OL
0.9
1.1
V
Offset Voltage
V
OS
1.125
1.2
1.375
V
Offset Magnitude Change
V
OS
R
L
= 100
(see figure)
0
3 25 mV
Power-off Leakage
I
OXD
V
out
= V
DD
or GND
V
DD
= 0V
1
10
uA
Output Short Circuit Current
I
OSD
-5.7 -8
mA
9. LVDS Switching Characteristics
PARAMETERS SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Differential Clock Rise Time
t
r
0.2 0.7 1.0 ns
Differential Clock Fall Time
t
f
R
L
= 100
C
L
= 10 pF
(see figure)
0.2 0.7 1.0 ns
OUT
OUT
V
OD
V
OS
50
50
OUT
V
DIFF
R
L
= 100
C
L
= 10pF
C
L
= 10pF
LVDS Switching Test Circuit
LVDS Levels Test Circuit
LVDS Transistion Time Waveform
OUT
OUT
OUT
0V (Differential)
0V
20%
80%
20%
80%
t
R
t
F
V
DIFF
PLL502-39U
750kHz 800MHz Low Phase Noise Multiplier VCXO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/29/05 Page 6
PACKAGE INFORMATION

16 Pin 3x3 QFN
ORDERING INFORMATION


PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
Min.
Max.
Min.
Max.
A
0.70 0.80 0.028 0.032
A1
b
0.18 0.30 0.007 0.012
D
2.90 3.10 0.114 0.122
E
2.90 3.10 0.114 0.122
e
L
0.30 0.50 0.012 0.020
Symbol
Dimension in MM
Dimension in inch
0.50 BSC
0.020 BSC
0.203 REF
0.008 REF
D
E
e
e
L
L
b
b
e
e
L
L
b
b
A
A
A
A
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type, Operating temperature range, shipping method
PLL502-39U X X-
R




Order Number
Marking
Package Option
PLL502-39UQC
P502-39UQC
16-Pin 3x3 QFN (Tube)
PLL502-39UQC-R
P502-39UQC
16-Pin 3x3 QFN (Tape and Reel)
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
Q=QFN
NONE= TUBE
-R=TAPE AND REEL