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Электронный компонент: PLL502-52HOC-R

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PLL502-52
Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 1
FEATURES
Integrated voltage-controlled crystal oscillator
circuitry (VCXO) (pull range 380ppm minimum).
VCXO tuning range: 0V - V
DD
V.
Uses inexpensive fundamental-mode parallel
resonant crystals (from 20 to 40MHz).
Integrated divider by 2: output range of 10MHz
to 20MHz.
2.5V or 3.3V supply voltage.
Selectable High Drive (30mA) or Standard Drive
(10mA) output.
Available in 8-Pin TSSOP or SOIC.
DESCRIPTION
The PLL502-52 is a monolithic low jitter, high per-
formance CMOS VCXO IC Die. It allows the control
of the output frequency with an input voltage
(VCON), using a low cost crystal.
This makes the PLL502-52 ideal for a wide range of
applications requiring a VCXO output in the 10MHz
to 20MHz range, using a fundamental crystal ranging
from 20 to 40 MHz.
PIN CONFIGURATION
Note: ^ denotes internal pull up
OUTPUT RANGE
DIVIDER
FREQUENCY
RANGE
OUTPUT
BUFFER
2
10 - 20MHz
CMOS
BLOCK DIAGRAM
PL
L502
-52
1
2
3
4
5
6
7
8
XOUT
N/C
VCON
GND
XIN
VDD
CLK
OE^
X T A L
O S C
O E
X IN
X O U T
C L K
V C O N
V A R IC A P
PLL502-52
Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 2
PIN DESCRIPTIONS
Name Number
Type
Description
XOUT
1
I
Crystal output. See Crystal Specifications on page 4.
N/C 2
-
Not
connected.
VCON 3
I
Voltage
Control
input.
GND 4
P
Ground.
CLK 5
O
Output
clock.
VDD 6
P
Power
supply.
OE 7
I
Output enable input. Disables (tri-state) output when low. Internal pull-up
enables output by default if pin is not connected to low.
XIN
8
I
Crystal input. See Crystal Specifications on page 4.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
4.6 V
Input Voltage, dc
V
I
-0.5
V
DD
+0.5 V
Output Voltage, dc
V
O
-0.5
V
DD
+0.5 V
Storage Temperature
T
S
-65 150
C
Ambient Operating Temperature*
T
A
-40 85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. DC Electrical Specifications
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Supply Current, Dynamic, with
Loaded Outputs
I
DD
F
XIN
= 20 - 52MHz
Output load of 10pF
10 mA
Operating Voltage
V
DD
2.25
3.63
V
I
OH
V
OH
= V
DD
-0.4V, V
DD
=3.3V 30 mA
Output drive current
(High Drive)
I
OL
V
OL
= 0.4V, V
DD
= 3.3V
30
mA
I
OH
V
OH
= V
DD
-0.4V, V
DD
=3.3V 10 mA
Output drive current
(Standard Drive)
I
OL
V
OL
= 0.4V, V
DD
= 3.3V
10
mA
Short Circuit Current
50
mA
VCXO Control Voltage
VCON
0
V
DD
V
PLL502-52
Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 3
3. AC Electrical Specifications
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Input Crystal Frequency
20
52
MHz
Output Clock Rise/Fall Time
(Standard Drive)
0.3V ~ 3.0V with 15 pF load
2.4
Output Clock Rise/Fall Time
(High Drive)
0.3V ~ 3.0V with 15 pF load
1.2
ns
Output Clock Duty Cycle
Measured @ 50% V
DD
45
50
55
%
4. Voltage Control Crystal Oscillator
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
VCXO Stabilization Time *
T
VCXOSTB
From power valid
10
ms
VCXO Tuning Range
F
XIN
= 20 - 40MHz;
XTAL C
0
/C
1
< 250
0V
VCON 3.3V
500 ppm
CLK output pullability
VCON=1.65V
1.65V
200
ppm
VCXO Tuning Characteristic
150
ppm/V
Pull range linearity
10
%
VCON input impedance
80
k
VCON modulation BW
0V
VCON 3.3V, -3dB
25
kHz
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
5. Jitter Specifications
PARAMETERS CONDITIONS
MIN.
TYP.
MAX.
UNITS
Period jitter RMS
20MHz
2.5
ps
Period jitter peak-to-peak
20MHz
20
ps
Integrated jitter RMS
Integrated 12 kHz to 20 MHz at 20MHz
1
ps
6. Phase Noise Specifications
PARAMETERS FREQUENCY @10Hz
@100Hz @1kHz @10kHz @100kHz UNITS
Phase Noise relative
to carrier
20MHz -65 -90
-120
-140
-147
dBc/Hz
Note: Phase Noise at VCON = 0V to be measured
PLL502-52
Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 4
7. Crystal Specifications
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
F
XIN
Parallel Fundamental Mode
20
40
MHz
Crystal Loading Rating
C
L (xtal)
At Vcon = 1.65V
9.5
pF
Crystal Pullability
C
0
/C
1 (xtal)
AT cut
250 -
Recommended ESR
R
E
AT cut
30
Note: Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at nomi-
nal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally.
This however may reduce the pull range.
PACKAGE INFORMATION
C
L
A
8 PIN ( dimensions in mm )
Narrow SOIC
Symbol
Min.
Max.
A
1.47
1.73
A1
0.10
0.25
B
0.33
0.51
C
0.19
0.25
D
4.80
4.95
E
3.80
4.00
H
5.80
6.20
L
0.38
1.27
e
1.27 BSC
E
H
D
A1
e
B
TSSOP
Min.
Max.
-
1.20
0.05
0.15
0.19
0.30
0.09
0.20
2.90
3.10
4.30
4.50
6.20
6.60
0.45
0.75
0.65 BSC
PLL502-52
Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 03/14/00 Page 5
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL502-52 (H) X C

Order Number
Marking
Package Option
PLL502-52OC-R P502-52OC
TSSOP - Tape and Reel
PLL502-52OC P502-52OC
TSSOP
Tube
PLL502-52HOC-R P502-52HOC
TSSOP - Tape and Reel
PLL502-52HOC P502-52HOC
TSSOP - Tube
PLL502-52SC-R P502-52SC
SOIC - Tape and Reel
PLL502-52SC P502-52SC SOIC
-
Tube
PLL502-52HSC-R P502-52HSC
SOIC - Tape and Reel
PLL502-52HSC P502-52HSC SOIC
-
Tube
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
O=TSSOP , S=SOIC
Optional High Drive