Preliminary
PLL520-47
CMOS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 8/26/02 Page 1
FEATURES
65MHz to 130MHz Fundamental Mode Crystal.
Output range: 65MHz 130MHz (no PLL).
Low Injection Power for crystal 50uW.
CMOS outputs.
Integrated variable capacitors.
Supports 3.3V-Power Supply.
Available in 16 pin (TSSOP or SOIC).
DESCRIPTIONS
PLL520-47 is a VCXO IC specifically designed to
pull frequency fundamental crystals from 65MHz to
130MHz, with CMOS outputs. Its design was
optimized to tolerate higher limits of interelectrodes
capacitance and bonding capacitance to improve
yield. It achieves very low current into the crystal
resulting in better overall stability. Its internal
varicaps allow an on chip frequency pulling,
controlled by the VCON input.
BLOCK DIAGRAM
PIN CONFIGURATION
DRIVE_SEL AND OE_CTRL TABLE
Pin #16
DRIVE_SEL
Output Drive
0
High Drive CMOS
1
Standard CMOS (default)
Pin #6
OE
State
0
Tri-state
1
Output enabled (default)
X+
X-
OE
Q
PLL520-47
VCON
Oscillator
Amplifier
w/
integrated
varicaps
PLL 520-47
1
2
3
4
5
6
7
8
VDD
9
10
11
12
13
14
15
16
XIN
XOUT
N/C
N/C
OE
VCON
GND
DRIVE_SEL
N/C
GND
CMOS
VDD
CMOS
N/C
N/C
Preliminary
PLL520-47
CMOS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 8/26/02 Page 2
PIN DESCRIPTIONS
Name
Number
Type
Description
XIN
2
I
Crystal in connector.
XOUT
3
I
Crystal out connector.
OE
6
I
Output enable pin.
VCON
7
I
Frequency control input (0.3V to 3.0V)
GND
8, 14
P
GND.
CMOS
11,13
O
CMOS clock output. Either one can be used, or both.
DRIVE_SEL
16
I
Output Drive selector pin (see table on page 1). Internal pull-up.
Bond to GND to set to 0 (defaults to 1).
N/C
4,5,9,10,11,15
-
Not connected.
VDD
1, 12
P
+3.3V VDD.
Preliminary
PLL520-47
CMOS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 8/26/02 Page 3
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
7
V
Input Voltage, dc
V
I
V
SS
-0.5
V
DD
+0.5
V
Output Voltage, dc
V
O
V
SS
-0.5
V
DD
+0.5
V
Storage Temperature
T
S
-65
150
C
Ambient Operating Temperature*
T
A
-40
85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
Input Static Discharge Voltage Protection
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
2. Crystal Specifications
3. Voltage Control Crystal Oscillator
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
VCXO Stabilization Time *
T
VCXOSTB
From power valid
10
ms
VCXO Tuning Range
XTAL C
0
/C
1
< 300
200*
ppm
CLK output pullability
0V
VCON
3.3V
at room temperature
100*
ppm
On-chip Varicaps control range
VCON = 0 to 3.3V
4 18*
pF
Linearity
5*
10*
%
VCXO Tuning Characteristic
65
ppm/V
VCON input impedance
60
k
VCON modulation BW
0V
VCON
3.3V, -3dB
25
kHz
Note:
Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
CX+
2
Built-in Capacitance
CX-
2
Inter-electrode capacitance
C
0
65MHz to 130MHz
(VDD=3.3V)
2.6
pF
C0/C1 ratio (gamma)
300
-
Oscillation Frequency
OF
Fund.
65
130
MHz
Preliminary
PLL520-47
CMOS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 8/26/02 Page 4
4. General Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Supply Current (Loaded Outputs)
I
DD
40
mA
Operating Voltage
V
DD
3.13
3.47
V
Output Clock Duty Cycle
@ 1.4V
45
50
55
%
Short Circuit Current
50
mA
5. Jitter specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX. UNITS
Period jitter RMS
77.76MHz
3.5*
ps
Period jitter peak-to-peak
77.76MHz
24*
ps
Integrated jitter RMS
Integrated 12 kHz to 20 MHz at 77.76MHz
0.5*
ps
*: To be measured
6. Phase noise specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz @1kHz @10kHz @100kHz UNITS
Phase Noise relative to
carrier
77.76MHz
-75
-95
-125
-145
-155
dBc/Hz
Note: Phase Noise at VCON = 0V to be measured
7. CMOS Output Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP. MAX. UNITS
Output High Voltage
V
OH
I
OH
= -12mA (Standard drive)
2.4
V
Output Low Voltage
V
OL
I
LO
= 12mA (Standard drive)
0.4
V
Output High Voltage at CMOS level
V
OHC
I
OH
= -4mA (Standard drive)
V
DD
0.4
V
At TTL level (High drive)
36
51
mA
Output drive current
At TTL level (Standard drive)
12
17
mA
8. CMOS Switching Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP. MAX. UNITS
0.8V ~ 2.0V with 10 pF load
1.15
Output Clock Rise/Fall Time
(Standard Drive)
0.3V ~ 3.0V with 15 pF load
3.7
0.8V ~ 2.0V with 10 pF load
0.5
Output Clock Rise/Fall Time
(High Drive)
0.3V ~ 3.0V with 15 pF load
1.5
ns
Preliminary
PLL520-47
CMOS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 8/26/02 Page 5
PACKAGE INFORMATION
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY
: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL520-47 O C
PART NUMBER
TEMPERATURE
C=COMMERCIAL
M=MILITARY
I=INDUSTRAL
PACKAGE TYPE
O=TSSOP S=SOIC
C
L
A
16 PIN Narrow SOIC, TSSOP ( mm )
SOIC
TSSOP
Symbol
Min.
Max.
Min.
Max.
A
1.35
1.75
-
1.20
A1
0.10
0.25
0.05
0.15
B
0.33
0.51
0.19
0.30
C
0.19
0.25
0.09
0.20
D
9.80
10.00
4.90
5.10
E
3.80
4.00
4.30
4.50
H
5.80
6.20
6.40 BSC
L
0.40
1.27
0.45
0.75
e
1.27 BSC
0.65 BSC
E
H
D
A1
e
B
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