Preliminary
PLL520-57
CMOS Low Phase Noise VCXO (for 25-55MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 5/03/02 Page 1
FEATURES
25MHz to 55MHz Fundamental Mode Crystal.
Output range: 25MHz 55MHz (no PLL).
Integrated variable capacitors.
Standard CMOS output drive (15 pF CLoad).
Supports 3.3V-Power Supply.
Available in 8 pin SOIC.
DESCRIPTIONS
The PLL520-57 is a monolithic low jitter, high
performance CMOS VCXO IC Die. It allows the
control of the output frequency with an input voltage
(VCON), using a low cost crystal. With a CMOS
output drive suitable up to 15pF CLoad, the PLL520-
57 is ideal for a wide range of applications from
25MHz to 55MHz (including 27MHz, 35.328MHz,
51.84MHz, etc.).
BLOCK DIAGRAM
PIN CONFIGURATION
OUTPUT RANGE
MULTIPLIER
FREQUENCY
RANGE
OUTPUT
BUFFER
No PLL
25 - 55MHz
CMOS
Pad #30
OE_CTRL
State
0
Tri-state
1
Output enabled (default)
X+
X-
OE
Q
PLL520-57
VCON
Oscillator
Amplifier
w/
integrated
varicaps
PLL520-57
1
2
3
4
5
6
7
8
XIN
XOUT
OE
VCON
VDD
CLK
VDD
GND
Preliminary
PLL520-57
CMOS Low Phase Noise VCXO (for 25-55MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 5/03/02 Page 2
PIN DESCRIPTIONS
Name
Number
Type
Description
XIN
1
I
Crystal input pin.
XOUT
2
I
Crystal output pin.
OE
3
I
Output enable input pin. Disables (tri-state) output when low. Internal
pull-up enables output by default if pin is not connected to low.
VCON
4
I
Frequency control voltage input pin.
CLK
6
O
Output clock pin.
GND
7
P
Ground pin.
VDD
5,8
P
+3.3V VDD power supply pin.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
7
V
Input Voltage, dc
V
I
V
SS
-0.5
V
DD
+0.5
V
Output Voltage, dc
V
O
V
SS
-0.5
V
DD
+0.5
V
Storage Temperature
T
S
-65
150
C
Ambient Operating Temperature*
T
A
-40
85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
Input Static Discharge Voltage Protection
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
2. Crystal Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
CX+
2
Built-in Capacitance
CX-
2
Inter-electrode capacitance
C
0
25MHz to 55MHz
(VDD=3.3V)
3.6
pF
C0/C1 ratio (gamma)
250
-
Oscillation Frequency
OF
Fund.
25
55
MHz
Preliminary
PLL520-57
CMOS Low Phase Noise VCXO (for 25-55MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 5/03/02 Page 3
3. Voltage Control Crystal Oscillator
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
VCXO Stabilization Time *
T
VCXOSTB
From power valid
10
ms
VCXO Tuning Range
XTAL C
0
/C
1
< 250
300*
ppm
CLK output pullability
0V
VCON
3.3V
at room temperature
150*
ppm
On-chip Varicaps control range
VCON = 0 to 3.3V
4 18*
pF
Linearity
5*
10*
%
VCXO Tuning Characteristic
100
ppm/V
VCON input impedance
60
k
VCON modulation BW
0V
VCON
3.3V, -3dB
25
kHz
Note:
Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
4. General Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Supply Current (Loaded Outputs)
I
DD
40
mA
Operating Voltage
V
DD
3.13
3.47
V
Output Clock Duty Cycle
@ 1.4V
45
50
55
%
Short Circuit Current
50
mA
5. Jitter specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX. UNITS
Period jitter RMS
51.84MHz
3.5*
ps
Period jitter peak-to-peak
51.84MHz
24*
ps
Integrated jitter RMS
Integrated 12 kHz to 20 MHz at 51.84MHz
0.5*
ps
*: To be measured
6. Phase noise specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz @1kHz @10kHz @100kHz UNITS
Phase Noise relative to
carrier
51.84MHz
-75
-95
-125
-145
-155
dBc/Hz
Note: Phase Noise at VCON = 0V to be measured
Preliminary
PLL520-57
CMOS Low Phase Noise VCXO (for 25-55MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 5/03/02 Page 4
7. CMOS Output Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP. MAX. UNITS
Output High Voltage
V
OH
I
OH
= -12mA
2.4
V
Output Low Voltage
V
OL
I
LO
= 12mA
0.4
V
Output High Voltage at CMOS level
V
OHC
I
OH
= -4mA
V
DD
0.4
V
Output Drive current
At TTL level
12
17
mA
8. CMOS Switching Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP. MAX. UNITS
0.8V ~ 2.0V with 10 pF load
1.15
Output Clock Rise/Fall Time
0.3V ~ 3.0V with 15 pF load
3.7
ns
Preliminary
PLL520-57
CMOS Low Phase Noise VCXO (for 25-55MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 5/03/02 Page 5
PACKAGE INFORMATION
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL520-57 S C
PART NUMBER
TEMPERATURE
C=COMMERCIAL
M=MILITARY
I=INDUSTRAL
PACKAGE TYPE
S=SOIC
O=TSSOP
C
L
A
8 PIN ( dimensions in mm )
Narrow SOIC
Symbol
Min.
Max.
A
1.47
1.73
A1
0.10
0.25
B
0.33
0.51
C
0.19
0.25
D
4.80
4.95
E
3.80
4.00
H
5.80
6.20
L
0.38
1.27
e
1.27 BSC
E
H
D
A1
e
B
TSSOP
Min.
Max.
-
1.20
0.05
0.15
0.19
0.30
0.09
0.20
2.90
3.10
4.30
4.50
6.20
6.60
0.45
0.75
0.65 BSC
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