PLL601-01
Low Phase Noise PLL Clock Multiplier
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 1
FEATURES
Low phase noise XO
Input from crystal or clock at 10-27MHz.
Integrated crystal load capacitor: no external
load capacitor required.
Output clocks up to 160MHz.
Low phase noise (-125dBc/Hz @ 1kHz).
Output Enable function.
Low jitter (RMS): 7.2ps (period), 11.2ps (accum.)
Advanced low power sub-micron CMOS process.
3.3V operation.
Available in 16-Pin SOIC or TSSOP.
DESCRIPTION
The PLL601-01 is a low cost, high performance and
low phase noise clock synthesizer. Using Phase-
Link's proprietary analog and digital Phase Locked
Loop techniques, this IC can produce up to a
160MHz output.
PIN CONFIGURATION
Note: ^ denotes internal pull up.
BLOCK DIAGRAM
PLL 60
1-01
1
2
3
4
5
6
7
8
CLK
9
10
11
12
13
14
15
16
REFEN
VDD
VDD
VDD
XOUT
S1^
XIN
GND
GND
GND
REFOUT
OE^
S0^
S3^
S2^
Reference
Divider
Phase
Comparator
Charge
Pump
Loop
Filter
VCO
ROM Based
Multipliers
VCO
Divider
XTAL
OSC
CLK
REFOUT
OE
REFEN
S3
S2
S1
S0
XIN
XOUT
PLL601-01
Low Phase Noise PLL Clock Multiplier
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2
PIN DESCRIPTIONS
MULTIPLIER SELECT TABLE
S3 S2 S1 S0
CLK
0 0 0 0
Test
0 0 0 1
Input
x
11
0 0 1 0
Input
x
1
0 0 1 1
Input
x
3
0 1 0 0
Input
x
4
0 1 0 1
Input
x
5
0 1 1 0
Input
x
6
0 1 1 1
Input
x
8
1 0 0 0
Input
x
7
1 0 1 0
Input
x
2
1 0 1 1
Input
x
9
1 1 0 0
Input
x
8
1 1 0 1
Input
x
10
1 1 1 0
Input
x
12
1 1 1 1
Input
x
16
Name Number
Type
Description
CLK
1
O
Clock output. Equals the input frequency times selected multiplier.
REFEN 2
I
Reference clock enable. When Low, it disables REFOUT. When High, it
enables REFOUT.
VDD 3,4,5
P
Power
Supply.
XOUT 6
O
Crystal
output.
S1
7
I
Multiplier Select Pin 1. Determines CLK output. Has internal pull-up.
XIN 8
I
Crystal input to be connected to 10-27MHz fundamental parallel mode crys-
tal (C
L
=15pF). On chip load capacitors: No external capacitor required.
S2
9
I
Multiplier Select Pin 2. Determines CLK output. Has internal pull-up.
S3
10
I
Multiplier Select Pin 3. Determines CLK output. Has internal pull-up.
S0
11
I
Multiplier Select Pin 0. Determines CLK output. Has internal pull-up.
OE
12
I
Output Enable. Tri-state CLK and REFOUT when low. Has internal pull-up.
REFOUT 13
O
Buffered
crystal
oscillator clock output. Controlled by REFEN.
GND 14,15,16
P
Ground.
PLL601-01
Low Phase Noise PLL Clock Multiplier
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
4.6 V
Input Voltage, dc
V
I
-0.5
V
DD
+0.5 V
Output Voltage, dc
V
O
-0.5
V
DD
+0.5 V
Storage Temperature
T
S
-65 150
C
Ambient Operating Temperature*
T
A
-40 85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. AC Specifications
PARAMETERS CONDITIONS
MIN.
TYP.
MAX.
UNITS
Input Frequency
Fundamental parallel resonance
10
27
MHz
Output Frequency
At 3.3V
160
MHz
Output Rise Time
0.8V to 2.0V with no load
1.5
ns
Output Fall Time
2.0V to 0.8V with no load
1.5
ns
Duty Cycle
@ 50% V
DD
45
50
55
%
3. DC Specifications
PARAMETERS SYMBOL CONDITIONS
MIN. TYP. MAX.
UNITS
Operating Voltage
V
DD
2.97
3.63
V
Input High Voltage
V
IH
2
V
Input Low Voltage
V
IL
0.8
V
Input High Voltage
V
IH
For XIN pin
(V
DD
/2)
+ 1
V
DD
/2 V
Input Low Voltage
V
IL
For XIN pin
V
DD
/2
(V
DD
/2)
- 1
V
Output High Voltage
V
OH
I
OH
= -25mA
2.4
V
Output Low Voltage
V
OL
I
OL
= 25mA
0.4
V
Output High Voltage At
CMOS Level
V
OH
I
OH
= -8mA
V
DD
-0.4
V
Operating Supply Current
I
DD
No Load
35
mA
Short-circuit Current
I
S
50
mA
Input Capacitance
C
IN
OE, Select Pins
5
pF
PLL601-01
Low Phase Noise PLL Clock Multiplier
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 4
4. Crystal Specifications
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
F
XIN
Parallel Fundamental Mode
10
27
MHz
Crystal Loading Capacitance
Rating
C
L
(xtal)
15
pF
5. Jitter Specifications
PARAMETERS CONDITIONS
MIN.
TYP.
MAX.
UNITS
Max. Absolute Jitter, peak-to-peak
Short term
100
ps
Max. Jitter, cycle to cycle
60
ps
Phase Noise, relative to carrier, 125Mhz(x5)
100 Hz offset
105
dBc/Hz
Phase Noise, relative to carrier, 125Mhz(x5)
1kHz offset
125
dBc/Hz
Phase Noise, relative to carrier, 125Mhz(x5)
10kHz offset
130
dBc/Hz
Phase Noise, relative to carrier, 125Mhz(x5) 100kHz
offset
125
dBc/Hz
PLL601-01
Low Phase Noise PLL Clock Multiplier
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 5
PACKAGE INFORMATION
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL601-01 S C
Order Number
Marking
Package Option
PLL601-01OC P601-01OC
16-Pin TSSOP (Tube)
PLL601-01OC-R P601-01OC
16-Pin TSSOP (Tape & Reel)
PLL601-01SC P601-01SC
16-Pin SOIC (Tube)
PLL601-01SC-R P601-01SC
16-Pin SOIC (Tape & Reel)
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
S=SOIC
O=TSSOP
C
L
A
16 PIN Narrow SOIC, TSSOP ( mm )
SOIC
TSSOP
Symbol
Min.
Max.
Min.
Max.
A
1.35
1.75
-
1.20
A1
0.10
0.25
0.05
0.15
B
0.33
0.51
0.19
0.30
C
0.19
0.25
0.09
0.20
D
9.80
10.00
4.90
5.10
E
3.80
4.00
4.30
4.50
H
5.80
6.20
6.40 BSC
L
0.40
1.27
0.45
0.75
e
1.27 BSC
0.65 BSC
E
H
D
A1
e
B
PDF 
ZIP