PLL602-04
Low Phase Noise CMOS XO (96MHz to 200MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 1
FEATURES
Low phase noise XO for the 96MHz to 200MHz
range (-125 dBc at 10kHz offset).
12 to 25MHz crystal input.
Integrated crystal load capacitor: no external
load capacitor required.
Low jitter (RMS): 4ps period jitter (1 sigma).
Selectable High Drive (30mA) or Standard Drive
(10mA) output.
3.3V operation.
Available in 8-Pin TSSOP or SOIC.
DESCRIPTION
The PLL602-04 is a low cost, high performance and
low phase noise XO, providing less than -125 dBc at
10kHz offset in the 96MHz to 200MHz operating
range. The very low jitter (4ps RMS period jitter)
makes this chip ideal for 155.52MHz SONET and
SDH applications, and for 125MHz and 106.25MHz
applications. Input crystal can range from 12 to
25MHz (fundamental resonant mode).
PIN CONFIGURATION
OUTPUT RANGE
MULTIPLIER
FREQUENCY
RANGE
OUTPUT
BUFFER
x8 96
-
200MHz
CMOS
BLOCK DIAGRAM
Reference
Divider
Phase
Comparator
Charge
Pump
Loop
Filter
VCO
VCO
Divider
XTAL
OSC
OE
XIN
XOUT
CLK
PL
L
6
0
2
-
0
4
1
2
3
4
5
6
7
8
CLK
VDD
OE^
XIN
GND
N/C
XOUT
GND
Note: ^ denotes internal pull up
PLL602-04
Low Phase Noise CMOS XO (96MHz to 200MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2
PIN DESCRIPTIONS
Name Number
Type
Description
CLK 1
O
Output
clock.
VDD 2
P
+3.3V
power
supply.
OE 3
I
Output enable input. Disables (tri-state) output when low. Internal pull-up
enables output by default if pin is not connected to low.
XIN
4
I
Crystal input. See Crystal Specifications on page 3.
XOUT
5
I
Crystal output. See Crystal Specifications on page 3.
N/C 6
-
Not
connected.
GND 7,
8
P
Ground.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
4.6 V
Input Voltage, dc
V
I
-0.5
V
DD
+0.5 V
Output Voltage, dc
V
O
-0.5
V
DD
+0.5 V
Storage Temperature
T
S
-65 150
C
Ambient Operating Temperature*
T
A
-40 85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. DC Electrical Specifications
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Supply Current, Dynamic, with
Loaded Outputs
I
DD
F
XIN
= 12 - 25MHz
Output load of 10pF
16
20 mA
Operating Voltage
V
DD
2.97
3.63
V
I
OH
V
OH
= V
DD
-0.4V, V
DD
=3.3V 30 mA
Output drive current
(High Drive)
I
OL
V
OL
= 0.4V, V
DD
= 3.3V
30
mA
I
OH
V
OH
= V
DD
-0.4V, V
DD
=3.3V 10 mA
Output drive current
(Standard Drive)
I
OL
V
OL
= 0.4V, V
DD
= 3.3V
10
mA
Short Circuit Current
50
mA
PLL602-04
Low Phase Noise CMOS XO (96MHz to 200MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3
3. AC Specification
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Input Crystal Frequency
12
25
MHz
Output Clock Rise/Fall Time
(Standard Drive)
0.3V ~ 3.0V with 15 pF load
2.4
Output Clock Rise/Fall Time
(High Drive)
0.3V ~ 3.0V with 15 pF load
1.2
ns
Output Clock Duty Cycle
Measured @ 50% V
DD
45
50
55
%
4. Jitter and Phase Noise Specification
PARAMETERS CONDITIONS
MIN.
TYP.
MAX.
UNITS
RMS Period Jitter
(1 sigma 1000 samples)
at 155MHz, with capacitive decoupling
between VDD and GND.
4 ps
Phase Noise relative to carrier
155MHz @100Hz offset
-95
dBc/Hz
Phase Noise relative to carrier
155MHz @1kHz offset
-120
dBc/Hz
Phase Noise relative to carrier
155MHz @10kHz offset
-125
dBc/Hz
Phase Noise relative to carrier
155MHz @100kHz offset
-121
dBc/Hz
5. Crystal Specifications
PARAMETERS SYMBOL
MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
F
XIN
12 25 MHz
Crystal Loading Capacitance Rating
C
L (xtal)
20
pF
Driving power
1
mW
ESR R
S
30
PACKAGE INFORMATION
C
L
A
8 PIN ( dimensions in mm )
Narrow SOIC
Symbol
Min.
Max.
A
1.47
1.73
A1
0.10
0.25
B
0.33
0.51
C
0.19
0.25
D
4.80
4.95
E
3.80
4.00
H
5.80
6.20
L
0.38
1.27
e
1.27 BSC
E
H
D
A1
e
B
TSSOP
Min.
Max.
-
1.20
0.05
0.15
0.19
0.30
0.09
0.20
2.90
3.10
4.30
4.50
6.20
6.60
0.45
0.75
0.65 BSC
PLL602-04
Low Phase Noise CMOS XO (96MHz to 200MHz)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 03/14/00 Page 4
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL602-04 (H) X C
Order Number
Marking
Package Option
PLL602-04OC-R P602-04OC TSSOP - Tape and Reel
PLL602-04OC P602-04OC
TSSOP
Tube
PLL602-04HOC-R P602-04HOC TSSOP - Tape and Reel
PLL602-04HOC P602-04HOC TSSOP
Tube
PLL602-04SC-R P602-04SC SOIC - Tape and Reel
PLL602-04SC P602-04SC SOIC
-
Tube
PLL602-04HSC-R P602-04HSC SOIC - Tape and Reel
PLL602-04HSC P602-04HSC SOIC
-
Tube
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
S=SOIC, O=TSSOP
Optional High Drive
PDF 
ZIP