Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 1
FEATURES
Selectable 750kHz to 800MHz range.
Low phase noise output (@ 10kHz frequency
offset, -140dBc/Hz for 19.44MHz, -127dBc/Hz for
106.25MHz, -125dBc/Hz for 155.52MHz, -
110dBc/Hz for 622.08MHz).
CMOS (PLL602-37), PECL (PLL602-35 and
PLL602-38) or LVDS (PLL602-39) output.
12 to 25MHz crystal input.
No external load capacitor or varicap required.
Output Enable selector.
Selectable 1/16 to 32x frequency multiplier.
3.3V operation.
Available in 16-Pin (TSSOP or 3x3mm QFN).
DESCRIPTIONS
The PLL602-35 (PECL with inverted OE), PLL602-37
(CMOS), PLL602-38 (PECL), and PLL602-39 (LVDS)
are high performance and low phase noise XO IC
chips. They provide phase noise performance as low
as 125dBc at 1kHz offset (at 155MHz), by multiply-
ing the input crystal frequency up to 32x. They ac-
cept fundamental parallel resonant mode crystals
from 12 to 25MHz.
BLOCK DIAGRAM
PIN CONFIGURATION
(Top View)
^: Internal pull-up
*: On 3x3 package, PLL602-35/-38 do not have SEL0 available: Pin
10 is VDD, pin 11 is GND. However, PLL602-37/-39 have SEL0
(pin 10), and pin 11 is VDD. See pin assignment table for details.
OUTPUT ENABLE LOGICAL LEVELS
Part #
OE
State
0 (Default) Output enabled
PLL602-38
1
Tri-state
0
Tri-state
PLL602-35
PLL602-37
PLL602-39
1 (Default) Output enabled
OE input: Logical states defined by PECL levels for PLL602-38
Logical states defined by CMOS levels for PLL602-35/-37/-39
PLL 602-3x
1
2
3
4
5
6
7
8
VDD
9
10
11
12
13
14
15
16
XIN
XOUT
SEL3^
SEL2^
OE
GND
GND
SEL0^
SEL1^
GND
CLKC
VDD
CLKT
GND
GND
PLL602-3x
GND
VDD
CLKT
CLKC
1
2
3
4
12
11
10
9
13
14
15
16
8
7
6
5
XIN
SEL0^ / VDD*
SEL1^
VDD / GND*
SEL3^
XOUT
SEL2^
OE
GND
GND
GND
GND
X+
X-
OE
Q
PLL602-3x
Q
PLL by-pass
SEL
PLL
(Phase
Locked
Loop)
Oscillator
Amplifier
Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 2
FREQUENCY SELECTION TABLE
SEL3
SEL2
SEL1
SEL0
Selected Multiplier
0
0
1
1
Fin x 32
0
1
1
0
Fin / 8
0
1
1
1
Fin x 2
1
0
0
1
Fin / 2
1
0
1
0
Fin / 16
1
0
1
1
Fin x 4
1
1
0
0
Fin / 4
1
1
0
1
Fin x 8
1
1
1
0
Fin x 16
1
1
1
1
No multiplication
Note:
SEL0 is not available (always "1") for PLL602-35 and PLL602-38 in 3x3mm package
PIN DESCRIPTIONS PLL602-35 and PLL602-38 (see next page of PLL602-37/-39)
Name
TSSOP
Pin number
3x3mm QFN
Pin number Type
Description
XIN
2
12
I
Crystal in connector.
XOUT
3
13
I
Crystal out connector.
OE
6
16
I
Output enable pin (see OE logic state table on page 1).
GND
7,8,9,10,14
1,2,3,4,8,11
P
GND.
CLKT
11
5
O
True output PECL
CLKC
13
7
O
Complementary output PECL.
SEL0
16
Not available
I
SEL1
15
9
I
SEL2
5
15
I
SEL3
4
14
I
Multiplier selector pins. These pins have an internal pull-up
that will default SEL to `1' when not connected to GND.
VDD
1, 12
6,10
P
+3.3V VDD.
Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 3
PIN DESCRIPTIONS PLL602-37/-39 (see previous page of PLL602-35/-38)
Name
TSSOP
Pin number
3x3mm QFN
Pin number Type
Description
XIN
2
12
I
Crystal in connector.
XOUT
3
13
I
Crystal out connector.
OE
6
16
I
Output enable pin (see OE logic state table on page 1).
GND
7,8,9,10,14
1,2,3,4,8
P
GND.
CLKT
11
5
O
True output LVDS (PLL602-39)
(N/C for PLL602-37)
CLKC
13
7
O
Complementary output LVDS (PLL602-39)
(CMOS out for PLL602-37).
SEL0
16
10
I
SEL1
15
9
I
SEL2
5
15
I
SEL3
4
14
I
Multiplier selector pins. These pins have an internal pull-up
that will default SEL to `1' when not connected to GND.
VDD
1, 12
6,11
P
+3.3V VDD.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
7
V
Input Voltage, dc
V
I
V
SS
-
0.5
V
DD
+
0.5
V
Output Voltage, dc
V
O
V
SS
-
0.5
V
DD
+
0.5
V
Storage Temperature
T
S
-65
150
C
Ambient Operating Temperature*
T
A
-40
85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
Input Static Discharge Voltage Protection
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 4
2. Crystal Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
F
XIN
Parallel Fundamental Mode
12
25
MHz
Crystal Loading Rating
C
L
(xtal)
12
pF
Recommended ESR
R
E
AT cut
30
3. General Electrical Specifications
PARAMETERS SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Fout <
24
MHz
25/25/15
24MHz < Fout < 96MHz
65/45/30
Supply Current,
Dynamic (with
Loaded Outputs)
I
DD
PECL/LVDS/CMOS
96MHz < Fout < 800MHz
100/80/40
mA
Operating Voltage
V
DD
3.13
3.47
V
Output Clock Duty
Cycle
@ 1.4V (CMOS)
@ 1.25V (LVDS)
@ Vdd 1.3V (PECL)
45
45
45
50
50
50
55
55
55
%
Short Circuit Current
50
mA
4. AC Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Input Crystal Frequency
12
25
MHz
0.8V ~ 2.0V with 10 pF load
1.5
Output Clock Rise Time
0.3V ~ 3.0V with 15 pF load
3.7
5
2.0V ~ 0.8V with 10 pF load
1.5
Output Clock Fall Time
3.0V ~ 0.3V with 15pF load
3.7
5
ns
Output Clock Duty Cycle
Measured @ 1.4V
45
50
55
%
Short Circuit Current
50
mA
Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 5
5. Jitter specifications
PARAMETERS
CONDITIONS
FREQUENCY
MIN.
TYP. MAX.
UNITS
19.44MHz
5
77.76MHz
8
155.52MHz
9
Period jitter RMS
With capacitive decoupling between
VDD and GND.
622.08MHz
10
ps
Accumulated jitter RMS With capacitive decoupling between
VDD and GND. Over 10,000 cycles.
155.52MHz
TBM
ps
Integrated jitter RMS
Integrated 12 kHz to 20 MHz
155.52MHz
3
4
ps
6. Phase noise specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz @1kHz @10kHz @100kHz UNITS
19.44MHz
-60
-90
-112
-140
-150
106.25MHz
-60
-90
-112
-127
-125
155.52MHz
-60
-90
-112
-125
-123
Phase Noise relative to
carrier
622.08MHz
-60
-90
-109
-110
-109
dBc/Hz
Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 6
7. LVDS Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Output Differential Voltage
V
OD
247
355
454
mV
V
DD
Magnitude Change
V
OD
-50
50
mV
Output High Voltage
V
OH
1.4
1.6
V
Output Low Voltage
V
OL
0.9
1.1
V
Offset Voltage
V
OS
1.125
1.2
1.375
V
Offset Magnitude Change
V
OS
R
L
= 100
(see figure)
0
3
25
mV
Power-off Leakage
I
OXD
V
out
= V
DD
or GND
V
DD
= 0V
1
10
uA
Output Short Circuit Current
I
OSD
-5.7
-8
mA
8. LVDS Switching Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Differential Clock Rise Time
t
r
0.2
0.7
1.0
ns
Differential Clock Fall Time
t
f
R
L
= 100
C
L
= 10 pF
(see figure)
0.2
0.7
1.0
ns
OUT
OUT
V
OD
V
OS
50
50
OUT
V
DIFF
R
L
= 100
C
L
= 10pF
C
L
= 10pF
LVDS Switching Test Circuit
LVDS Levels Test Circuit
LVDS Transistion Time Waveform
OUT
OUT
OUT
0V (Differential)
0V
20%
80%
20%
80%
t
R
t
F
V
DIFF
Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 7
9. PECL Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
MAX.
UNITS
Output High Voltage
V
OH
V
DD
1.025
V
Output Low Voltage
V
OL
R
L
= 50
to (V
DD
2V)
(see figure)
V
DD
1.620
V
10. PECL Switching Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Clock Rise Time
t
r
0.8V ~ 2.0V
1.5
ns
Clock Fall Time
t
f
2.0V ~ 0.8V
1.5
ns
Duty Cycle
Measured @ 1.4V
40
50
60
%
OUT
OUT
50
50
PECL Levels Test Circuit
PECL Transistion Time Waveform
OUT
OUT
50%
20%
80%
t
R
t
F
VDD
DUTY CYCLE
45 - 55%
55 - 45%
50%
OUT
OUT
t
SKEW
PECL Output Skew
2.0V
Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 8
PACKAGE INFORMATION
C
L
A
16 PIN Narrow SOIC, TSSOP ( mm )
SOIC
TSSOP
Symbol
Min.
Max.
Min.
Max.
A
1.35
1.75
-
1.20
A1
0.10
0.25
0.05
0.15
B
0.33
0.51
0.19
0.30
C
0.19
0.25
0.09
0.20
D
9.80
10.00
4.90
5.10
E
3.80
4.00
4.30
4.50
H
5.80
6.20
6.40 BSC
L
0.40
1.27
0.45
0.75
e
1.27 BSC
0.65 BSC
E
H
D
A1
e
B
Preliminary
PLL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC's
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/29/02 Page 9
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY
: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL602-3x O C
PART NUMBER
TEMPERATURATURE
C=COMMERCIAL
M=MILITARY
I=INDUSTRAL
PACKAGE TYPE
O=TSSOP Q=QFN
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