2003 PLX Technology, Inc. All rights reserved.
PLX Technology, Inc. retains the right to make changes to this product at any time, without notice.
Products may have minor variations to this publication, known as errata. PLX assumes no liability
whatsoever, including infringement of any patent or copyright, for sale and use of PLX products.
PLX Technology and the PLX logo are registered trademarks of PLX Technology, Inc. Other brands and
names are property of their respective owners.
These devices are not designed, intended, authorized, or warranted to be suitable for use in
medical, life-support applications, devices or systems or other critical applications.
PLX Part Number: PCI 6152-
CC33BC; Former HiNT Part Number: HB1-SE33B
PLX Part Number: PCI 6152-
CC33PC; Former HiNT Part Number: HB1-SE33P
PLX Part Number: PCI 6152-
CC66BC; Former HiNT Part Number: HB1-SE66
Order Number: 6152-SIL-DB-P1-2.0
Printed in the USA, May 2003
PCI 6152 Data Book v2.0
2003 PLX Technology, Inc. All rights reserved.
5
PCI 6152 PCI-to-PCI Bridge
The PLX PCI 6152 is a family of three very low power 32-bit PCI-to-PCI bridges: PCI 6152 33BC, PCI 6152 33PC
and PCI 6152 66PC. PCI 6152 66PC is capable of running at 66 MHz PCI Bus and PCI 6152 33BC and PCI 6152
33PC runs at 33 MHz. All parts are specially designed for applications that require high performance 32-bit PCI
bus expansion. Add-in card designers can use PCI 6152 to expand PCI connection capacity beyond the limitation
of a single PCI device. Designers can use PCI 6152 to build multi-device PCI cards such as RAID controllers and
other multimedia applications.
Part numbers and Description:
Part Number
Description
Package Type
PCI 6152 33BC
33 MHz, 32-bit PCI interface
160-pin Tiny BGA
PCI 6152 66PC
66 MHz, 32-bit PCI interface
(AGP 2x port compatible)
160-pin Tiny BGA
PCI 6152 33PC
Intel 21152 pin compatible 33 MHz, 32-bit PCI interface
160-pin PQFP
PCI Local Bus Specification Rev. 2.2 with VPD support
PCI 6152 66BC
is 66 MHz capable and
PCI 6152 33BC and 33PC
run at 33 MHz
Synchronous primary and secondary PCI bus operation
Compact PCI Hot Swap Friendly support with Ejector connection
High performance, no retry penalty flow with uninterrupted 0 wait state burst up to 1K bytes
Provides 4 Dwords buffering for posted write transactions and 4 Dwords for prefetchable read transactions
each direction
PCI Mobile Design Guide Rev. 1.1
Power Management D3 Cold Wakeup capable
Concurrent primary and secondary port operation supports traffic isolation
Provides programmable arbitration support for 4 bus masters on secondary interface
5 Buffered secondary PCI clock outputs
4 GPIO pins
Enhanced address decoding
-
Support 32-bit I/O address range
-
Support 64-bit memory- address range
-
ISA aware mode for legacy support in the first 64KB of I/O address range
-
VGA addressing and VGA palette snooping support
Supports 3.3V PCI with 5V tolerant I/O
PCI 6152
PCI-to-PCI
Bridge
Primary PCI Bus
Secondary PCI Bus
GPIO Interface
Up to Four
Master PCI Devices
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